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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the Alt board
4 *
5 * Copyright (C) 2014 Renesas Electronics Corporation
6 */
7
8/dts-v1/;
9#include "r8a7794.dtsi"
10#include <dt-bindings/gpio/gpio.h>
11
12/ {
13	model = "Alt";
14	compatible = "renesas,alt", "renesas,r8a7794";
15
16	aliases {
17		serial0 = &scif2;
18		i2c9 = &gpioi2c1;
19		i2c10 = &gpioi2c4;
20		i2c11 = &i2chdmi;
21		i2c12 = &i2cexio4;
22		mmc0 = &mmcif0;
23		mmc1 = &sdhi0;
24		mmc2 = &sdhi1;
25	};
26
27	chosen {
28		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
29		stdout-path = "serial0:115200n8";
30	};
31
32	memory@40000000 {
33		device_type = "memory";
34		reg = <0 0x40000000 0 0x40000000>;
35	};
36
37	d3_3v: regulator-d3-3v {
38		compatible = "regulator-fixed";
39		regulator-name = "D3.3V";
40		regulator-min-microvolt = <3300000>;
41		regulator-max-microvolt = <3300000>;
42		regulator-boot-on;
43		regulator-always-on;
44	};
45
46	vcc_sdhi0: regulator-vcc-sdhi0 {
47		compatible = "regulator-fixed";
48
49		regulator-name = "SDHI0 Vcc";
50		regulator-min-microvolt = <3300000>;
51		regulator-max-microvolt = <3300000>;
52
53		gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
54		enable-active-high;
55	};
56
57	vccq_sdhi0: regulator-vccq-sdhi0 {
58		compatible = "regulator-gpio";
59
60		regulator-name = "SDHI0 VccQ";
61		regulator-min-microvolt = <1800000>;
62		regulator-max-microvolt = <3300000>;
63
64		gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
65		gpios-states = <1>;
66		states = <3300000 1>, <1800000 0>;
67	};
68
69	vcc_sdhi1: regulator-vcc-sdhi1 {
70		compatible = "regulator-fixed";
71
72		regulator-name = "SDHI1 Vcc";
73		regulator-min-microvolt = <3300000>;
74		regulator-max-microvolt = <3300000>;
75
76		gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
77		enable-active-high;
78	};
79
80	vccq_sdhi1: regulator-vccq-sdhi1 {
81		compatible = "regulator-gpio";
82
83		regulator-name = "SDHI1 VccQ";
84		regulator-min-microvolt = <1800000>;
85		regulator-max-microvolt = <3300000>;
86
87		gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
88		gpios-states = <1>;
89		states = <3300000 1>, <1800000 0>;
90	};
91
92	lbsc {
93		#address-cells = <1>;
94		#size-cells = <1>;
95	};
96
97	vga-encoder {
98		compatible = "adi,adv7123";
99
100		ports {
101			#address-cells = <1>;
102			#size-cells = <0>;
103
104			port@0 {
105				reg = <0>;
106				adv7123_in: endpoint {
107					remote-endpoint = <&du_out_rgb1>;
108				};
109			};
110			port@1 {
111				reg = <1>;
112				adv7123_out: endpoint {
113					remote-endpoint = <&vga_in>;
114				};
115			};
116		};
117	};
118
119	vga {
120		compatible = "vga-connector";
121
122		port {
123			vga_in: endpoint {
124				remote-endpoint = <&adv7123_out>;
125			};
126		};
127	};
128
129	x2_clk: x2-clock {
130		compatible = "fixed-clock";
131		#clock-cells = <0>;
132		clock-frequency = <74250000>;
133	};
134
135	x13_clk: x13-clock {
136		compatible = "fixed-clock";
137		#clock-cells = <0>;
138		clock-frequency = <148500000>;
139	};
140
141	gpioi2c1: i2c-9 {
142		#address-cells = <1>;
143		#size-cells = <0>;
144		compatible = "i2c-gpio";
145		status = "disabled";
146		scl-gpios = <&gpio4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
147		sda-gpios = <&gpio4 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
148	};
149
150	gpioi2c4: i2c-10 {
151		#address-cells = <1>;
152		#size-cells = <0>;
153		compatible = "i2c-gpio";
154		status = "disabled";
155		scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
156		sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
157		i2c-gpio,delay-us = <5>;
158	};
159
160	/*
161	 * A fallback to GPIO is provided for I2C1.
162	 */
163	i2chdmi: i2c-11 {
164		compatible = "i2c-demux-pinctrl";
165		i2c-parent = <&i2c1>, <&gpioi2c1>;
166		i2c-bus-name = "i2c-hdmi";
167		#address-cells = <1>;
168		#size-cells = <0>;
169
170		composite-in@20 {
171			compatible = "adi,adv7180";
172			reg = <0x20>;
173
174			port {
175				adv7180: endpoint {
176					bus-width = <8>;
177					remote-endpoint = <&vin0ep>;
178				};
179			};
180		};
181
182		eeprom@50 {
183			compatible = "renesas,r1ex24002", "atmel,24c02";
184			reg = <0x50>;
185			pagesize = <16>;
186		};
187	};
188
189	/*
190	 * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA).
191	 * A fallback to GPIO is provided.
192	 */
193	i2cexio4: i2c-14 {
194		compatible = "i2c-demux-pinctrl";
195		i2c-parent = <&i2c4>, <&gpioi2c4>;
196		i2c-bus-name = "i2c-exio4";
197		#address-cells = <1>;
198		#size-cells = <0>;
199	};
200};
201
202&pci0 {
203	status = "okay";
204	pinctrl-0 = <&usb0_pins>;
205	pinctrl-names = "default";
206};
207
208&pci1 {
209	status = "okay";
210	pinctrl-0 = <&usb1_pins>;
211	pinctrl-names = "default";
212};
213
214&usbphy {
215	status = "okay";
216};
217
218&du {
219	pinctrl-0 = <&du_pins>;
220	pinctrl-names = "default";
221	status = "okay";
222
223	clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
224		 <&x13_clk>, <&x2_clk>;
225	clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
226
227	ports {
228		port@1 {
229			endpoint {
230				remote-endpoint = <&adv7123_in>;
231			};
232		};
233	};
234};
235
236&extal_clk {
237	clock-frequency = <20000000>;
238};
239
240&pfc {
241	pinctrl-0 = <&scif_clk_pins>;
242	pinctrl-names = "default";
243
244	du_pins: du {
245		groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
246		function = "du1";
247	};
248
249	scif2_pins: scif2 {
250		groups = "scif2_data";
251		function = "scif2";
252	};
253
254	scif_clk_pins: scif_clk {
255		groups = "scif_clk";
256		function = "scif_clk";
257	};
258
259	ether_pins: ether {
260		groups = "eth_link", "eth_mdio", "eth_rmii";
261		function = "eth";
262	};
263
264	phy1_pins: phy1 {
265		groups = "intc_irq8";
266		function = "intc";
267	};
268
269	i2c1_pins: i2c1 {
270		groups = "i2c1";
271		function = "i2c1";
272	};
273
274	i2c4_pins: i2c4 {
275		groups = "i2c4";
276		function = "i2c4";
277	};
278
279	vin0_pins: vin0 {
280		groups = "vin0_data8", "vin0_clk";
281		function = "vin0";
282	};
283
284	mmcif0_pins: mmcif0 {
285		groups = "mmc_data8", "mmc_ctrl";
286		function = "mmc";
287	};
288
289	sdhi0_pins: sd0 {
290		groups = "sdhi0_data4", "sdhi0_ctrl";
291		function = "sdhi0";
292		power-source = <3300>;
293	};
294
295	sdhi0_pins_uhs: sd0_uhs {
296		groups = "sdhi0_data4", "sdhi0_ctrl";
297		function = "sdhi0";
298		power-source = <1800>;
299	};
300
301	sdhi1_pins: sd1 {
302		groups = "sdhi1_data4", "sdhi1_ctrl";
303		function = "sdhi1";
304		power-source = <3300>;
305	};
306
307	sdhi1_pins_uhs: sd1_uhs {
308		groups = "sdhi1_data4", "sdhi1_ctrl";
309		function = "sdhi1";
310		power-source = <1800>;
311	};
312
313	usb0_pins: usb0 {
314		groups = "usb0";
315		function = "usb0";
316	};
317
318	usb1_pins: usb1 {
319		groups = "usb1";
320		function = "usb1";
321	};
322};
323
324&cmt0 {
325	status = "okay";
326};
327
328&pfc {
329	qspi_pins: qspi {
330		groups = "qspi_ctrl", "qspi_data4";
331		function = "qspi";
332	};
333};
334
335&ether {
336	pinctrl-0 = <&ether_pins &phy1_pins>;
337	pinctrl-names = "default";
338
339	phy-handle = <&phy1>;
340	renesas,ether-link-active-low;
341	status = "okay";
342
343	phy1: ethernet-phy@1 {
344		reg = <1>;
345		interrupt-parent = <&irqc0>;
346		interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
347		micrel,led-mode = <1>;
348		reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
349	};
350};
351
352&mmcif0 {
353	pinctrl-0 = <&mmcif0_pins>;
354	pinctrl-names = "default";
355
356	vmmc-supply = <&d3_3v>;
357	vqmmc-supply = <&d3_3v>;
358	bus-width = <8>;
359	non-removable;
360	status = "okay";
361};
362
363&rwdt {
364	timeout-sec = <60>;
365	status = "okay";
366};
367
368&sdhi0 {
369	pinctrl-0 = <&sdhi0_pins>;
370	pinctrl-1 = <&sdhi0_pins_uhs>;
371	pinctrl-names = "default", "state_uhs";
372
373	vmmc-supply = <&vcc_sdhi0>;
374	vqmmc-supply = <&vccq_sdhi0>;
375	cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
376	wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
377	sd-uhs-sdr50;
378	sd-uhs-sdr104;
379	status = "okay";
380};
381
382&sdhi1 {
383	pinctrl-0 = <&sdhi1_pins>;
384	pinctrl-1 = <&sdhi1_pins_uhs>;
385	pinctrl-names = "default", "state_uhs";
386
387	vmmc-supply = <&vcc_sdhi1>;
388	vqmmc-supply = <&vccq_sdhi1>;
389	cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
390	wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
391	sd-uhs-sdr50;
392	status = "okay";
393};
394
395&i2c1 {
396	pinctrl-0 = <&i2c1_pins>;
397	pinctrl-names = "i2c-hdmi";
398
399	clock-frequency = <400000>;
400};
401
402&i2c4 {
403	pinctrl-0 = <&i2c4_pins>;
404	pinctrl-names = "i2c-exio4";
405};
406
407&i2c7 {
408	status = "okay";
409	clock-frequency = <100000>;
410
411	pmic@58 {
412		compatible = "dlg,da9063";
413		reg = <0x58>;
414		interrupt-parent = <&gpio3>;
415		interrupts = <31 IRQ_TYPE_LEVEL_LOW>;
416		interrupt-controller;
417
418		rtc {
419			compatible = "dlg,da9063-rtc";
420		};
421
422		wdt {
423			compatible = "dlg,da9063-watchdog";
424		};
425	};
426};
427
428&vin0 {
429	status = "okay";
430	pinctrl-0 = <&vin0_pins>;
431	pinctrl-names = "default";
432
433	port {
434		vin0ep: endpoint {
435			remote-endpoint = <&adv7180>;
436			bus-width = <8>;
437		};
438	};
439};
440
441&scif2 {
442	pinctrl-0 = <&scif2_pins>;
443	pinctrl-names = "default";
444
445	status = "okay";
446};
447
448&scif_clk {
449	clock-frequency = <14745600>;
450};
451
452&qspi {
453	pinctrl-0 = <&qspi_pins>;
454	pinctrl-names = "default";
455
456	status = "okay";
457
458	flash@0 {
459		compatible = "spansion,s25fl512s", "jedec,spi-nor";
460		reg = <0>;
461		spi-max-frequency = <30000000>;
462		spi-tx-bus-width = <4>;
463		spi-rx-bus-width = <4>;
464		spi-cpol;
465		spi-cpha;
466		m25p,fast-read;
467
468		partitions {
469			compatible = "fixed-partitions";
470			#address-cells = <1>;
471			#size-cells = <1>;
472
473			partition@0 {
474				label = "loader";
475				reg = <0x00000000 0x00040000>;
476				read-only;
477			};
478			partition@40000 {
479				label = "system";
480				reg = <0x00040000 0x00040000>;
481				read-only;
482			};
483			partition@80000 {
484				label = "user";
485				reg = <0x00080000 0x03f80000>;
486			};
487		};
488	};
489};
490