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1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/* Copyright (c) 2018-2019 SiFive, Inc */
3
4#include "fu540-c000.dtsi"
5#include <dt-bindings/gpio/gpio.h>
6#include <dt-bindings/leds/common.h>
7#include <dt-bindings/pwm/pwm.h>
8
9/* Clock frequency (in Hz) of the PCB crystal for rtcclk */
10#define RTCCLK_FREQ		1000000
11
12/ {
13	#address-cells = <2>;
14	#size-cells = <2>;
15	model = "SiFive HiFive Unleashed A00";
16	compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000";
17
18	chosen {
19		stdout-path = "serial0";
20	};
21
22	cpus {
23		timebase-frequency = <RTCCLK_FREQ>;
24	};
25
26	memory@80000000 {
27		device_type = "memory";
28		reg = <0x0 0x80000000 0x2 0x00000000>;
29	};
30
31	soc {
32	};
33
34	hfclk: hfclk {
35		#clock-cells = <0>;
36		compatible = "fixed-clock";
37		clock-frequency = <33333333>;
38		clock-output-names = "hfclk";
39	};
40
41	rtcclk: rtcclk {
42		#clock-cells = <0>;
43		compatible = "fixed-clock";
44		clock-frequency = <RTCCLK_FREQ>;
45		clock-output-names = "rtcclk";
46	};
47	gpio-restart {
48		compatible = "gpio-restart";
49		gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
50	};
51
52	led-controller {
53		compatible = "pwm-leds";
54
55		led-d1 {
56			pwms = <&pwm0 0 7812500 PWM_POLARITY_INVERTED>;
57			active-low;
58			color = <LED_COLOR_ID_GREEN>;
59			max-brightness = <255>;
60			label = "d1";
61		};
62
63		led-d2 {
64			pwms = <&pwm0 1 7812500 PWM_POLARITY_INVERTED>;
65			active-low;
66			color = <LED_COLOR_ID_GREEN>;
67			max-brightness = <255>;
68			label = "d2";
69		};
70
71		led-d3 {
72			pwms = <&pwm0 2 7812500 PWM_POLARITY_INVERTED>;
73			active-low;
74			color = <LED_COLOR_ID_GREEN>;
75			max-brightness = <255>;
76			label = "d3";
77		};
78
79		led-d4 {
80			pwms = <&pwm0 3 7812500 PWM_POLARITY_INVERTED>;
81			active-low;
82			color = <LED_COLOR_ID_GREEN>;
83			max-brightness = <255>;
84			label = "d4";
85		};
86	};
87};
88
89&uart0 {
90	status = "okay";
91};
92
93&uart1 {
94	status = "okay";
95};
96
97&i2c0 {
98	status = "okay";
99};
100
101&qspi0 {
102	status = "okay";
103	flash@0 {
104		compatible = "issi,is25wp256", "jedec,spi-nor";
105		reg = <0>;
106		spi-max-frequency = <50000000>;
107		m25p,fast-read;
108		spi-tx-bus-width = <4>;
109		spi-rx-bus-width = <4>;
110	};
111};
112
113&qspi2 {
114	status = "okay";
115	mmc@0 {
116		compatible = "mmc-spi-slot";
117		reg = <0>;
118		spi-max-frequency = <20000000>;
119		voltage-ranges = <3300 3300>;
120		disable-wp;
121	};
122};
123
124&eth0 {
125	status = "okay";
126	phy-mode = "gmii";
127	phy-handle = <&phy0>;
128	phy0: ethernet-phy@0 {
129		compatible = "ethernet-phy-id0007.0771";
130		reg = <0>;
131	};
132};
133
134&pwm0 {
135	status = "okay";
136};
137
138&pwm1 {
139	status = "okay";
140};
141
142&gpio {
143	status = "okay";
144};
145