1 /* 2 * This header was generated from the Linux kernel headers by update_headers.py, 3 * to provide necessary information from kernel to userspace, such as constants, 4 * structures, and macros, and thus, contains no copyrightable information. 5 */ 6 #ifndef _VIA_DRM_H_ 7 #define _VIA_DRM_H_ 8 #include "drm.h" 9 #if defined(__cplusplus) 10 extern "C" { 11 #endif 12 #ifndef _VIA_DEFINES_ 13 #define _VIA_DEFINES_ 14 #define VIA_NR_SAREA_CLIPRECTS 8 15 #define VIA_NR_XVMC_PORTS 10 16 #define VIA_NR_XVMC_LOCKS 5 17 #define VIA_MAX_CACHELINE_SIZE 64 18 #define XVMCLOCKPTR(saPriv,lockNo) \ 19 ((volatile struct drm_hw_lock *)(((((unsigned long) (saPriv)->XvMCLockArea) + \ 20 (VIA_MAX_CACHELINE_SIZE - 1)) & \ 21 ~(VIA_MAX_CACHELINE_SIZE - 1)) + \ 22 VIA_MAX_CACHELINE_SIZE*(lockNo))) 23 #define VIA_NR_TEX_REGIONS 64 24 #define VIA_LOG_MIN_TEX_REGION_SIZE 16 25 #endif 26 #define VIA_UPLOAD_TEX0IMAGE 0x1 27 #define VIA_UPLOAD_TEX1IMAGE 0x2 28 #define VIA_UPLOAD_CTX 0x4 29 #define VIA_UPLOAD_BUFFERS 0x8 30 #define VIA_UPLOAD_TEX0 0x10 31 #define VIA_UPLOAD_TEX1 0x20 32 #define VIA_UPLOAD_CLIPRECTS 0x40 33 #define VIA_UPLOAD_ALL 0xff 34 #define DRM_VIA_ALLOCMEM 0x00 35 #define DRM_VIA_FREEMEM 0x01 36 #define DRM_VIA_AGP_INIT 0x02 37 #define DRM_VIA_FB_INIT 0x03 38 #define DRM_VIA_MAP_INIT 0x04 39 #define DRM_VIA_DEC_FUTEX 0x05 40 #define NOT_USED 41 #define DRM_VIA_DMA_INIT 0x07 42 #define DRM_VIA_CMDBUFFER 0x08 43 #define DRM_VIA_FLUSH 0x09 44 #define DRM_VIA_PCICMD 0x0a 45 #define DRM_VIA_CMDBUF_SIZE 0x0b 46 #define NOT_USED 47 #define DRM_VIA_WAIT_IRQ 0x0d 48 #define DRM_VIA_DMA_BLIT 0x0e 49 #define DRM_VIA_BLIT_SYNC 0x0f 50 #define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t) 51 #define DRM_IOCTL_VIA_FREEMEM DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t) 52 #define DRM_IOCTL_VIA_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_AGP_INIT, drm_via_agp_t) 53 #define DRM_IOCTL_VIA_FB_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t) 54 #define DRM_IOCTL_VIA_MAP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t) 55 #define DRM_IOCTL_VIA_DEC_FUTEX DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t) 56 #define DRM_IOCTL_VIA_DMA_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t) 57 #define DRM_IOCTL_VIA_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t) 58 #define DRM_IOCTL_VIA_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_VIA_FLUSH) 59 #define DRM_IOCTL_VIA_PCICMD DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_PCICMD, drm_via_cmdbuffer_t) 60 #define DRM_IOCTL_VIA_CMDBUF_SIZE DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_CMDBUF_SIZE, \ 61 drm_via_cmdbuf_size_t) 62 #define DRM_IOCTL_VIA_WAIT_IRQ DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_WAIT_IRQ, drm_via_irqwait_t) 63 #define DRM_IOCTL_VIA_DMA_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_DMA_BLIT, drm_via_dmablit_t) 64 #define DRM_IOCTL_VIA_BLIT_SYNC DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_BLIT_SYNC, drm_via_blitsync_t) 65 #define VIA_TEX_SETUP_SIZE 8 66 #define VIA_FRONT 0x1 67 #define VIA_BACK 0x2 68 #define VIA_DEPTH 0x4 69 #define VIA_STENCIL 0x8 70 #define VIA_MEM_VIDEO 0 71 #define VIA_MEM_AGP 1 72 #define VIA_MEM_SYSTEM 2 73 #define VIA_MEM_MIXED 3 74 #define VIA_MEM_UNKNOWN 4 75 typedef struct { 76 __u32 offset; 77 __u32 size; 78 } drm_via_agp_t; 79 typedef struct { 80 __u32 offset; 81 __u32 size; 82 } drm_via_fb_t; 83 typedef struct { 84 __u32 context; 85 __u32 type; 86 __u32 size; 87 unsigned long index; 88 unsigned long offset; 89 } drm_via_mem_t; 90 typedef struct _drm_via_init { 91 enum { 92 VIA_INIT_MAP = 0x01, 93 VIA_CLEANUP_MAP = 0x02 94 } func; 95 unsigned long sarea_priv_offset; 96 unsigned long fb_offset; 97 unsigned long mmio_offset; 98 unsigned long agpAddr; 99 } drm_via_init_t; 100 typedef struct _drm_via_futex { 101 enum { 102 VIA_FUTEX_WAIT = 0x00, 103 VIA_FUTEX_WAKE = 0X01 104 } func; 105 __u32 ms; 106 __u32 lock; 107 __u32 val; 108 } drm_via_futex_t; 109 typedef struct _drm_via_dma_init { 110 enum { 111 VIA_INIT_DMA = 0x01, 112 VIA_CLEANUP_DMA = 0x02, 113 VIA_DMA_INITIALIZED = 0x03 114 } func; 115 unsigned long offset; 116 unsigned long size; 117 unsigned long reg_pause_addr; 118 } drm_via_dma_init_t; 119 typedef struct _drm_via_cmdbuffer { 120 char __user *buf; 121 unsigned long size; 122 } drm_via_cmdbuffer_t; 123 typedef struct _drm_via_tex_region { 124 unsigned char next, prev; 125 unsigned char inUse; 126 int age; 127 } drm_via_tex_region_t; 128 typedef struct _drm_via_sarea { 129 unsigned int dirty; 130 unsigned int nbox; 131 struct drm_clip_rect boxes[VIA_NR_SAREA_CLIPRECTS]; 132 drm_via_tex_region_t texList[VIA_NR_TEX_REGIONS + 1]; 133 int texAge; 134 int ctxOwner; 135 int vertexPrim; 136 137 char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)]; 138 unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS]; 139 unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS]; 140 unsigned int XvMCCtxNoGrabbed; 141 142 unsigned int pfCurrentOffset; 143 } drm_via_sarea_t; 144 typedef struct _drm_via_cmdbuf_size { 145 enum { 146 VIA_CMDBUF_SPACE = 0x01, 147 VIA_CMDBUF_LAG = 0x02 148 } func; 149 int wait; 150 __u32 size; 151 } drm_via_cmdbuf_size_t; 152 typedef enum { 153 VIA_IRQ_ABSOLUTE = 0x0, 154 VIA_IRQ_RELATIVE = 0x1, 155 VIA_IRQ_SIGNAL = 0x10000000, 156 VIA_IRQ_FORCE_SEQUENCE = 0x20000000 157 } via_irq_seq_type_t; 158 #define VIA_IRQ_FLAGS_MASK 0xF0000000 159 enum drm_via_irqs { 160 drm_via_irq_hqv0 = 0, 161 drm_via_irq_hqv1, 162 drm_via_irq_dma0_dd, 163 drm_via_irq_dma0_td, 164 drm_via_irq_dma1_dd, 165 drm_via_irq_dma1_td, 166 drm_via_irq_num 167 }; 168 struct drm_via_wait_irq_request { 169 unsigned irq; 170 via_irq_seq_type_t type; 171 __u32 sequence; 172 __u32 signal; 173 }; 174 typedef union drm_via_irqwait { 175 struct drm_via_wait_irq_request request; 176 struct drm_wait_vblank_reply reply; 177 } drm_via_irqwait_t; 178 typedef struct drm_via_blitsync { 179 __u32 sync_handle; 180 unsigned engine; 181 } drm_via_blitsync_t; 182 typedef struct drm_via_dmablit { 183 __u32 num_lines; 184 __u32 line_length; 185 __u32 fb_addr; 186 __u32 fb_stride; 187 unsigned char *mem_addr; 188 __u32 mem_stride; 189 __u32 flags; 190 int to_fb; 191 drm_via_blitsync_t sync; 192 } drm_via_dmablit_t; 193 #if defined(__cplusplus) 194 } 195 #endif 196 #endif 197