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1/*
2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice, this list of
9 *    conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright notice, this list
12 *    of conditions and the following disclaimer in the documentation and/or other materials
13 *    provided with the distribution.
14 *
15 * 3. Neither the name of the copyright holder nor the names of its contributors may be used
16 *    to endorse or promote products derived from this software without specific prior written
17 *    permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32    .equ OS_PSR_INT_DIS,    0xC0
33    .equ OS_PSR_FIQ_DIS,    0x40
34    .equ OS_PSR_IRQ_DIS,    0x80
35    .equ OS_PSR_MODE_MASK,  0x1F
36    .equ OS_PSR_MODE_USR,   0x10
37    .equ OS_PSR_MODE_FIQ,   0x11
38    .equ OS_PSR_MODE_IRQ,   0x12
39    .equ OS_PSR_MODE_SVC,   0x13
40    .equ OS_PSR_MODE_ABT,   0x17
41    .equ OS_PSR_MODE_UND,   0x1B
42    .equ OS_PSR_MODE_SYS,   0x1F
43
44    .equ OS_EXCEPT_RESET,           0x00
45    .equ OS_EXCEPT_UNDEF_INSTR,     0x01
46    .equ OS_EXCEPT_SWI,             0x02
47    .equ OS_EXCEPT_PREFETCH_ABORT,  0x03
48    .equ OS_EXCEPT_DATA_ABORT,      0x04
49    .equ OS_EXCEPT_FIQ,             0x05
50    .equ OS_EXCEPT_ADDR_ABORT,      0x06
51    .equ OS_EXCEPT_IRQ,             0x07
52
53    .global HalExceptAddrAbortHdl
54    .global HalExceptDataAbortHdl
55    .global HalExceptPrefetchAbortHdl
56    .global HalExceptUndefInstrHdl
57
58    .extern HalExcHandleEntry
59    .extern __exc_stack_top
60
61    .code 32
62    .text
63
64HalExceptUndefInstrHdl:
65    STMFD   SP!, {R0-R5}
66    MOV     R0, #OS_EXCEPT_UNDEF_INSTR
67    B       _osExceptDispatch
68
69HalExceptPrefetchAbortHdl:
70    SUB     LR, LR, #4
71    STMFD   SP!, {R0-R5}
72
73    MOV     R0, #OS_EXCEPT_PREFETCH_ABORT
74
75    B       _osExceptDispatch
76
77HalExceptDataAbortHdl:
78    SUB     LR, LR, #4
79    STMFD   SP!, {R0-R5}
80
81    MOV     R0, #OS_EXCEPT_DATA_ABORT
82
83    B       _osExceptDispatch
84
85HalExceptAddrAbortHdl:
86    SUB     LR, LR, #8
87    STMFD   SP!, {R0-R5}
88
89    MOV     R0, #OS_EXCEPT_ADDR_ABORT
90
91    B       _osExceptDispatch
92
93_osExceptDispatch:
94    MRS     R1, SPSR
95    MOV     R2, LR
96    MOV     R4, SP
97    ADD     SP, SP, #(6 * 4)
98
99    MSR     CPSR_c, #(OS_PSR_INT_DIS | OS_PSR_MODE_SVC)
100    MOV     R3, SP
101    LDR     SP, =__exc_stack_top
102
103    STMFD   SP!, {R2}
104    STMFD   SP!, {LR}
105    STMFD   SP!, {R3}
106    STMFD   SP!, {R6-R12}
107    LDMFD   R4!, {R6-R12}
108    STMFD   SP!, {R6-R11}
109    STMFD   SP!, {R1}
110    MOV     R3, SP
111
112_osExceptionGetSP:
113    STMFD   SP!, {R1}
114    LDR     R2, =HalExcHandleEntry
115
116    MOV     LR, PC
117    BX      R2
118
119    LDMFD   SP!, {R1}
120    MOV     SP, R1
121
122    LDMFD   SP!, {R1}
123    MSR     CPSR, R1
124    LDMFD   SP!, {R0-R12}
125    ADD     SP, SP, #(4 * 2)
126    LDMFD   SP!, {LR}
127    SUB     SP, SP, #(4 * 3)
128    LDMFD   SP, {SP}
129    ADD     LR, LR, #4
130    MOV     PC, LR
131
132    .end
133