1template = """\ 2/* Copyright (C) 2015 Broadcom 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24#ifndef _NIR_BUILDER_OPCODES_ 25#define _NIR_BUILDER_OPCODES_ 26 27<% 28def src_decl_list(num_srcs): 29 return ', '.join('nir_ssa_def *src' + str(i) for i in range(num_srcs)) 30 31def src_list(num_srcs): 32 return ', '.join('src' + str(i) for i in range(num_srcs)) 33 34def needs_num_components(opcode): 35 return "replicated" in opcode.name 36%> 37 38% for name, opcode in sorted(opcodes.items()): 39% if not needs_num_components(opcode): 40static inline nir_ssa_def * 41nir_${name}(nir_builder *build, ${src_decl_list(opcode.num_inputs)}) 42{ 43% if opcode.num_inputs <= 4: 44 return nir_build_alu${opcode.num_inputs}(build, nir_op_${name}, ${src_list(opcode.num_inputs)}); 45% else: 46 nir_ssa_def *srcs[${opcode.num_inputs}] = {${src_list(opcode.num_inputs)}}; 47 return nir_build_alu_src_arr(build, nir_op_${name}, srcs); 48% endif 49} 50% endif 51% endfor 52 53% for name, opcode in sorted(INTR_OPCODES.items()): 54struct _nir_${name}_indices { 55 int _; /* exists to avoid empty initializers */ 56% for index in opcode.indices: 57 ${index.c_data_type} ${index.name}; 58% endfor 59}; 60% endfor 61 62<% 63def intrinsic_decl_list(opcode): 64 need_components = opcode.dest_components == 0 and \ 65 0 not in opcode.src_components 66 67 res = '' 68 if (opcode.has_dest or opcode.num_srcs) and need_components: 69 res += ', unsigned num_components' 70 if opcode.has_dest and len(opcode.bit_sizes) != 1 and opcode.bit_size_src == -1: 71 res += ', unsigned bit_size' 72 for i in range(opcode.num_srcs): 73 res += ', nir_ssa_def *src' + str(i) 74 if opcode.indices: 75 res += ', struct _nir_' + opcode.name + '_indices indices' 76 return res 77 78def intrinsic_macro_list(opcode): 79 need_components = opcode.dest_components == 0 and \ 80 0 not in opcode.src_components 81 82 res = '' 83 if (opcode.has_dest or opcode.num_srcs) and need_components: 84 res += ', num_components' 85 if opcode.has_dest and len(opcode.bit_sizes) != 1 and opcode.bit_size_src == -1: 86 res += ', bit_size' 87 for i in range(opcode.num_srcs): 88 res += ', src' + str(i) 89 return res 90 91def get_intrinsic_bitsize(opcode): 92 if len(opcode.bit_sizes) == 1: 93 return str(opcode.bit_sizes[0]) 94 elif opcode.bit_size_src != -1: 95 return 'src' + str(opcode.bit_size_src) + '->bit_size' 96 else: 97 return 'bit_size' 98%> 99 100% for name, opcode in sorted(INTR_OPCODES.items()): 101% if opcode.has_dest: 102static inline nir_ssa_def * 103% else: 104static inline nir_intrinsic_instr * 105% endif 106_nir_build_${name}(nir_builder *build${intrinsic_decl_list(opcode)}) 107{ 108 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create( 109 build->shader, nir_intrinsic_${name}); 110 111 % if 0 in opcode.src_components: 112 intrin->num_components = src${opcode.src_components.index(0)}->num_components; 113 % elif opcode.dest_components == 0: 114 intrin->num_components = num_components; 115 % endif 116 % if opcode.has_dest: 117 % if opcode.dest_components == 0: 118 nir_ssa_dest_init(&intrin->instr, &intrin->dest, intrin->num_components, ${get_intrinsic_bitsize(opcode)}, NULL); 119 % else: 120 nir_ssa_dest_init(&intrin->instr, &intrin->dest, ${opcode.dest_components}, ${get_intrinsic_bitsize(opcode)}, NULL); 121 % endif 122 % endif 123 % for i in range(opcode.num_srcs): 124 intrin->src[${i}] = nir_src_for_ssa(src${i}); 125 % endfor 126 % if WRITE_MASK in opcode.indices and 0 in opcode.src_components: 127 if (!indices.write_mask) 128 indices.write_mask = BITFIELD_MASK(intrin->num_components); 129 % endif 130 % if ALIGN_MUL in opcode.indices and 0 in opcode.src_components: 131 if (!indices.align_mul) 132 indices.align_mul = src${opcode.src_components.index(0)}->bit_size / 8u; 133 % elif ALIGN_MUL in opcode.indices and opcode.dest_components == 0: 134 if (!indices.align_mul) 135 indices.align_mul = intrin->dest.ssa.bit_size / 8u; 136 % endif 137 % for index in opcode.indices: 138 nir_intrinsic_set_${index.name}(intrin, indices.${index.name}); 139 % endfor 140 141 nir_builder_instr_insert(build, &intrin->instr); 142 % if opcode.has_dest: 143 return &intrin->dest.ssa; 144 % else: 145 return intrin; 146 % endif 147} 148% endfor 149 150% for name, opcode in sorted(INTR_OPCODES.items()): 151% if opcode.indices: 152#ifdef __cplusplus 153#define nir_build_${name}(build${intrinsic_macro_list(opcode)}, ...) ${'\\\\'} 154_nir_build_${name}(build${intrinsic_macro_list(opcode)}, _nir_${name}_indices{0, __VA_ARGS__}) 155#else 156#define nir_build_${name}(build${intrinsic_macro_list(opcode)}, ...) ${'\\\\'} 157_nir_build_${name}(build${intrinsic_macro_list(opcode)}, (struct _nir_${name}_indices){0, __VA_ARGS__}) 158#endif 159% else: 160#define nir_build_${name} _nir_build_${name} 161% endif 162#define nir_${name} nir_build_${name} 163% endfor 164 165#endif /* _NIR_BUILDER_OPCODES_ */""" 166 167from nir_opcodes import opcodes 168from nir_intrinsics import INTR_OPCODES, WRITE_MASK, ALIGN_MUL 169from mako.template import Template 170 171print(Template(template).render(opcodes=opcodes, INTR_OPCODES=INTR_OPCODES, WRITE_MASK=WRITE_MASK, ALIGN_MUL=ALIGN_MUL)) 172