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1;*!
2;* \copy
3;*     Copyright (c)  2009-2013, Cisco Systems
4;*     All rights reserved.
5;*
6;*     Redistribution and use in source and binary forms, with or without
7;*     modification, are permitted provided that the following conditions
8;*     are met:
9;*
10;*        * Redistributions of source code must retain the above copyright
11;*          notice, this list of conditions and the following disclaimer.
12;*
13;*        * Redistributions in binary form must reproduce the above copyright
14;*          notice, this list of conditions and the following disclaimer in
15;*          the documentation and/or other materials provided with the
16;*          distribution.
17;*
18;*     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19;*     "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20;*     LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
21;*     FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
22;*     COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
23;*     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
24;*     BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25;*     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
26;*     CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27;*     LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
28;*     ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29;*     POSSIBILITY OF SUCH DAMAGE.
30;*
31;*
32;*  cpu_mmx.asm
33;*
34;*  Abstract
35;*      verify cpuid feature support and cpuid detection
36;*
37;*  History
38;*      04/29/2009  Created
39;*
40;*************************************************************************/
41
42%include "asm_inc.asm"
43
44;******************************************************************************************
45; Macros
46;******************************************************************************************
47
48
49;******************************************************************************************
50; Code
51;******************************************************************************************
52
53SECTION .text
54
55; refer to "The IA-32 Intel(R) Architecture Software Developers Manual, Volume 2A A-M"
56; section CPUID - CPU Identification
57
58;******************************************************************************************
59;   int32_t WelsCPUIdVerify()
60;******************************************************************************************
61WELS_EXTERN WelsCPUIdVerify
62    push    r1
63    PUSHRFLAGS
64    PUSHRFLAGS
65
66    pop      r1
67    mov      eax, r1d
68    xor      eax, 00200000h
69    xor      eax, r1d
70    POPRFLAGS
71    pop      r1
72    ret
73
74;****************************************************************************************************
75;   void WelsCPUId( int32_t uiIndex, int32_t *pFeatureA, int32_t *pFeatureB, int32_t *pFeatureC, int32_t *pFeatureD )
76;****************************************************************************************************
77%ifdef       WIN64
78
79WELS_EXTERN WelsCPUId
80    push     rbx
81    push     rdx
82
83    mov      eax,     ecx
84    mov      ecx,     [r9]
85    cpuid
86    mov      [r9],    ecx
87    mov      [r8],    ebx
88    mov      rcx,    [rsp + 2*8 + 40]
89    mov      [rcx],   edx
90    pop      rdx
91    mov      [rdx],   eax
92
93    pop      rbx
94    ret
95
96%elifdef     UNIX64
97WELS_EXTERN WelsCPUId
98    push     rbx
99    push     rcx
100    push     rdx
101
102    mov      eax,     edi
103    mov      ecx,     [rcx]
104    cpuid
105    mov      [r8],    edx
106    pop      rdx
107    pop      r8
108    mov      [r8],   ecx
109    mov      [rdx],   ebx
110    mov      [rsi],   eax
111
112    pop      rbx
113    ret
114
115%elifdef     X86_32
116
117WELS_EXTERN WelsCPUId
118    push    ebx
119    push    edi
120
121    mov     eax, [esp+12]   ; operating index
122    mov     edi, [esp+24]
123    mov     ecx, [edi]
124    cpuid                   ; cpuid
125
126    ; processing various information return
127    mov     edi, [esp+16]
128    mov     [edi], eax
129    mov     edi, [esp+20]
130    mov     [edi], ebx
131    mov     edi, [esp+24]
132    mov     [edi], ecx
133    mov     edi, [esp+28]
134    mov     [edi], edx
135
136    pop     edi
137    pop     ebx
138    ret
139
140%endif
141
142; need call after cpuid=1 and eax, ecx flag got then
143;****************************************************************************************************
144;   int32_t WelsCPUSupportAVX( uint32_t eax, uint32_t ecx )
145;****************************************************************************************************
146WELS_EXTERN WelsCPUSupportAVX
147%ifdef     WIN64
148    mov   eax,    ecx
149    mov   ecx,    edx
150%elifdef   UNIX64
151    mov eax, edi
152    mov ecx, esi
153%else
154    mov eax, [esp+4]
155    mov ecx, [esp+8]
156%endif
157
158    ; refer to detection of AVX addressed in INTEL AVX manual document
159    and ecx, 018000000H
160    cmp ecx, 018000000H             ; check both OSXSAVE and AVX feature flags
161    jne avx_not_supported
162    ; processor supports AVX instructions and XGETBV is enabled by OS
163    mov ecx, 0                              ; specify 0 for XFEATURE_ENABLED_MASK register
164    XGETBV                                  ; result in EDX:EAX
165    and eax, 06H
166    cmp eax, 06H                    ; check OS has enabled both XMM and YMM state support
167    jne avx_not_supported
168    mov eax, 1
169    ret
170avx_not_supported:
171    mov eax, 0
172    ret
173
174
175; need call after cpuid=1 and eax, ecx flag got then
176;****************************************************************************************************
177;   int32_t WelsCPUSupportFMA( uint32_t eax, uint32_t ecx )
178;****************************************************************************************************
179WELS_EXTERN WelsCPUSupportFMA
180%ifdef     WIN64
181    mov   eax,   ecx
182    mov   ecx,   edx
183%elifdef   UNIX64
184    mov   eax,   edi
185    mov   ecx,   esi
186%else
187    mov eax, [esp+4]
188    mov ecx, [esp+8]
189%endif
190    ; refer to detection of FMA addressed in INTEL AVX manual document
191    and ecx, 018001000H
192    cmp ecx, 018001000H     ; check OSXSAVE, AVX, FMA feature flags
193    jne fma_not_supported
194    ; processor supports AVX,FMA instructions and XGETBV is enabled by OS
195    mov ecx, 0              ; specify 0 for XFEATURE_ENABLED_MASK register
196    XGETBV                  ; result in EDX:EAX
197    and eax, 06H
198    cmp eax, 06H            ; check OS has enabled both XMM and YMM state support
199    jne fma_not_supported
200    mov eax, 1
201    ret
202fma_not_supported:
203    mov eax, 0
204    ret
205
206;******************************************************************************************
207;   void WelsEmms()
208;******************************************************************************************
209WELS_EXTERN WelsEmms
210    emms    ; empty mmx technology states
211    ret
212
213;*****************************************************************************
214;   int32_t WelsCPUDetectAVX512()
215;*****************************************************************************
216WELS_EXTERN WelsCPUDetectAVX512
217%ifdef    X86_32
218    push ebx
219%else
220    push rbx
221%endif
222
223    mov eax, 1
224    mov ecx, 0
225    cpuid
226    and ecx, 0x08000000
227    cmp ecx, 0x08000000            ; check CPUID.1:ECX.OSXSAVE[bit 27]
228    jne avx512_not_supported
229
230    ; check XMM/YMM/zmm/opmask state
231    mov ecx, 0
232    XGETBV                         ; result in EDX:EAX
233    and eax, 0x0D6
234    cmp eax, 0x0D6
235    jne avx512_not_supported
236
237    ; check AVX512 flag CPUID.7:EBX.AVX512F[bit 16]
238    ; EBX[bit 16]: AVX512F
239    ; EBX[bit 28]: AVX512CD
240    ; EBX[bit 17]: AVX512DQ
241    ; EBX[bit 30]: AVX512BW
242    ; EBX[bit 31]: AVX512VL
243    mov eax, 7
244    cpuid
245    and ebx, 0xC0030000
246    mov eax, ebx
247
248%ifdef    X86_32
249    pop ebx
250%else
251    pop rbx
252%endif
253    ret
254
255avx512_not_supported:
256    mov eax, 0
257%ifdef    X86_32
258    pop ebx
259%else
260    pop rbx
261%endif
262    ret
263
264