1root { 2 platform { 3 template dai_controller { 4 match_attr = ""; 5 serviceName = ""; 6 } 7 controller_0x120c1020 :: dai_controller { 8 match_attr = "hdf_dai_driver"; 9 serviceName = "dai_service"; 10 11 idInfo { 12 chipName = "hi3516"; 13 chipIdRegister = 0x113b0000; 14 chipIdSize = 0x10000; 15 } 16 17 regConfig { 18 19 /* reg: register address 20 rreg: register address 21 shift: shift bits 22 rshift: rshift bits 23 min: min value 24 max: max value 25 mask: mask of value 26 invert: enum InvertVal 0-uninvert 1-invert 27 value: value 28 29 reg, rreg, shift, value, min, max, mask, invert value 30 */ 31 ctrlParamsSeqConfig = [ 32 0x48, 0x48, 0, 0, 0x0, 0x2, 0x3, 0, 0, // tfa9879 codec enable 33 0x48, 0x48, 0, 0, 0x0, 0x2, 0x3, 0, 0 // hi3516 codec enable 34 ]; 35 36 controlsConfig = [ 37 /* 38 "External Codec Enable", 39 "Internally Codec Enable", 40 */ 41 /* array index, iface, mixer/mux, enable */ 42 6, 2, 0, 1, 43 7, 2, 0, 1 44 ]; 45 46 daiStartupSeqConfig = [ 47 0x0100, 0x0100, 0, 0, 0, 0xFFFFFFFF, 0xFFFFFFFF, 0, 0x152ef0, // AIP_I2S_REG_CFG0 48 0x0104, 0x0104, 0, 0, 0, 0xFFFFFFFF, 0xFFFFFFFF, 0, 0x0000c115, // AIP_I2S_REG_CFG1 49 0x0140, 0x0140, 0, 0, 0, 0xFFFFFFFF, 0xFFFFFFFF, 0, 0x152ef0, // AOP_I2S_REG_CFG0 50 0x0144, 0x0144, 0, 0, 0, 0xFFFFFFFF, 0xFFFFFFFF, 0, 0x0000c115, // AOP_I2S_REG_CFG1 51 0x1000, 0x1000, 16, 16, 0x0, 0x7, 0x7, 0, 0x01, // RX IF ATTRI 52 ]; 53 54 daiParamsSeqConfig = [ 55 0x0140, 0x0140, 0, 0, 0x0, 0x7FFFFFF, 0x7FFFFFF, 0, 0x0, // ao i2s_frequency 56 0x0144, 0x0144, 0, 0, 0x0, 0x7F, 0x7F, 0, 0x0, // ao i2s_frequency 57 0x2000, 0x2000, 2, 2, 0x0, 0x2, 0x3, 0, 0x0, // ao i2s_format 58 0x2000, 0x2000, 4, 4, 0x0, 0x1, 0x3, 0, 0x0, // ao i2s_channel 59 0x0100, 0x0100, 0, 0, 0x0, 0x7FFFFFF, 0x7FFFFFF, 0, 0x0, // ai i2s_frequency 60 0x0104, 0x0104, 0, 0, 0x0, 0x7F, 0x7F, 0, 0x0, // ai i2s_frequency 61 0x1000, 0x1000, 2, 2, 0x0, 0x2, 0x3, 0, 0x0, // ai i2s_format 62 0x1000, 0x1000, 4, 4, 0x0, 0x1, 0x3, 0, 0x0, // ai i2s_channel 63 ]; 64 65 } 66 } 67 } 68} 69