Lines Matching +full:0 +full:x30330000
54 #size-cells = <0>;
61 arm,psci-suspend-param = <0x0010000>;
69 cpu0: cpu@0 {
72 reg = <0>;
82 #clock-cells = <0>;
89 #clock-cells = <0>;
98 #phy-cells = <0>;
106 #phy-cells = <0>;
125 #size-cells = <0>;
127 port@0 {
128 reg = <0>;
169 reg = <0x30041000 0x1000>;
195 reg = <0x3007c000 0x1000>;
211 reg = <0x30083000 0x1000>;
217 #size-cells = <0>;
219 port@0 {
220 reg = <0>;
246 reg = <0x30084000 0x1000>;
269 reg = <0x30086000 0x1000>;
284 reg = <0x30087000 0x1000>;
303 reg = <0x31001000 0x1000>,
304 <0x31002000 0x2000>,
305 <0x31004000 0x2000>,
306 <0x31006000 0x2000>;
313 reg = <0x30000000 0x400000>;
318 reg = <0x30200000 0x10000>;
325 gpio-ranges = <&iomuxc_lpsr 0 0 8>, <&iomuxc 8 5 8>;
330 reg = <0x30210000 0x10000>;
337 gpio-ranges = <&iomuxc 0 13 32>;
342 reg = <0x30220000 0x10000>;
349 gpio-ranges = <&iomuxc 0 45 29>;
354 reg = <0x30230000 0x10000>;
361 gpio-ranges = <&iomuxc 0 74 24>;
366 reg = <0x30240000 0x10000>;
373 gpio-ranges = <&iomuxc 0 98 18>;
378 reg = <0x30250000 0x10000>;
385 gpio-ranges = <&iomuxc 0 116 23>;
390 reg = <0x30260000 0x10000>;
397 gpio-ranges = <&iomuxc 0 139 16>;
402 reg = <0x30280000 0x10000>;
409 reg = <0x30290000 0x10000>;
417 reg = <0x302a0000 0x10000>;
425 reg = <0x302b0000 0x10000>;
433 reg = <0x302c0000 0x10000>;
439 reg = <0x302d0000 0x10000>;
448 reg = <0x302e0000 0x10000>;
458 reg = <0x302f0000 0x10000>;
468 reg = <0x30300000 0x10000>;
478 reg = <0x30320000 0x10000>;
486 reg = <0x30330000 0x10000>;
493 reg = <0x30340000 0x10000>;
497 #mux-control-cells = <0>;
498 mux-reg-masks = <0x14 0x00000010>;
503 mux-controls = <&mux 0>;
505 #size-cells = <0>;
508 port@0 {
509 reg = <0>;
534 reg = <0x30350000 0x10000>;
538 reg = <0x3c 0x4>;
542 reg = <0x10 0x4>;
549 reg = <0x30360000 0x10000>;
558 anatop-reg-offset = <0x210>;
564 anatop-enable-bit = <0>;
572 anatop-reg-offset = <0x220>;
575 anatop-min-bit-val = <0x14>;
578 anatop-enable-bit = <0>;
593 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
594 reg = <0x30370000 0x10000>;
597 compatible = "fsl,sec-v4.0-mon-rtc-lp";
599 offset = <0x34>;
607 compatible = "fsl,sec-v4.0-pwrkey";
620 reg = <0x30380000 0x10000>;
630 reg = <0x30390000 0x10000>;
637 reg = <0x303a0000 0x10000>;
646 #size-cells = <0>;
648 pgc_mipi_phy: power-domain@0 {
649 #power-domain-cells = <0>;
650 reg = <0>;
655 #power-domain-cells = <0>;
661 #power-domain-cells = <0>;
673 reg = <0x30400000 0x400000>;
678 reg = <0x30610000 0x10000>;
688 reg = <0x30620000 0x10000>;
698 #size-cells = <0>;
700 reg = <0x30630000 0x10000>;
710 reg = <0x30660000 0x10000>;
721 reg = <0x30670000 0x10000>;
732 reg = <0x30680000 0x10000>;
743 reg = <0x30690000 0x10000>;
754 reg = <0x30710000 0x10000>;
771 reg = <0x30730000 0x10000>;
781 reg = <0x30750000 0x10000>;
783 #size-cells = <0>;
795 port@0 {
796 reg = <0>;
813 reg = <0x30800000 0x400000>;
820 reg = <0x30800000 0x100000>;
825 #size-cells = <0>;
827 reg = <0x30820000 0x10000>;
837 #size-cells = <0>;
839 reg = <0x30830000 0x10000>;
849 #size-cells = <0>;
851 reg = <0x30840000 0x10000>;
862 reg = <0x30860000 0x10000>;
873 reg = <0x30890000 0x10000>;
884 reg = <0x30880000 0x10000>;
893 #sound-dai-cells = <0>;
895 reg = <0x308a0000 0x10000>;
903 dmas = <&sdma 8 24 0>, <&sdma 9 24 0>;
908 #sound-dai-cells = <0>;
910 reg = <0x308b0000 0x10000>;
918 dmas = <&sdma 10 24 0>, <&sdma 11 24 0>;
923 #sound-dai-cells = <0>;
925 reg = <0x308c0000 0x10000>;
933 dmas = <&sdma 12 24 0>, <&sdma 13 24 0>;
939 compatible = "fsl,sec-v4.0";
942 reg = <0x30900000 0x40000>;
943 ranges = <0 0x30900000 0x40000>;
950 compatible = "fsl,sec-v4.0-job-ring";
951 reg = <0x1000 0x1000>;
956 compatible = "fsl,sec-v4.0-job-ring";
957 reg = <0x2000 0x1000>;
962 compatible = "fsl,sec-v4.0-job-ring";
963 reg = <0x3000 0x1000>;
970 reg = <0x30a00000 0x10000>;
975 fsl,stop-mode = <&gpr 0x10 1 0x10 17>;
981 reg = <0x30a10000 0x10000>;
986 fsl,stop-mode = <&gpr 0x10 2 0x10 18>;
992 #size-cells = <0>;
994 reg = <0x30a20000 0x10000>;
1002 #size-cells = <0>;
1004 reg = <0x30a30000 0x10000>;
1012 #size-cells = <0>;
1014 reg = <0x30a40000 0x10000>;
1022 #size-cells = <0>;
1024 reg = <0x30a50000 0x10000>;
1033 reg = <0x30a60000 0x10000>;
1044 reg = <0x30a70000 0x10000>;
1055 reg = <0x30a80000 0x10000>;
1066 reg = <0x30a90000 0x10000>;
1076 reg = <0x30aa0000 0x10000>;
1085 reg = <0x30ab0000 0x10000>;
1095 reg = <0x30b10000 0x200>;
1099 fsl,usbmisc = <&usbmisc1 0>;
1106 reg = <0x30b30000 0x200>;
1110 fsl,usbmisc = <&usbmisc3 0>;
1120 reg = <0x30b10200 0x200>;
1126 reg = <0x30b30200 0x200>;
1131 reg = <0x30b40000 0x10000>;
1143 reg = <0x30b50000 0x10000>;
1155 reg = <0x30b60000 0x10000>;
1167 reg = <0x30bb0000 0x10000>, <0x60000000 0x10000000>;
1170 #size-cells = <0>;
1180 reg = <0x30bd0000 0x10000>;
1191 reg = <0x30be0000 0x10000>;
1206 fsl,stop-mode = <&gpr 0x10 3>;
1213 reg = <0x33000000 0x2000>;
1228 reg = <0x33002000 0x2000>, <0x33004000 0x4000>;
1235 dmas = <&dma_apbh 0>;