Lines Matching +full:0 +full:xe6150000

19 		#size-cells = <0>;
21 		a76_0: cpu@0 {
23 			reg = <0>;
29 		L3_CA76_0: cache-controller-0 {
39 		#clock-cells = <0>;
41 		clock-frequency = <0>;
46 		#clock-cells = <0>;
48 		clock-frequency = <0>;
59 		#clock-cells = <0>;
60 		clock-frequency = <0>;
72 			reg = <0 0xe6150000 0 0x4000>;
76 			#power-domain-cells = <0>;
82 			reg = <0 0xe6160000 0 0x4000>;
87 			reg = <0 0xe6180000 0 0x4000>;
94 			reg = <0 0xe6e60000 0 64>;
108 			#address-cells = <0>;
110 			reg = <0x0 0xf1000000 0 0x20000>,
111 			      <0x0 0xf1060000 0 0x110000>;
118 			reg = <0 0xfff00044 0 4>;