Searched +full:a +full:- +full:ilm (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.010 workarounds will cause a slight decrease in performance on11 non-CN63XXP1 hardware, so it is recommended to select "n"19 CVMSEG LM is a segment that accesses portions of the dcache as a73 This driver is a module to measure interrupt latency using the76 To compile this driver as a module, choose M here. The module77 will be called octeon-ilm
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/pinctrl/allwinner,sun4i-a10-pinctrl.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>14 "#gpio-cells":21 "#interrupt-cells":30 - allwinner,sun4i-a10-pinctrl31 - allwinner,sun5i-a10s-pinctrl[all …]
1 /* SPDX-License-Identifier: GPL-2.0 */2 // Copyright (C) 2005-2017 Andes Technology Corporation20 #define ICM_CFG_offISET 0 /* I-cache sets (# of cache lines) per way */21 #define ICM_CFG_offIWAY 3 /* I-cache ways */22 #define ICM_CFG_offISZ 6 /* I-cache line size */23 #define ICM_CFG_offILCK 9 /* I-cache locking support */24 #define ICM_CFG_offILMB 10 /* On-chip ILM banks */25 #define ICM_CFG_offBSAV 13 /* ILM base register alignment version */38 #define DCM_CFG_offDSET 0 /* D-cache sets (# of cache lines) per way */39 #define DCM_CFG_offDWAY 3 /* D-cache ways */[all …]