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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dmrvl,intc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/mrvl,intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell MMP/Orion Interrupt controller bindings
10 - Thomas Gleixner <tglx@linutronix.de>
11 - Jason Cooper <jason@lakedaemon.net>
12 - Marc Zyngier <maz@kernel.org>
13 - Rob Herring <robh+dt@kernel.org>
16 - if:
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Dmarvell,orion-intc.txt1 Marvell Orion SoC interrupt controllers
6 - compatible: shall be "marvell,orion-intc"
7 - reg: base address(es) of interrupt registers starting with CAUSE register
8 - interrupt-controller: identifies the node as an interrupt controller
9 - #interrupt-cells: number of cells to encode an interrupt source, shall be 1
13 - 0 maps to bit 0 of first base address,
14 - 1 maps to bit 1 of first base address,
15 - 32 maps to bit 0 of second base address, and so on.
18 intc: interrupt-controller {
19 compatible = "marvell,orion-intc";
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dorion5x.dtsi2 * Copyright (C) 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #address-cells = <1>;
13 #size-cells = <1>;
16 interrupt-parent = <&intc>;
23 #address-cells = <2>;
24 #size-cells = <1>;
27 devbus_bootcs: devbus-bootcs {
28 compatible = "marvell,orion-devbus";
31 #address-cells = <1>;
32 #size-cells = <1>;
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Ddove.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/gpio/gpio.h>
3 #include <dt-bindings/interrupt-controller/irq.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
12 interrupt-parent = <&intc>;
21 #address-cells = <1>;
22 #size-cells = <0>;
25 compatible = "marvell,pj4a", "marvell,sheeva-v7";
27 next-level-cache = <&l2>;
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Dkirkwood.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/gpio/gpio.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
11 interrupt-parent = <&intc>;
14 #address-cells = <1>;
15 #size-cells = <0>;
22 clock-names = "cpu_clk", "ddrclk", "powersave";
33 compatible = "marvell,kirkwood-mbus", "simple-bus";
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Dkirkwood-6282.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "marvell,kirkwood-pcie";
9 #address-cells = <3>;
10 #size-cells = <2>;
12 bus-range = <0x00 0xff>;
25 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
27 #address-cells = <3>;
28 #size-cells = <2>;
29 #interrupt-cells = <1>;
32 bus-range = <0x00 0xff>;
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Dkirkwood-6281.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "marvell,kirkwood-pcie";
9 #address-cells = <3>;
10 #size-cells = <2>;
12 bus-range = <0x00 0xff>;
21 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
23 #address-cells = <3>;
24 #size-cells = <2>;
25 #interrupt-cells = <1>;
28 bus-range = <0x00 0xff>;
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Dkirkwood-6192.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "marvell,kirkwood-pcie";
9 #address-cells = <3>;
10 #size-cells = <2>;
12 bus-range = <0x00 0xff>;
21 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
23 #address-cells = <3>;
24 #size-cells = <2>;
25 #interrupt-cells = <1>;
28 bus-range = <0x00 0xff>;
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/kernel/linux/linux-5.10/drivers/irqchip/
Dirq-orion.c2 * Marvell Orion SoCs IRQ chip driver.
21 * Orion SoC main interrupt controller
35 struct irq_domain_chip_generic *dgc = orion_irq_domain->gc; in orion_handle_irq()
38 for (n = 0; n < dgc->num_chips; n++, base += ORION_IRQS_PER_CHIP) { in orion_handle_irq()
41 u32 stat = readl_relaxed(gc->reg_base + ORION_IRQ_CAUSE) & in orion_handle_irq()
42 gc->mask_cache; in orion_handle_irq()
46 gc->irq_base + hwirq, regs); in orion_handle_irq()
70 ORION_IRQS_PER_CHIP, 1, np->full_name, in orion_irq_init()
82 if (!request_mem_region(r.start, resource_size(&r), np->name)) in orion_irq_init()
86 gc->reg_base = ioremap(r.start, resource_size(&r)); in orion_irq_init()
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_IRQCHIP) += irqchip.o
4 obj-$(CONFIG_AL_FIC) += irq-al-fic.o
5 obj-$(CONFIG_ALPINE_MSI) += irq-alpine-msi.o
6 obj-$(CONFIG_ATH79) += irq-ath79-cpu.o
7 obj-$(CONFIG_ATH79) += irq-ath79-misc.o
8 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
9 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o
10 obj-$(CONFIG_ARCH_ACTIONS) += irq-owl-sirq.o
11 obj-$(CONFIG_DAVINCI_AINTC) += irq-davinci-aintc.o
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/kernel/linux/linux-5.10/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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/kernel/linux/patches/linux-4.19/hispark_taurus_patch/
Dhispark_taurus.patch1 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
3 --- a/arch/arm/Kconfig
5 @@ -330,7 +330,7 @@ config ARCH_MULTIPLATFORM
9 - select AUTO_ZRELADDR
14 @@ -751,6 +751,8 @@ source "arch/arm/mach-highbank/Kconfig"
16 source "arch/arm/mach-hisi/Kconfig"
18 +source "arch/arm/mach-hibvt/Kconfig"
20 source "arch/arm/mach-imx/Kconfig"
22 source "arch/arm/mach-integrator/Kconfig"
23 diff --git a/arch/arm/Makefile b/arch/arm/Makefile
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