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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dsifive,plic-1.0.0.yaml5 $id: http://devicetree.org/schemas/interrupt-controller/sifive,plic-1.0.0.yaml#
8 title: SiFive Platform-Level Interrupt Controller (PLIC)
12 (PLIC) high-level specification in the RISC-V Privileged Architecture
13 specification. The PLIC connects all external interrupts in the system to all
25 with priority below this threshold will not cause the PLIC to raise its
28 While the PLIC supports both edge-triggered and level-triggered interrupts,
30 specified in the PLIC device-tree binding.
32 While the RISC-V ISA doesn't specify a memory layout for the PLIC, the
33 "sifive,plic-1.0.0" device is a concrete implementation of the PLIC that
45 - const: sifive,fu540-c000-plic
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Driscv,cpu-intc.txt16 via the platform-level interrupt controller (PLIC).
21 entry, though external interrupt controllers (like the PLIC, for example) will
23 a PLIC interrupt property will typically list the HLICs for all present HARTs
/kernel/linux/linux-5.10/drivers/irqchip/
Dirq-sifive-plic.c6 #define pr_fmt(fmt) "plic: " fmt
23 * This driver implements a version of the RISC-V PLIC with the actual layout
28 * The largest number supported by devices marked as 'sifive,plic-1.0.0', is
176 .name = "SiFive PLIC",
379 * We can have multiple PLIC instances so setup cpuhp state only in plic_init()
385 "irqchip/sifive/plic:starting", in plic_init()
401 IRQCHIP_DECLARE(sifive_plic, "sifive,plic-1.0.0", plic_init);
403 IRQCHIP_DECLARE(thead_c900_plic, "thead,c900-plic", plic_init); /* for firmware driver */
DKconfig533 This enables support for the PLIC chip found in SiFive (and
534 potentially other) RISC-V systems. The PLIC controls devices
537 interrupt sources are subordinate to the PLIC.
DMakefile102 obj-$(CONFIG_SIFIVE_PLIC) += irq-sifive-plic.o
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/
Dsifive,gpio.yaml58 interrupt-parent = <&plic>;
/kernel/linux/linux-5.10/arch/m68k/include/asm/
Dm5272sim.h110 #define MCF_IRQ_PLIP 75 /* PLIC 2Khz Periodic */
111 #define MCF_IRQ_PLIA 76 /* PLIC Asynchronous */
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pwm/
Dpwm-sifive.yaml66 interrupt-parent = <&plic>;
/kernel/linux/linux-5.10/arch/powerpc/include/asm/
Dpaca.h5 * There are some pointers defined that are utilized by PLIC.
72 struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/
Dspi-sifive.yaml76 interrupt-parent = <&plic>;
/kernel/linux/linux-5.10/arch/riscv/boot/dts/sifive/
Dfu540-c000.dtsi144 compatible = "sifive,plic-1.0.0";