| /kernel/linux/linux-5.10/arch/mips/mm/ |
| D | c-octeon.c | 181 c->icache.ways = 1 + ((config1 >> 16) & 7); in probe_octeon()
184 c->icache.sets * c->icache.ways * c->icache.linesz; in probe_octeon()
185 c->icache.waybit = ffs(icache_size / c->icache.ways) - 1; in probe_octeon()
191 c->dcache.ways = 64; in probe_octeon()
193 c->dcache.sets * c->dcache.ways * c->dcache.linesz; in probe_octeon()
194 c->dcache.waybit = ffs(dcache_size / c->dcache.ways) - 1; in probe_octeon()
201 c->icache.ways = 37; in probe_octeon()
203 icache_size = c->icache.sets * c->icache.ways * c->icache.linesz; in probe_octeon()
206 c->dcache.ways = 32; in probe_octeon()
208 dcache_size = c->dcache.sets * c->dcache.ways * c->dcache.linesz; in probe_octeon()
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| D | c-r4k.c | 266 unsigned long ws_end = current_cpu_data.icache.ways << in tx49_blast_icache32()
299 unsigned long ws_end = current_cpu_data.icache.ways << in tx49_blast_icache32_page_indexed()
1121 c->icache.ways = 2; in probe_pcache()
1126 c->dcache.ways = 2; in probe_pcache()
1135 c->icache.ways = 2; in probe_pcache()
1140 c->dcache.ways = 2; in probe_pcache()
1149 c->icache.ways = 4; in probe_pcache()
1154 c->dcache.ways = 4; in probe_pcache()
1169 c->icache.ways = 1; in probe_pcache()
1174 c->dcache.ways = 1; in probe_pcache()
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| D | c-tx39.c | 302 current_cpu_data.icache.ways = 1; in tx39_probe_cache()
303 current_cpu_data.dcache.ways = 1; in tx39_probe_cache()
308 current_cpu_data.icache.ways = 2; in tx39_probe_cache()
309 current_cpu_data.dcache.ways = 2; in tx39_probe_cache()
315 current_cpu_data.icache.ways = 1; in tx39_probe_cache()
316 current_cpu_data.dcache.ways = 1; in tx39_probe_cache()
383 (dcache_size / current_cpu_data.dcache.ways) - 1, in tx39_cache_init()
392 current_cpu_data.icache.waysize = icache_size / current_cpu_data.icache.ways; in tx39_cache_init()
393 current_cpu_data.dcache.waysize = dcache_size / current_cpu_data.dcache.ways; in tx39_cache_init()
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| D | sc-mips.c | 170 c->scache.ways = assoc + 1; in mips_sc_probe_cm3()
220 c->scache.ways = tmp + 1; in mips_sc_probe()
227 * According to config2 it would be 5-ways, but that is in mips_sc_probe()
232 c->scache.ways = 4; in mips_sc_probe()
236 * According to config2 it would be 5-ways and 512-sets, in mips_sc_probe()
242 c->scache.ways = 4; in mips_sc_probe()
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| D | sc-rm7k.c | 238 c->scache.ways = 4; in rm7k_sc_init()
239 c->scache.waybit= __ffs(scache_size / c->scache.ways); in rm7k_sc_init()
240 c->scache.waysize = scache_size / c->scache.ways; in rm7k_sc_init()
241 c->scache.sets = scache_size / (c->scache.linesz * c->scache.ways); in rm7k_sc_init()
268 c->tcache.ways = 1; in rm7k_sc_init()
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| /kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh4/ |
| D | probe.c | 38 boot_cpu_data.icache.ways = 1; in cpu_probe()
47 boot_cpu_data.dcache.ways = 1; in cpu_probe()
67 boot_cpu_data.icache.ways = 4; in cpu_probe()
68 boot_cpu_data.dcache.ways = 4; in cpu_probe()
171 boot_cpu_data.icache.ways = 2; in cpu_probe()
172 boot_cpu_data.dcache.ways = 2; in cpu_probe()
176 boot_cpu_data.icache.ways = 2; in cpu_probe()
177 boot_cpu_data.dcache.ways = 2; in cpu_probe()
192 boot_cpu_data.icache.ways = 2; in cpu_probe()
193 boot_cpu_data.dcache.ways = 2; in cpu_probe()
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | bcm2837.dtsi | 58 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
61 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
73 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
76 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
88 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
91 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
103 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
106 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
120 cache-sets = <512>; // 512KiB(size)/64(line-size)=8192ways/16-way set
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| /kernel/linux/linux-5.10/arch/sh/mm/ |
| D | cache-sh7705.c | 32 unsigned long ways, waysize, addrstart; in cache_wback_all() local
34 ways = current_cpu_data.dcache.ways; in cache_wback_all()
57 } while (--ways); in cache_wback_all()
81 unsigned long ways, waysize, addrstart; in __flush_dcache_page() local
102 ways = current_cpu_data.dcache.ways; in __flush_dcache_page()
124 } while (--ways); in __flush_dcache_page()
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| D | tlb-sh3.c | 58 int i, ways = MMU_NTLB_WAYS; in local_flush_tlb_one() local
71 ways = 1; /* we already know the way .. */ in local_flush_tlb_one()
74 for (i = 0; i < ways; i++) in local_flush_tlb_one()
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| D | cache-sh2a.c | 41 /* Set associative bit to hit all ways */ in sh2a_invalidate_line()
60 nr_ways = current_cpu_data.dcache.ways; in sh2a__flush_wback_region()
107 int nr_ways = current_cpu_data.dcache.ways; in sh2a__flush_purge_region()
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| /kernel/linux/linux-5.10/arch/mips/include/asm/octeon/ |
| D | cvmx-l2c.h | 188 * the cache 'ways' that a core can evict from.
197 * @mask: The partitioning of the ways expressed as a binary
204 * @note If any ways are blocked for all cores and the HW blocks, then
205 * those ways will never have any cache lines evicted from them.
207 * ways regardless of the partitioning.
215 * the cache 'ways' that a core can evict from.
223 * @mask: The partitioning of the ways expressed as a binary
230 * @note If any ways are blocked for all cores and the HW blocks, then
231 * those ways will never have any cache lines evicted from them.
233 * ways regardless of the partitioning.
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| /kernel/linux/linux-5.10/arch/arc/mm/ |
| D | tlb.c | 64 * map into same set, there would be contention for the 2 ways causing severe
68 * much higher associativity. u-D-TLB is 8 ways, u-I-TLB is 4 ways.
239 int num_tlb = mmu->sets * mmu->ways; in local_flush_tlb_all()
711 unsigned int ver:8, ways:4, sets:4, u_itlb:8, u_dtlb:8; in read_decode_mmu_bcr() member
713 unsigned int u_dtlb:8, u_itlb:8, sets:4, ways:4, ver:8; in read_decode_mmu_bcr()
719 unsigned int ver:8, ways:4, sets:4, res:3, sasid:1, pg_sz:4, in read_decode_mmu_bcr() member
723 ways:4, ver:8; in read_decode_mmu_bcr()
746 mmu->ways = 1 << mmu2->ways; in read_decode_mmu_bcr()
753 mmu->ways = 1 << mmu3->ways; in read_decode_mmu_bcr()
763 mmu->ways = mmu4->n_ways * 2; in read_decode_mmu_bcr()
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| /kernel/linux/linux-5.10/arch/sh/kernel/cpu/ |
| D | init.c | 126 unsigned long ways, waysize, addrstart; in cache_init() local
144 ways = 1; in cache_init()
147 ways = current_cpu_data.dcache.ways; in cache_init()
159 } while (--ways); in cache_init()
170 if (current_cpu_data.dcache.ways > 1) in cache_init()
200 CSHAPE((desc).way_size * (desc).ways, ilog2((desc).linesz), (desc).ways)
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| /kernel/linux/linux-5.10/arch/nds32/kernel/ |
| D | setup.c | 104 L1_cache_info[ICACHE].ways = CACHE_WAY(ICACHE); in dump_cpu_info()
108 L1_cache_info[ICACHE].ways * L1_cache_info[ICACHE].line_size * in dump_cpu_info()
111 L1_cache_info[ICACHE].sets, L1_cache_info[ICACHE].ways, in dump_cpu_info()
113 L1_cache_info[DCACHE].ways = CACHE_WAY(DCACHE); in dump_cpu_info()
117 L1_cache_info[DCACHE].ways * L1_cache_info[DCACHE].line_size * in dump_cpu_info()
120 L1_cache_info[DCACHE].sets, L1_cache_info[DCACHE].ways, in dump_cpu_info()
132 L1_cache_info[ICACHE].ways; in dump_cpu_info()
138 L1_cache_info[DCACHE].ways; in dump_cpu_info()
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| /kernel/linux/linux-5.10/drivers/soc/qcom/ |
| D | llcc-qcom.c | 57 * @bonus_ways: Bonus ways are additional ways to be used for any slice,
58 * if client ends up using more than reserved cache ways. Bonus
59 * ways are allocated only if they are not reserved for some
61 * @res_ways: Reserved ways for the cache slice, the reserved ways cannot
65 * @probe_target_ways: Determines what ways to probe for access hit. When
66 * configured to 1 only bonus and reserved ways are probed.
67 * When configured to 0 all ways in llcc are probed.
70 * then the ways assigned to this client are not flushed on power
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| /kernel/linux/linux-5.10/arch/powerpc/sysdev/ |
| D | fsl_85xx_l2ctlr.c | 63 unsigned char ways; in mpc85xx_l2ctlr_of_probe() local
84 ways = LOCK_WAYS_FULL * sram_params.sram_size / l2cache_size; in mpc85xx_l2ctlr_of_probe()
85 if (rem || (ways & (ways - 1))) { in mpc85xx_l2ctlr_of_probe()
112 switch (ways) { in mpc85xx_l2ctlr_of_probe()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/nios2/ |
| D | nios2.txt | 23 - altr,tlb-num-ways: Specifies the number of set-associativity ways in the TLB.
52 altr,tlb-num-ways = <16>;
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| /kernel/linux/linux-5.10/arch/arm/include/asm/ |
| D | shmparam.h | 6 * This should be the size of the virtually indexed cache/ways,
8 * every size/ways bytes.
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| /kernel/linux/linux-5.10/arch/nds32/include/asm/ |
| D | shmparam.h | 8 * This should be the size of the virtually indexed cache/ways,
9 * whichever is greater since the cache aliases every size/ways
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| /kernel/linux/linux-5.10/include/linux/soc/qcom/ |
| D | llcc-qcom.h | 45 * @ways_status_reg: Status register address to read the error ways
48 * @ways_mask: Mask value to get the error ways
50 * @ways_shift: Shift value to get the error ways
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| /kernel/linux/linux-5.10/arch/powerpc/kvm/ |
| D | e500_mmu.c | 42 if (unlikely(vcpu_e500->gtlb_nv[0] >= vcpu_e500->gtlb_params[0].ways)) in gtlb0_get_next_victim()
48 static int tlb0_set_base(gva_t addr, int sets, int ways) in tlb0_set_base() argument
53 set_base *= ways; in tlb0_set_base()
61 vcpu_e500->gtlb_params[0].ways); in gtlb0_set_base()
70 esel &= vcpu_e500->gtlb_params[0].ways - 1; in get_tlb_esel()
89 size = vcpu_e500->gtlb_params[0].ways; in kvmppc_e500_tlb_index()
358 esel &= vcpu_e500->gtlb_params[tlbsel].ways - 1; in kvmppc_e500_emul_tlbsx()
836 vcpu_e500->gtlb_params[0].ways = params.tlb_ways[0]; in kvm_vcpu_ioctl_config_tlb()
839 vcpu_e500->gtlb_params[1].ways = params.tlb_sizes[1]; in kvm_vcpu_ioctl_config_tlb()
876 vcpu->arch.tlbcfg[0] |= params[0].ways << TLBnCFG_ASSOC_SHIFT; in vcpu_mmu_init()
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| /kernel/linux/linux-5.10/arch/arm/mm/ |
| D | cache-l2x0.c | 42 static u32 l2x0_way_mask; /* Bitmask of active ways */
784 unsigned way_size_bits, ways; in __l2c_init() local
811 /* Determine the number of ways */ in __l2c_init()
817 ways = 16; in __l2c_init()
819 ways = 8; in __l2c_init()
824 ways = (aux >> 13) & 0xf; in __l2c_init()
828 ways = (aux >> 13) & 0xf; in __l2c_init()
829 ways = 2 << ((ways + 1) >> 2); in __l2c_init()
833 /* Assume unknown chips have 8 ways */ in __l2c_init()
834 ways = 8; in __l2c_init()
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| /kernel/linux/linux-5.10/arch/sh/include/asm/ |
| D | cache.h | 21 unsigned int ways; /* Number of cache ways */ member
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| /kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh2/ |
| D | probe.c | 34 boot_cpu_data.dcache.ways = 4; in cpu_probe()
56 boot_cpu_data.dcache.ways = 1; in cpu_probe()
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| /kernel/linux/linux-5.10/arch/mips/kernel/ |
| D | cacheinfo.c | 14 leaf->ways_of_associativity = c->cache.ways; \
16 c->cache.ways; \
|