Home
last modified time | relevance | path

Searched refs:CTLR_ENALBE_G0 (Results 1 – 2 of 2) sorted by relevance

/kernel/liteos_a/arch/arm/include/
Dgic_v3.h60 #define CTLR_ENALBE_G0 BIT_32(0) macro
/kernel/liteos_a/arch/arm/gic/
Dgic_v3.c392 GIC_REG_32(GICD_CTLR) = CTLR_ENALBE_G0 | CTLR_ENABLE_G1NS | CTLR_ARE_S; in HalIrqInit()