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Searched refs:DSB (Results 1 – 22 of 22) sorted by relevance

/kernel/liteos_a/kernel/include/
Dlos_base.h96 …UINT8(value, addr) ({ (value) = *((volatile UINT8 *)((UINTPTR)(addr))); DSB; })
102 …INT16(value, addr) ({ (value) = *((volatile UINT16 *)((UINTPTR)(addr))); DSB; })
108 …INT32(value, addr) ({ (value) = *((volatile UINT32 *)((UINTPTR)(addr))); DSB; })
114 …INT64(value, addr) ({ (value) = *((volatile UINT64 *)((UINTPTR)(addr))); DSB; })
120 #define WRITE_UINT8(value, addr) ({ DSB; *((volatile UINT8 *)((UINTPTR)(addr))) …
126 #define WRITE_UINT16(value, addr) ({ DSB; *((volatile UINT16 *)((UINTPTR)(addr)))…
132 #define WRITE_UINT32(value, addr) ({ DSB; *((volatile UINT32 *)((UINTPTR)(addr)))…
138 #define WRITE_UINT64(value, addr) ({ DSB; *((volatile UINT64 *)((UINTPTR)(addr)))…
144 …8(addr) ({ UINT8 r = *((volatile UINT8 *)((UINTPTR)(addr))); DSB; r; })
150 …(addr) ({ UINT16 r = *((volatile UINT16 *)((UINTPTR)(addr))); DSB; r; })
[all …]
/kernel/liteos_a/arch/arm/arm/include/
Dlos_pte_ops.h54 DSB; in OsSavePte1()
121 DSB; in OsSavePte2()
138 DSB; in OsSavePte2Continuous()
152 DSB; in OsClearPte2Continuous()
Dlos_tlb_v6.h55 DSB; in OsArmInvalidateTlbBarrier()
Dlos_hw_cpu.h51 #define DSB __asm__ volatile("dsb" ::: "memory") macro
/kernel/liteos_a/arch/arm/include/
Dgic_v3.h126 DSB; in GiccSetPmr()
185 DSB; in GiccGetIar()
194 DSB; in GiccSetSgi1r()
201 DSB; in GiccSetBpr0()
/kernel/liteos_m/arch/arm/cortex-m33/iar/TZ/non_secure/
Dlos_dispatch.S121 DSB
209 DSB
/kernel/liteos_m/arch/arm/cortex-m55/iar/TZ/non_secure/
Dlos_dispatch.S121 DSB
209 DSB
/kernel/liteos_m/arch/arm/cortex-m3/keil/
Dlos_dispatch.S98 DSB
/kernel/liteos_m/arch/arm/cortex-m33/gcc/TZ/non_secure/
Dlos_dispatch.S228 DSB
/kernel/liteos_m/arch/arm/cortex-m55/gcc/TZ/non_secure/
Dlos_dispatch.S228 DSB
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dvf610-zii-ssmb-dtu.dts207 /* On DSB */
/kernel/liteos_m/arch/arm/cortex-m55/iar/NTZ/
Dlos_dispatch.S121 DSB
/kernel/liteos_m/arch/arm/cortex-m33/iar/NTZ/
Dlos_dispatch.S121 DSB
/kernel/liteos_m/arch/arm/cortex-m4/iar/
Dlos_dispatch.S121 DSB
/kernel/liteos_m/arch/arm/cortex-m7/iar/
Dlos_dispatch.S121 DSB
/kernel/liteos_a/arch/arm/gic/
Dgic_v3.c162 DSB; in GicrSetWaker()
/kernel/linux/linux-5.10/Documentation/admin-guide/media/
Dgspca-cardlist.rst222 ov519 05a9:a518 D-Link DSB-C310 Webcam
429 pac207 2001:f115 D-Link DSB-C120
/kernel/linux/linux-5.10/arch/arm/boot/compressed/
Dhead.S1265 mcr p15, 0, r0, c7, c10, 4 @ DSB
1345 mcr p15, 0, r10, c7, c10, 4 @ DSB
1347 mcr p15, 0, r10, c7, c10, 4 @ DSB
/kernel/linux/linux-5.10/arch/arm/
DKconfig834 The software must insert either a Data Synchronization Barrier (DSB)
909 instruction to behave as a DSB, ensuring the correct behaviour of
1019 system. This workaround adds a DSB instruction before the
1030 to deadlock. This workaround puts DSB before executing ISB if
1034 bool "ARM errata: TLBI/DSB failure on Cortex-A15"
1037 On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
/kernel/linux/linux-5.10/arch/arm64/
DKconfig624 TLBI+DSB completes before a read using the translation being
626 workaround repeats the TLBI+DSB operation.
816 bool "Falkor E1009: Prematurely complete a DSB after a TLBI"
820 On Falkor v1, the CPU may prematurely complete a DSB following a
1376 strongly recommended to use the ISB, DSB, and DMB
/kernel/linux/linux-5.10/Documentation/gpu/
Di915.rst253 :doc: DSB
/kernel/linux/linux-5.10/drivers/net/usb/
DKconfig45 D-Link DSB-650C and DU-E10