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Searched refs:INSTANCE_BROADCAST_WRITES (Results 1 – 19 of 19) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
Dni.c1095 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in cayman_gpu_init()
1096 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in cayman_gpu_init()
1115 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in cayman_gpu_init()
1116 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in cayman_gpu_init()
1124 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES); in cayman_gpu_init()
1125 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES); in cayman_gpu_init()
Devergreen.c3465 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in evergreen_gpu_init()
3466 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in evergreen_gpu_init()
3486 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in evergreen_gpu_init()
3487 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in evergreen_gpu_init()
3495 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES); in evergreen_gpu_init()
3496 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES); in evergreen_gpu_init()
Dnid.h298 #define INSTANCE_BROADCAST_WRITES (1 << 30) macro
Dsid.h1003 #define INSTANCE_BROADCAST_WRITES (1 << 30) macro
Dcikd.h1632 #define INSTANCE_BROADCAST_WRITES (1 << 30) macro
Devergreend.h415 #define INSTANCE_BROADCAST_WRITES (1 << 30) macro
Dsi.c2954 u32 data = INSTANCE_BROADCAST_WRITES; in si_select_se_sh()
Dcik.c3038 u32 data = INSTANCE_BROADCAST_WRITES; in cik_select_se_sh()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Damdgpu_amdkfd_gfx_v8.c591 INSTANCE_BROADCAST_WRITES, 1); in kgd_wave_control_execute()
Damdgpu_amdkfd_gfx_v10.c724 INSTANCE_BROADCAST_WRITES, 1); in kgd_wave_control_execute()
Damdgpu_amdkfd_gfx_v9.c672 INSTANCE_BROADCAST_WRITES, 1); in kgd_gfx_v9_wave_control_execute()
Damdgpu_amdkfd_gfx_v10_3.c634 INSTANCE_BROADCAST_WRITES, 1); in wave_control_execute_v10_3()
Dgfx_v9_4.c100 INSTANCE_BROADCAST_WRITES, 1); in gfx_v9_4_select_se_sh()
Dsid.h1001 #define INSTANCE_BROADCAST_WRITES (1 << 30) macro
Dgfx_v6_0.c1307 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); in gfx_v6_0_select_se_sh()
Dgfx_v7_0.c1594 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); in gfx_v7_0_select_se_sh()
Dgfx_v8_0.c3437 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); in gfx_v8_0_select_se_sh()
Dgfx_v9_0.c2434 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); in gfx_v9_0_select_se_sh()
Dgfx_v10_0.c4554 INSTANCE_BROADCAST_WRITES, 1); in gfx_v10_0_select_se_sh()