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Searched refs:WR_CONFIRM (Results 1 – 10 of 10) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Dsoc15d.h119 #define WR_CONFIRM (1 << 20) macro
Dnvd.h98 #define WR_CONFIRM (1 << 20) macro
Dvid.h151 #define WR_CONFIRM (1 << 20) macro
Dcikd.h269 #define WR_CONFIRM (1 << 20) macro
Dgfx_v9_0.c1011 (wc ? WR_CONFIRM : 0)); in gfx_v9_0_write_data_to_reg()
1100 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v9_0_ring_test_ib()
5437 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v9_0_ring_emit_fence_kiq()
5446 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v9_0_ring_emit_fence_kiq()
5471 WR_CONFIRM) | in gfx_v9_0_ring_emit_ce_meta()
5493 WR_CONFIRM) | in gfx_v9_0_ring_emit_de_meta()
5590 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v9_0_ring_emit_wreg()
5596 cmd = WR_CONFIRM; in gfx_v9_0_ring_emit_wreg()
Dgfx_v8_0.c897 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v8_0_ring_test_ib()
6303 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v8_0_ring_emit_fence_kiq()
6312 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v8_0_ring_emit_fence_kiq()
6409 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v8_0_ring_emit_wreg()
6415 cmd = WR_CONFIRM; in gfx_v8_0_ring_emit_wreg()
7156 WR_CONFIRM) | in gfx_v8_0_ring_emit_ce_meta()
7189 WR_CONFIRM) | in gfx_v8_0_ring_emit_de_meta()
Dgfx_v10_0.c3420 WRITE_DATA_DST_SEL(0) | (wc ? WR_CONFIRM : 0)); in gfx_v10_0_write_data_to_reg()
3518 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v10_0_ring_test_ib()
7926 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v10_0_ring_emit_fence_kiq()
7935 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v10_0_ring_emit_fence_kiq()
8069 WR_CONFIRM) | in gfx_v10_0_ring_emit_ce_meta()
8103 WR_CONFIRM) | in gfx_v10_0_ring_emit_de_meta()
8153 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v10_0_ring_emit_wreg()
8159 cmd = WR_CONFIRM; in gfx_v10_0_ring_emit_wreg()
Dsid.h1709 #define WR_CONFIRM (1 << 20) macro
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
Dsid.h1646 #define WR_CONFIRM (1 << 20) macro
Dcikd.h1737 #define WR_CONFIRM (1 << 20) macro