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/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/therm/
Dfanpwm.c44 u32 divs, duty; in nvkm_fanpwm_get() local
47 ret = therm->func->pwm_get(therm, fan->func.line, &divs, &duty); in nvkm_fanpwm_get()
48 if (ret == 0 && divs) { in nvkm_fanpwm_get()
49 divs = max(divs, duty); in nvkm_fanpwm_get()
51 duty = divs - duty; in nvkm_fanpwm_get()
52 return (duty * 100) / divs; in nvkm_fanpwm_get()
63 u32 divs, duty; in nvkm_fanpwm_set() local
66 divs = fan->base.perf.pwm_divisor; in nvkm_fanpwm_set()
68 divs = 1; in nvkm_fanpwm_set()
70 divs = therm->func->pwm_clock(therm, fan->func.line); in nvkm_fanpwm_set()
[all …]
Dgf119.c67 gf119_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty) in gf119_fan_pwm_get() argument
75 *divs = nvkm_rd32(device, 0x00e114 + (indx * 8)); in gf119_fan_pwm_get()
80 *divs = nvkm_rd32(device, 0x0200d8) & 0x1fff; in gf119_fan_pwm_get()
89 gf119_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty) in gf119_fan_pwm_set() argument
96 nvkm_wr32(device, 0x00e114 + (indx * 8), divs); in gf119_fan_pwm_set()
99 nvkm_mask(device, 0x0200d8, 0x1fff, divs); /* keep the high bits */ in gf119_fan_pwm_set()
Dgm107.c34 gm107_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty) in gm107_fan_pwm_get() argument
37 *divs = nvkm_rd32(device, 0x10eb20) & 0x1fff; in gm107_fan_pwm_get()
43 gm107_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty) in gm107_fan_pwm_set() argument
46 nvkm_mask(device, 0x10eb10, 0x1fff, divs); /* keep the high bits */ in gm107_fan_pwm_set()
Dnv40.c121 nv40_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty) in nv40_fan_pwm_get() argument
129 *divs = (reg & 0x00007fff); in nv40_fan_pwm_get()
136 *divs = nvkm_rd32(device, 0x0015f8); in nv40_fan_pwm_get()
149 nv40_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty) in nv40_fan_pwm_set() argument
154 nvkm_mask(device, 0x0010f0, 0x7fff7fff, (duty << 16) | divs); in nv40_fan_pwm_set()
157 nvkm_wr32(device, 0x0015f8, divs); in nv40_fan_pwm_set()
Dnv50.c66 nv50_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty) in nv50_fan_pwm_get() argument
74 *divs = nvkm_rd32(device, 0x00e114 + (id * 8)); in nv50_fan_pwm_get()
83 nv50_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty) in nv50_fan_pwm_set() argument
90 nvkm_wr32(device, 0x00e114 + (id * 8), divs); in nv50_fan_pwm_set()
/kernel/linux/linux-5.10/drivers/cpufreq/
Ds3c2440-cpufreq.c124 cfg->divs.dvs = 1; in s3c2440_cpufreq_calcdivs()
127 cfg->divs.dvs = 0; in s3c2440_cpufreq_calcdivs()
133 cfg->divs.h_divisor = hdiv; in s3c2440_cpufreq_calcdivs()
134 cfg->divs.p_divisor = pdiv; in s3c2440_cpufreq_calcdivs()
157 cfg->divs.h_divisor, cfg->divs.p_divisor); in s3c2440_cpufreq_setdivs()
165 switch (cfg->divs.h_divisor) { in s3c2440_cpufreq_setdivs()
190 if (cfg->divs.p_divisor != cfg->divs.h_divisor) in s3c2440_cpufreq_setdivs()
206 clk_set_parent(armclk, cfg->divs.dvs ? hclk : fclk); in s3c2440_cpufreq_setdivs()
210 int *divs, in run_freq_for() argument
218 for (div = *divs; div > 0; div = *divs++) { in run_freq_for()
Ds3c2412-cpufreq.c78 cfg->divs.arm_divisor = armdiv; in s3c2412_cpufreq_calcdivs()
88 cfg->divs.dvs = dvs = armclk < armdiv_clk; in s3c2412_cpufreq_calcdivs()
94 __func__, armclk, hclk, armdiv, hdiv, cfg->divs.dvs); in s3c2412_cpufreq_calcdivs()
115 cfg->divs.h_divisor = hdiv * armdiv; in s3c2412_cpufreq_calcdivs()
116 cfg->divs.p_divisor = pdiv * armdiv; in s3c2412_cpufreq_calcdivs()
137 if (cfg->divs.arm_divisor == 2) in s3c2412_cpufreq_setdivs()
140 clkdiv |= ((cfg->divs.h_divisor / cfg->divs.arm_divisor) - 1); in s3c2412_cpufreq_setdivs()
142 if (cfg->divs.p_divisor != cfg->divs.h_divisor) in s3c2412_cpufreq_setdivs()
148 clk_set_parent(armclk, cfg->divs.dvs ? hclk : fclk); in s3c2412_cpufreq_setdivs()
Ds3c2410-cpufreq.c34 if (cfg->divs.h_divisor == 2) in s3c2410_cpufreq_setdivs()
37 if (cfg->divs.p_divisor != cfg->divs.h_divisor) in s3c2410_cpufreq_setdivs()
76 cfg->divs.p_divisor = pdiv; in s3c2410_cpufreq_calcdivs()
77 cfg->divs.h_divisor = hdiv; in s3c2410_cpufreq_calcdivs()
Ds3c24xx-cpufreq-debugfs.c85 cfg->divs.h_divisor, cfg->divs.p_divisor, in info_show()
86 cfg->divs.arm_divisor, cfg->divs.dvs ? "on" : "off"); in info_show()
Ds3c24xx-cpufreq.c72 cfg->divs.h_divisor = fclk / hclk; in s3c_cpufreq_getcur()
73 cfg->divs.p_divisor = fclk / pclk; in s3c_cpufreq_getcur()
81 cfg->freq.hclk = pll / cfg->divs.h_divisor; in s3c_cpufreq_calc()
82 cfg->freq.pclk = pll / cfg->divs.p_divisor; in s3c_cpufreq_calc()
101 cfg->freq.hclk, cfg->divs.h_divisor, in s3c_cpufreq_show()
102 cfg->freq.pclk, cfg->divs.p_divisor); in s3c_cpufreq_show()
/kernel/linux/linux-5.10/drivers/clk/baikal-t1/
Dclk-ccu-div.c129 struct ccu_div **divs; member
269 div = data->divs[idx]; in ccu_div_find_desc()
340 data->divs = kcalloc(data->divs_num, sizeof(*data->divs), GFP_KERNEL); in ccu_div_create_data()
341 if (!data->divs) { in ccu_div_create_data()
356 kfree(data->divs); in ccu_div_free_data()
421 data->divs[idx] = ccu_div_hw_register(&init); in ccu_div_clk_register()
422 if (IS_ERR(data->divs[idx])) { in ccu_div_clk_register()
423 ret = PTR_ERR(data->divs[idx]); in ccu_div_clk_register()
441 ccu_div_hw_unregister(data->divs[idx]); in ccu_div_clk_register()
453 ccu_div_hw_unregister(data->divs[idx]); in ccu_div_clk_unregister()
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dmcp77.c212 int divs = 0; in mcp77_clk_calc() local
216 out = calc_P(nvkm_clk_read(&clk->base, nv_clk_src_hclkm4), core, &divs); in mcp77_clk_calc()
223 clk->cctrl = divs << 16; in mcp77_clk_calc()
247 out = calc_P((core << 1), shader, &divs); in mcp77_clk_calc()
251 (divs + P2) <= 7) { in mcp77_clk_calc()
253 clk->sctrl = (divs + P2) << 16; in mcp77_clk_calc()
262 out = calc_P(core, vdec, &divs); in mcp77_clk_calc()
266 clk->vdiv = divs << 16; in mcp77_clk_calc()
Dnv50.c447 clk_mask(hwsq, divs, divsm, divsv); in nv50_clk_calc()
/kernel/linux/linux-5.10/crypto/
Dtestmgr.c441 static unsigned int count_test_sg_divisions(const struct test_sg_division *divs) in count_test_sg_divisions() argument
447 remaining -= divs[ndivs++].proportion_of_total; in count_test_sg_divisions()
456 static bool valid_sg_divisions(const struct test_sg_division *divs, in valid_sg_divisions() argument
463 if (divs[i].proportion_of_total <= 0 || in valid_sg_divisions()
464 divs[i].proportion_of_total > TEST_SG_TOTAL - total) in valid_sg_divisions()
466 total += divs[i].proportion_of_total; in valid_sg_divisions()
467 if (divs[i].flush_type != FLUSH_TYPE_NONE) in valid_sg_divisions()
469 if (divs[i].nosimd) in valid_sg_divisions()
473 memchr_inv(&divs[i], 0, (count - i) * sizeof(divs[0])) == NULL; in valid_sg_divisions()
555 const struct test_sg_division *divs, in build_test_sglist() argument
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/edp/
Dedp_ctrl.c1347 const struct edp_pixel_clk_div *divs; in msm_edp_ctrl_pixel_clock_valid() local
1353 divs = clk_divs[0]; in msm_edp_ctrl_pixel_clock_valid()
1355 divs = clk_divs[1]; in msm_edp_ctrl_pixel_clock_valid()
1362 clk_err = abs(divs[i].rate - pixel_rate); in msm_edp_ctrl_pixel_clock_valid()
1363 if ((divs[i].rate * err / 100) >= clk_err) { in msm_edp_ctrl_pixel_clock_valid()
1365 *pm = divs[i].m; in msm_edp_ctrl_pixel_clock_valid()
1367 *pn = divs[i].n; in msm_edp_ctrl_pixel_clock_valid()
/kernel/linux/linux-5.10/arch/mips/include/asm/
Dmips-r2-to-r6-emul.h17 u64 divs; member
/kernel/linux/linux-5.10/drivers/clk/rockchip/
Dclk-cpu.c108 for (i = 0; i < ARRAY_SIZE(rate->divs); i++) { in rockchip_cpuclk_set_dividers()
109 const struct rockchip_cpuclk_clksel *clksel = &rate->divs[i]; in rockchip_cpuclk_set_dividers()
Dclk-rk3188.c131 .divs = { \
169 .divs = { \
Dclk-rk3368.c202 .divs = { \
212 .divs = { \
Dclk-rk3036.c93 .divs = { \
/kernel/linux/linux-5.10/arch/mips/kernel/
Dmips-r2-to-r6-emul.c463 MIPS_R2_STATS(divs); in div_func()
485 MIPS_R2_STATS(divs); in divu_func()
574 MIPS_R2_STATS(divs); in ddiv_func()
599 MIPS_R2_STATS(divs); in ddivu_func()
2252 (unsigned long)__this_cpu_read(mipsr2emustats.divs), in mipsr2_emul_show()
2253 (unsigned long)__this_cpu_read(mipsr2bdemustats.divs)); in mipsr2_emul_show()
2314 __this_cpu_write((mipsr2emustats).divs, 0); in mipsr2_clear_show()
2315 __this_cpu_write((mipsr2bdemustats).divs, 0); in mipsr2_clear_show()
/kernel/linux/linux-5.10/drivers/i2c/busses/
Di2c-s3c2410.c801 unsigned int *div1, unsigned int *divs) in s3c24xx_i2c_calcdivisor() argument
819 *divs = calc_divs; in s3c24xx_i2c_calcdivisor()
834 unsigned int divs, div1; in s3c24xx_i2c_clockrate() local
848 freq = s3c24xx_i2c_calcdivisor(clkin, target_frequency, &div1, &divs); in s3c24xx_i2c_clockrate()
861 iiccon |= (divs-1); in s3c24xx_i2c_clockrate()
/kernel/linux/linux-5.10/include/linux/soc/samsung/
Ds3c-cpufreq-core.h122 struct s3c_clkdivs divs; member
/kernel/linux/linux-5.10/drivers/scsi/ufs/
Dufs-exynos.c340 const int divs[] = {32, 16, 8, 4}; in exynos_ufs_calc_pwm_clk_div() local
345 for (i = 0; i < ARRAY_SIZE(divs); i++) { in exynos_ufs_calc_pwm_clk_div()
346 _clk = NSEC_PER_SEC * mult / (clk_period * divs[i] * div); in exynos_ufs_calc_pwm_clk_div()
/kernel/linux/linux-5.10/arch/m68k/ifpsp060/src/
Dilsp.S105 # divs.l #
195 tst.b POSNEG(%a6) # do divs, divu separately
198 # it was a divs.l, so ccode setting is a little more complicated...

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