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Searched refs:edac_dbg (Results 1 – 25 of 40) sorted by relevance

12

/kernel/linux/linux-5.10/drivers/edac/
Di5400_edac.c551 …edac_dbg(0, "\t\t%s DIMM= %d Channels= %d,%d (Branch= %d DRAM Bank= %d Buffer ID = %d rdwr= %s r… in i5400_proccess_non_recoverable_info()
603 edac_dbg(0, "\tCorrected bits= 0x%lx\n", allErrors); in i5400_process_nonfatal_error_info()
624 edac_dbg(0, "\t\tDIMM= %d Channel= %d (Branch %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5400_process_nonfatal_error_info()
689 edac_dbg(4, "MC%d\n", mci->mc_idx); in i5400_check_error()
775 edac_dbg(1, "System Address, processor bus- PCI Bus ID: %s %x:%x\n", in i5400_get_devices()
778 edac_dbg(1, "Branchmap, control and errors - PCI Bus ID: %s %x:%x\n", in i5400_get_devices()
782 edac_dbg(1, "FSB Error Regs - PCI Bus ID: %s %x:%x\n", in i5400_get_devices()
872 edac_dbg(0, "ERROR: trying to access an invalid dimm: %d\n", in determine_mtr()
893 edac_dbg(2, "\tMTR%d=0x%x: DIMMs are %sPresent\n", in decode_mtr()
898 edac_dbg(2, "\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr)); in decode_mtr()
[all …]
Di7300_edac.c597 edac_dbg(2, "\tMTR%d CH%d: DIMMs are %sPresent (mtr)\n", in decode_mtr()
620 edac_dbg(2, "\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr)); in decode_mtr()
622 edac_dbg(2, "\t\tELECTRICAL THROTTLING is %s\n", in decode_mtr()
625 edac_dbg(2, "\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr)); in decode_mtr()
626 edac_dbg(2, "\t\tNUMRANK: %s\n", in decode_mtr()
628 edac_dbg(2, "\t\tNUMROW: %s\n", in decode_mtr()
633 edac_dbg(2, "\t\tNUMCOL: %s\n", in decode_mtr()
638 edac_dbg(2, "\t\tSIZE: %d MB\n", dinfo->megabytes); in decode_mtr()
654 edac_dbg(2, "\t\tECC code is 8-byte-over-32-byte SECDED+ code\n"); in decode_mtr()
656 edac_dbg(2, "\t\tECC code is on Lockstep mode\n"); in decode_mtr()
[all …]
Dedac_pci_sysfs.c78 edac_dbg(0, "\n"); in edac_pci_instance_release()
161 edac_dbg(0, "\n"); in edac_pci_create_instance_kobj()
177 edac_dbg(2, "failed to register instance pci%d\n", idx); in edac_pci_create_instance_kobj()
183 edac_dbg(1, "Register instance 'pci%d' kobject\n", idx); in edac_pci_create_instance_kobj()
200 edac_dbg(0, "\n"); in edac_pci_unregister_sysfs_instance_kobj()
316 edac_dbg(0, "here to module_put(THIS_MODULE)\n"); in edac_pci_release_main_kobj()
341 edac_dbg(0, "\n"); in edac_pci_main_kobj_setup()
357 edac_dbg(1, "try_module_get() failed\n"); in edac_pci_main_kobj_setup()
364 edac_dbg(1, "Failed to allocate\n"); in edac_pci_main_kobj_setup()
374 edac_dbg(1, "Failed to register '.../edac/pci'\n"); in edac_pci_main_kobj_setup()
[all …]
Di5000_edac.c487 edac_dbg(0, "\t\tCSROW= %d Channel= %d (DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5000_process_fatal_error_info()
566 edac_dbg(0, "\tUncorrected bits= 0x%x\n", ue_errors); in i5000_process_nonfatal_error_info()
582 …edac_dbg(0, "\t\tCSROW= %d Channels= %d,%d (Branch= %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n… in i5000_process_nonfatal_error_info()
636 edac_dbg(0, "\tCorrected bits= 0x%x\n", ce_errors); in i5000_process_nonfatal_error_info()
654 edac_dbg(0, "\t\tCSROW= %d Channel= %d (Branch %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5000_process_nonfatal_error_info()
768 edac_dbg(4, "MC%d\n", mci->mc_idx); in i5000_check_error()
839 edac_dbg(1, "System Address, processor bus- PCI Bus ID: %s %x:%x\n", in i5000_get_devices()
842 edac_dbg(1, "Branchmap, control and errors - PCI Bus ID: %s %x:%x\n", in i5000_get_devices()
846 edac_dbg(1, "FSB Error Regs - PCI Bus ID: %s %x:%x\n", in i5000_get_devices()
971 edac_dbg(2, "\tMTR%d=0x%x: DIMMs are %sPresent\n", in decode_mtr()
[all …]
Dedac_mc.c86 edac_dbg(4, " channel->chan_idx = %d\n", chan->chan_idx); in edac_mc_dump_channel()
87 edac_dbg(4, " channel = %p\n", chan); in edac_mc_dump_channel()
88 edac_dbg(4, " channel->csrow = %p\n", chan->csrow); in edac_mc_dump_channel()
89 edac_dbg(4, " channel->dimm = %p\n", chan->dimm); in edac_mc_dump_channel()
101 edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n", in edac_mc_dump_dimm()
104 edac_dbg(4, " dimm = %p\n", dimm); in edac_mc_dump_dimm()
105 edac_dbg(4, " dimm->label = '%s'\n", dimm->label); in edac_mc_dump_dimm()
106 edac_dbg(4, " dimm->nr_pages = 0x%x\n", dimm->nr_pages); in edac_mc_dump_dimm()
107 edac_dbg(4, " dimm->grain = %d\n", dimm->grain); in edac_mc_dump_dimm()
108 edac_dbg(4, " dimm->nr_pages = 0x%x\n", dimm->nr_pages); in edac_mc_dump_dimm()
[all …]
Di3200_edac.c114 edac_dbg(0, "In single channel mode\n"); in how_many_channels()
117 edac_dbg(0, "In dual channel mode\n"); in how_many_channels()
122 edac_dbg(0, "2 DIMMS per channel disabled\n"); in how_many_channels()
124 edac_dbg(0, "2 DIMMS per channel enabled\n"); in how_many_channels()
256 edac_dbg(1, "MC%d\n", mci->mc_idx); in i3200_check()
301 edac_dbg(0, "drb[0][%d] = %d, drb[1][%d] = %d\n", i, drbs[0][i], i, drbs[1][i]); in i3200_get_drbs()
347 edac_dbg(0, "MC:\n"); in i3200_probe1()
367 edac_dbg(3, "MC: init mci\n"); in i3200_probe1()
401 edac_dbg(0, "csrow %d, channel %d%s, size = %ld MiB\n", i, j, in i3200_probe1()
416 edac_dbg(3, "MC: failed edac_mc_add_mc()\n"); in i3200_probe1()
[all …]
Dr82600_edac.c207 edac_dbg(1, "MC%d\n", mci->mc_idx); in r82600_check()
238 edac_dbg(1, "Row=%d DRBA = %#0x\n", index, drbar); in r82600_init_csrows()
243 edac_dbg(1, "Row=%d, Boundary Address=%#0x, Last = %#0x\n", in r82600_init_csrows()
279 edac_dbg(0, "\n"); in r82600_probe1()
284 edac_dbg(2, "sdram refresh rate = %#0x\n", sdram_refresh_rate); in r82600_probe1()
285 edac_dbg(2, "DRAMC register = %#0x\n", dramcr); in r82600_probe1()
296 edac_dbg(0, "mci = %p\n", mci); in r82600_probe1()
312 edac_dbg(3, "mci = %p - Scrubbing disabled! EAP: %#0x\n", in r82600_probe1()
329 edac_dbg(3, "failed edac_mc_add_mc()\n"); in r82600_probe1()
336 edac_dbg(3, "Disabling Hardware Scrub (scrub on error)\n"); in r82600_probe1()
[all …]
Dedac_device_sysfs.c205 edac_dbg(4, "control index=%d\n", edac_dev->dev_idx); in edac_device_ctrl_master_release()
236 edac_dbg(1, "\n"); in edac_device_register_sysfs_main_kobj()
262 edac_dbg(1, "Failed to register '.../edac/%s'\n", in edac_device_register_sysfs_main_kobj()
272 edac_dbg(4, "Registered '.../edac/%s' kobject\n", edac_dev->name); in edac_device_register_sysfs_main_kobj()
291 edac_dbg(0, "\n"); in edac_device_unregister_sysfs_main_kobj()
292 edac_dbg(4, "name of kobject is: %s\n", kobject_name(&dev->kobj)); in edac_device_unregister_sysfs_main_kobj()
329 edac_dbg(1, "\n"); in edac_device_ctrl_instance_release()
435 edac_dbg(1, "\n"); in edac_device_ctrl_block_release()
517 edac_dbg(4, "Instance '%s' inst_p=%p block '%s' block_p=%p\n", in edac_device_create_block()
519 edac_dbg(4, "block kobj=%p block kobj->parent=%p\n", in edac_device_create_block()
[all …]
Damd64_edac.c375 edac_dbg(2, "sys_addr 0x%lx doesn't match any node\n", in find_mc_by_sys_addr()
474 edac_dbg(2, "InputAddr 0x%lx matches csrow %d (node %d)\n", in input_addr_to_csrow()
481 edac_dbg(2, "no matching csrow for InputAddr 0x%lx (MC node %d)\n", in input_addr_to_csrow()
510 edac_dbg(1, " revision %d for node %d does not support DHAR\n", in amd64_get_dram_hole_info()
517 edac_dbg(1, " Dram Memory Hoisting is DISABLED on this system\n"); in amd64_get_dram_hole_info()
522 edac_dbg(1, " Dram Memory Hoisting is DISABLED on this node %d\n", in amd64_get_dram_hole_info()
551 edac_dbg(1, " DHAR info for node %d base 0x%lx offset 0x%lx size 0x%lx\n", in amd64_get_dram_hole_info()
604 edac_dbg(2, "using DHAR to translate SysAddr 0x%lx to DramAddr 0x%lx\n", in sys_addr_to_dram_addr()
623 edac_dbg(2, "using DRAM Base register to translate SysAddr 0x%lx to DramAddr 0x%lx\n", in sys_addr_to_dram_addr()
660 edac_dbg(2, " Intlv Shift=%d DramAddr=0x%lx maps to InputAddr=0x%lx\n", in dram_addr_to_input_addr()
[all …]
De7xxx_edac.c168 edac_dbg(3, "\n"); in e7xxx_find_channel()
188 edac_dbg(3, "\n"); in ctl_page_to_phys()
210 edac_dbg(3, "\n"); in process_ce()
227 edac_dbg(3, "\n"); in process_ce_no_info()
237 edac_dbg(3, "\n"); in process_ue()
250 edac_dbg(3, "\n"); in process_ue_no_info()
336 edac_dbg(3, "\n"); in e7xxx_check()
385 edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size); in e7xxx_init_csrows()
431 edac_dbg(0, "mci\n"); in e7xxx_probe1()
454 edac_dbg(3, "init mci\n"); in e7xxx_probe1()
[all …]
Die31200_edac.c217 edac_dbg(0, "In single channel mode\n"); in how_many_channels()
220 edac_dbg(0, "In dual channel mode\n"); in how_many_channels()
226 edac_dbg(0, "2 DIMMS per channel disabled\n"); in how_many_channels()
228 edac_dbg(0, "2 DIMMS per channel enabled\n"); in how_many_channels()
336 edac_dbg(1, "MC%d\n", mci->mc_idx); in ie31200_check()
413 edac_dbg(0, "MC:\n"); in ie31200_probe1()
438 edac_dbg(3, "MC: init mci\n"); in ie31200_probe1()
467 edac_dbg(0, "addr_decode: 0x%x\n", addr_decode); in ie31200_probe1()
471 edac_dbg(0, "size: 0x%x, rank: %d, width: %d\n", in ie31200_probe1()
497 edac_dbg(0, "set nr pages: 0x%lx\n", nr_pages); in ie31200_probe1()
[all …]
Di82443bxgx_edac.c179 edac_dbg(1, "MC%d\n", mci->mc_idx); in i82443bxgx_edacmc_check()
202 edac_dbg(1, "MC%d: Row=%d DRB = %#0x\n", in i82443bxgx_init_csrows()
206 edac_dbg(1, "MC%d: Row=%d, Boundary Address=%#0x, Last = %#0x\n", in i82443bxgx_init_csrows()
241 edac_dbg(0, "MC:\n"); in i82443bxgx_edacmc_probe1()
259 edac_dbg(0, "MC: mci = %p\n", mci); in i82443bxgx_edacmc_probe1()
275 edac_dbg(0, "Unknown/reserved DRAM type value in DRAMC register!\n"); in i82443bxgx_edacmc_probe1()
304 edac_dbg(0, "Unknown/reserved ECC state in NBXCFG register!\n"); in i82443bxgx_edacmc_probe1()
327 edac_dbg(3, "failed edac_mc_add_mc()\n"); in i82443bxgx_edacmc_probe1()
342 edac_dbg(3, "MC: success\n"); in i82443bxgx_edacmc_probe1()
356 edac_dbg(0, "MC:\n"); in i82443bxgx_edacmc_init_one()
[all …]
Dedac_pci.c38 edac_dbg(1, "\n"); in edac_pci_alloc_ctl_info()
63 edac_dbg(1, "\n"); in edac_pci_free_ctl_info()
80 edac_dbg(1, "\n"); in find_edac_pci_by_dev()
105 edac_dbg(1, "\n"); in add_edac_pci_to_global_list()
174 edac_dbg(3, "checking\n"); in edac_pci_workq_function()
206 edac_dbg(0, "\n"); in edac_pci_add_device()
253 edac_dbg(0, "\n"); in edac_pci_del_device()
290 edac_dbg(4, "\n"); in edac_pci_generic_check()
325 edac_dbg(3, "failed edac_pci_add_device()\n"); in edac_pci_create_generic_ctl()
336 edac_dbg(0, "pci mod=%s\n", pci->mod_name); in edac_pci_release_generic_ctl()
Di82860_edac.c138 edac_dbg(1, "MC%d\n", mci->mc_idx); in i82860_check()
169 edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size); in i82860_init_csrows()
211 edac_dbg(3, "init mci\n"); in i82860_probe1()
229 edac_dbg(3, "failed edac_mc_add_mc()\n"); in i82860_probe1()
245 edac_dbg(3, "success\n"); in i82860_probe1()
260 edac_dbg(0, "\n"); in i82860_init_one()
278 edac_dbg(0, "\n"); in i82860_remove_one()
311 edac_dbg(3, "\n"); in i82860_init()
324 edac_dbg(0, "860 pci_get_device fail\n"); in i82860_init()
332 edac_dbg(0, "860 init fail\n"); in i82860_init()
[all …]
Dx38_edac.c106 edac_dbg(0, "In single channel mode\n"); in how_many_channel()
109 edac_dbg(0, "In dual channel mode\n"); in how_many_channel()
241 edac_dbg(1, "MC%d\n", mci->mc_idx); in x38_check()
328 edac_dbg(0, "MC:\n"); in x38_probe1()
349 edac_dbg(3, "MC: init mci\n"); in x38_probe1()
398 edac_dbg(3, "MC: failed edac_mc_add_mc()\n"); in x38_probe1()
403 edac_dbg(3, "MC: success\n"); in x38_probe1()
418 edac_dbg(0, "MC:\n"); in x38_init_one()
434 edac_dbg(0, "\n"); in x38_remove_one()
467 edac_dbg(3, "MC:\n"); in x38_init()
[all …]
Di82875p_edac.c265 edac_dbg(1, "MC%d\n", mci->mc_idx); in i82875p_check()
367 edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size); in i82875p_init_csrows()
400 edac_dbg(0, "\n"); in i82875p_probe1()
419 edac_dbg(3, "init mci\n"); in i82875p_probe1()
429 edac_dbg(3, "init pvt\n"); in i82875p_probe1()
440 edac_dbg(3, "failed edac_mc_add_mc()\n"); in i82875p_probe1()
456 edac_dbg(3, "success\n"); in i82875p_probe1()
477 edac_dbg(0, "\n"); in i82875p_init_one()
496 edac_dbg(0, "\n"); in i82875p_remove_one()
542 edac_dbg(3, "\n"); in i82875p_init()
[all …]
Di82975x_edac.c333 edac_dbg(1, "MC%d\n", mci->mc_idx); in i82975x_check()
395 edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size); in i82975x_init_csrows()
480 edac_dbg(0, "\n"); in i82975x_probe1()
484 edac_dbg(3, "failed, MCHBAR disabled!\n"); in i82975x_probe1()
490 edac_dbg(3, "error ioremapping MCHBAR!\n"); in i82975x_probe1()
553 edac_dbg(3, "init mci\n"); in i82975x_probe1()
563 edac_dbg(3, "init pvt\n"); in i82975x_probe1()
572 edac_dbg(3, "failed edac_mc_add_mc()\n"); in i82975x_probe1()
577 edac_dbg(3, "success\n"); in i82975x_probe1()
595 edac_dbg(0, "\n"); in i82975x_init_one()
[all …]
Dedac_device.c40 edac_dbg(3, "\tedac_dev = %p dev_idx=%d\n", in edac_device_dump_device()
42 edac_dbg(4, "\tedac_dev->edac_check = %p\n", edac_dev->edac_check); in edac_device_dump_device()
43 edac_dbg(3, "\tdev = %p\n", edac_dev->dev); in edac_device_dump_device()
44 edac_dbg(3, "\tmod_name:ctl_name = %s:%s\n", in edac_device_dump_device()
46 edac_dbg(3, "\tpvt_info = %p\n\n", edac_dev->pvt_info); in edac_device_dump_device()
68 edac_dbg(4, "instances=%d blocks=%d\n", nr_instances, nr_blocks); in edac_device_alloc_ctl_info()
141 edac_dbg(4, "edac_dev=%p next after end=%p\n", in edac_device_alloc_ctl_info()
163 edac_dbg(4, "instance=%d inst_p=%p block=#%d block_p=%p name='%s'\n", in edac_device_alloc_ctl_info()
177 edac_dbg(4, "THIS BLOCK_ATTRIB=%p\n", in edac_device_alloc_ctl_info()
197 edac_dbg(4, "alloc-attrib=%p attrib_name='%s' attrib-spec=%p spec-name=%s\n", in edac_device_alloc_ctl_info()
[all …]
Dsb_edac.c700 edac_dbg(0, "Invalid number of ranks: %d (max = %i) raw value = %x (%04x)\n", in numrank()
713 edac_dbg(0, "Invalid number of rows: %d (should be between 14 and 17) raw value = %x (%04x)\n", in numrow()
726 edac_dbg(0, "Invalid number of cols: %d (max = 4) raw value = %x (%04x)\n", in numcol()
1374 edac_dbg(0, "edc route table for CHA %d: %s\n", in knl_get_dimm_capacity()
1377 edac_dbg(0, "edc route table for CHA %d-%d: %s\n", in knl_get_dimm_capacity()
1384 edac_dbg(0, "edc route table for CHA %d: %s\n", in knl_get_dimm_capacity()
1387 edac_dbg(0, "edc route table for CHA %d-%d: %s\n", in knl_get_dimm_capacity()
1399 edac_dbg(0, "mc route table for CHA %d: %s\n", in knl_get_dimm_capacity()
1402 edac_dbg(0, "mc route table for CHA %d-%d: %s\n", in knl_get_dimm_capacity()
1409 edac_dbg(0, "mc route table for CHA %d: %s\n", in knl_get_dimm_capacity()
[all …]
Di3000_edac.c276 edac_dbg(1, "MC%d\n", mci->mc_idx); in i3000_check()
323 edac_dbg(0, "MC:\n"); in i3000_probe1()
367 edac_dbg(3, "MC: init mci\n"); in i3000_probe1()
399 edac_dbg(3, "MC: (%d) cumul_size 0x%x\n", i, cumul_size); in i3000_probe1()
428 edac_dbg(3, "MC: failed edac_mc_add_mc()\n"); in i3000_probe1()
444 edac_dbg(3, "MC: success\n"); in i3000_probe1()
459 edac_dbg(0, "MC:\n"); in i3000_init_one()
475 edac_dbg(0, "\n"); in i3000_remove_one()
509 edac_dbg(3, "MC:\n"); in i3000_init()
523 edac_dbg(0, "i3000 pci_get_device fail\n"); in i3000_init()
[all …]
Di10nm_base.c48 edac_dbg(2, "No device %02x:%02x.%x\n", in pci_get_dev_wrapper()
54 edac_dbg(2, "Failed to enable device %02x:%02x.%x\n", in pci_get_dev_wrapper()
88 edac_dbg(2, "socket%d mmio base 0x%llx (reg 0x%x)\n", in i10nm_get_all_munits()
110 edac_dbg(2, "mc%d mmio base 0x%llx size 0x%lx (reg 0x%x)\n", in i10nm_get_all_munits()
154 edac_dbg(1, "ch%d mcmtr reg %x\n", chan, mcmtr); in i10nm_check_ecc()
176 edac_dbg(1, "dimmmtr 0x%x mcddrtcfg 0x%x (mc%d ch%d dimm%d)\n", in i10nm_get_dimm_config()
259 edac_dbg(2, "\n"); in i10nm_init()
299 edac_dbg(2, "src_id = %d node_id = %d\n", src_id, node_id); in i10nm_init()
335 edac_dbg(2, "\n"); in i10nm_exit()
Damd76x_edac.c182 edac_dbg(3, "\n"); in amd76x_check()
243 edac_dbg(0, "\n"); in amd76x_probe1()
258 edac_dbg(0, "mci = %p\n", mci); in amd76x_probe1()
277 edac_dbg(3, "failed edac_mc_add_mc()\n"); in amd76x_probe1()
293 edac_dbg(3, "success\n"); in amd76x_probe1()
305 edac_dbg(0, "\n"); in amd76x_init_one()
323 edac_dbg(0, "\n"); in amd76x_remove_one()
Di7core_edac.c507 edac_dbg(0, "QPI %d control=0x%08x status=0x%08x dod=0x%08x map=0x%08x\n", in get_dimm_config()
512 edac_dbg(0, "ECC enabled with x%d SDCC\n", ECCx8(pvt) ? 8 : 4); in get_dimm_config()
518 edac_dbg(0, "ECC disabled\n"); in get_dimm_config()
523 edac_dbg(0, "DOD Max limits: DIMMS: %d, %d-ranked, %d-banked x%x x 0x%x\n", in get_dimm_config()
537 edac_dbg(0, "Channel %i is not active\n", i); in get_dimm_config()
541 edac_dbg(0, "Channel %i is disabled\n", i); in get_dimm_config()
572 edac_dbg(0, "Ch%d phy rd%d, wr%d (0x%08x): %s%s%s%cDIMMs\n", in get_dimm_config()
597 edac_dbg(0, "\tdimm %d %d MiB offset: %x, bank: %d, rank: %d, row: %#x, col: %#x\n", in get_dimm_config()
636 edac_dbg(1, "\t[%i] DIVBY3\tREMOVED\tOFFSET\n", i); in get_dimm_config()
638 edac_dbg(1, "\t\t%#x\t%#x\t%#x\n", in get_dimm_config()
[all …]
Dskx_common.c109 edac_dbg(0, "Address 0x%llx out of range\n", res->addr); in skx_adxl_decode()
114 edac_dbg(0, "Failed to decode 0x%llx\n", res->addr); in skx_adxl_decode()
240 edac_dbg(2, "busses: 0x%x, 0x%x, 0x%x, 0x%x\n", in skx_get_all_bus_mappings()
258 edac_dbg(2, "Can't get tolm/tohm\n"); in skx_get_hi_lo()
283 edac_dbg(2, "tolm = 0x%llx tohm = 0x%llx\n", skx_tolm, skx_tohm); in skx_get_hi_lo()
296 edac_dbg(2, "bad %s = %d (raw=0x%x)\n", name, val, reg); in skx_get_dimm_attr()
322 …edac_dbg(0, "mc#%d: channel %d, dimm %d, %lld MiB (%d pages) bank: %d, rank: %d, row: 0x%x, col: 0… in skx_get_dimm_info()
382 edac_dbg(0, "mc#%d: channel %d, dimm %d, %llu MiB (%u pages)\n", in skx_get_nvdimm_info()
413 edac_dbg(0, "MC#%d: mci = %p\n", imc->mc, mci); in skx_register_mci()
443 edac_dbg(0, "MC: failed edac_mc_add_mc()\n"); in skx_register_mci()
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Dskx_base.c276 edac_dbg(0, "Address 0x%llx out of range\n", addr); in skx_sad_decode()
291 edac_dbg(0, "No SAD entry for 0x%llx\n", addr); in skx_sad_decode()
317 edac_dbg(0, "Double remote!\n"); in skx_sad_decode()
325 edac_dbg(0, "Can't find node %d\n", SKX_ILV_TARGET(tgt)); in skx_sad_decode()
343 edac_dbg(0, "illegal mod3mode\n"); in skx_sad_decode()
369 edac_dbg(2, "0x%llx: socket=%d imc=%d channel=%d\n", in skx_sad_decode()
416 edac_dbg(0, "No TAD entry for 0x%llx\n", res->addr); in skx_tad_decode()
444 edac_dbg(2, "0x%llx: chan_addr=0x%llx sktways=%d chanways=%d\n", in skx_tad_decode()
486 edac_dbg(0, "No RIR entry for 0x%llx\n", res->addr); in skx_rir_decode()
505 edac_dbg(2, "0x%llx: dimm=%d rank=%d chan_rank=%d rank_addr=0x%llx\n", in skx_rir_decode()
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