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Searched refs:vce (Results 1 – 18 of 18) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Damdgpu_vce.c159 r = request_firmware(&adev->vce.fw, fw_name, adev->dev); in amdgpu_vce_sw_init()
166 r = amdgpu_ucode_validate(adev->vce.fw); in amdgpu_vce_sw_init()
170 release_firmware(adev->vce.fw); in amdgpu_vce_sw_init()
171 adev->vce.fw = NULL; in amdgpu_vce_sw_init()
175 hdr = (const struct common_firmware_header *)adev->vce.fw->data; in amdgpu_vce_sw_init()
183 adev->vce.fw_version = ((version_major << 24) | (version_minor << 16) | in amdgpu_vce_sw_init()
187 AMDGPU_GEM_DOMAIN_VRAM, &adev->vce.vcpu_bo, in amdgpu_vce_sw_init()
188 &adev->vce.gpu_addr, &adev->vce.cpu_addr); in amdgpu_vce_sw_init()
195 atomic_set(&adev->vce.handles[i], 0); in amdgpu_vce_sw_init()
196 adev->vce.filp[i] = NULL; in amdgpu_vce_sw_init()
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Dvce_v3_0.c83 if (adev->vce.harvest_config == 0 || in vce_v3_0_ring_get_rptr()
84 adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE1) in vce_v3_0_ring_get_rptr()
86 else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) in vce_v3_0_ring_get_rptr()
115 if (adev->vce.harvest_config == 0 || in vce_v3_0_ring_get_wptr()
116 adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE1) in vce_v3_0_ring_get_wptr()
118 else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) in vce_v3_0_ring_get_wptr()
146 if (adev->vce.harvest_config == 0 || in vce_v3_0_ring_set_wptr()
147 adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE1) in vce_v3_0_ring_set_wptr()
149 else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) in vce_v3_0_ring_set_wptr()
272 if (adev->vce.harvest_config & (1 << idx)) in vce_v3_0_start()
[all …]
Dvce_v4_0.c178 WDOORBELL32(adev->vce.ring[0].doorbell_index, 0); in vce_v4_0_mmsch_start()
179 adev->wb.wb[adev->vce.ring[0].wptr_offs] = 0; in vce_v4_0_mmsch_start()
180 adev->vce.ring[0].wptr = 0; in vce_v4_0_mmsch_start()
181 adev->vce.ring[0].wptr_old = 0; in vce_v4_0_mmsch_start()
232 ring = &adev->vce.ring[0]; in vce_v4_0_sriov_start()
262 adev->vce.gpu_addr >> 8); in vce_v4_0_sriov_start()
265 (adev->vce.gpu_addr >> 40) & 0xff); in vce_v4_0_sriov_start()
272 adev->vce.gpu_addr >> 8); in vce_v4_0_sriov_start()
275 (adev->vce.gpu_addr >> 40) & 0xff); in vce_v4_0_sriov_start()
278 adev->vce.gpu_addr >> 8); in vce_v4_0_sriov_start()
[all …]
Dvce_v2_0.c183 WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR, (adev->vce.gpu_addr >> 8)); in vce_v2_0_mc_resume()
243 ring = &adev->vce.ring[0]; in vce_v2_0_start()
250 ring = &adev->vce.ring[1]; in vce_v2_0_start()
405 adev->vce.num_rings = 2; in vce_v2_0_early_init()
420 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 167, &adev->vce.irq); in vce_v2_0_sw_init()
433 for (i = 0; i < adev->vce.num_rings; i++) { in vce_v2_0_sw_init()
434 ring = &adev->vce.ring[i]; in vce_v2_0_sw_init()
437 &adev->vce.irq, 0, in vce_v2_0_sw_init()
468 for (i = 0; i < adev->vce.num_rings; i++) { in vce_v2_0_hw_init()
469 r = amdgpu_ring_test_helper(&adev->vce.ring[i]); in vce_v2_0_hw_init()
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Damdgpu_kms.c227 fw_info->ver = adev->vce.fw_version; in amdgpu_firmware_info()
228 fw_info->feature = adev->vce.fb_version; in amdgpu_firmware_info()
386 for (i = 0; i < adev->vce.num_rings; i++) in amdgpu_hw_ip_info()
387 if (adev->vce.ring[i].sched.ready) in amdgpu_hw_ip_info()
757 if (adev->vce.fw_version && in amdgpu_info_ioctl()
758 adev->vce.fw_version < AMDGPU_VCE_FW_53_45) in amdgpu_info_ioctl()
781 dev_info.vce_harvest_config = adev->vce.harvest_config; in amdgpu_info_ioctl()
Damdgpu_virt.c489 POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_VCE, adev->vce.fw_version); in amdgpu_virt_populate_vf2pf_ucode_info()
Damdgpu_ucode.c417 FW_VERSION_ATTR(vce_fw_version, 0444, vce.fw_version);
Damdgpu.h899 struct amdgpu_vce vce; member
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
Dradeon_vce.c65 INIT_DELAYED_WORK(&rdev->vce.idle_work, radeon_vce_idle_work_handler); in radeon_vce_init()
122 if (sscanf(c, "%2u]", &rdev->vce.fb_version) != 1) in radeon_vce_init()
126 start, mid, end, rdev->vce.fb_version); in radeon_vce_init()
128 rdev->vce.fw_version = (start << 24) | (mid << 16) | (end << 8); in radeon_vce_init()
131 if ((rdev->vce.fw_version != ((40 << 24) | (2 << 16) | (2 << 8))) && in radeon_vce_init()
132 (rdev->vce.fw_version != ((50 << 24) | (0 << 16) | (1 << 8))) && in radeon_vce_init()
133 (rdev->vce.fw_version != ((50 << 24) | (1 << 16) | (2 << 8)))) in radeon_vce_init()
144 &rdev->vce.vcpu_bo); in radeon_vce_init()
150 r = radeon_bo_reserve(rdev->vce.vcpu_bo, false); in radeon_vce_init()
152 radeon_bo_unref(&rdev->vce.vcpu_bo); in radeon_vce_init()
[all …]
Dvce_v1_0.c205 rdev->vce.keyselect = le32_to_cpu(sign->val[i].keyselect); in vce_v1_0_load_fw()
218 uint64_t addr = rdev->vce.gpu_addr; in vce_v1_0_resume()
254 WREG32(VCE_LMI_FW_START_KEYSEL, rdev->vce.keyselect); in vce_v1_0_resume()
Dvce_v2_0.c159 uint64_t addr = rdev->vce.gpu_addr; in vce_v2_0_resume()
Dradeon_drv.c296 MODULE_PARM_DESC(vce, "vce enable/disable vce support (1 = enable, 0 = disable)");
297 module_param_named(vce, radeon_vce, int, 0444);
Dradeon_kms.c526 *value = rdev->vce.fw_version; in radeon_info_ioctl()
529 *value = rdev->vce.fb_version; in radeon_info_ioctl()
Dradeon.h2390 struct radeon_vce vce; member
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu10_hwmgr.h111 uint32_t vce : 1; member
Dsmu8_hwmgr.h134 uint32_t vce : 1; member
/kernel/linux/linux-5.10/drivers/scsi/qla2xxx/
Dqla_isr.c2399 struct vp_ctrl_entry_24xx *vce) in qla_ctrlvp_completed() argument
2405 sp = qla2x00_get_sp_from_handle(vha, func, req, vce); in qla_ctrlvp_completed()
2409 if (vce->entry_status != 0) { in qla_ctrlvp_completed()
2412 sp->name, vce->entry_status); in qla_ctrlvp_completed()
2414 } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) { in qla_ctrlvp_completed()
2417 sp->name, le16_to_cpu(vce->comp_status), in qla_ctrlvp_completed()
2418 le16_to_cpu(vce->vp_idx_failed)); in qla_ctrlvp_completed()
Dqla_iocb.c3670 qla25xx_ctrlvp_iocb(srb_t *sp, struct vp_ctrl_entry_24xx *vce) in qla25xx_ctrlvp_iocb() argument
3674 vce->entry_type = VP_CTRL_IOCB_TYPE; in qla25xx_ctrlvp_iocb()
3675 vce->handle = sp->handle; in qla25xx_ctrlvp_iocb()
3676 vce->entry_count = 1; in qla25xx_ctrlvp_iocb()
3677 vce->command = cpu_to_le16(sp->u.iocb_cmd.u.ctrlvp.cmd); in qla25xx_ctrlvp_iocb()
3678 vce->vp_count = cpu_to_le16(1); in qla25xx_ctrlvp_iocb()
3686 vce->vp_idx_map[map] |= 1 << pos; in qla25xx_ctrlvp_iocb()