| /third_party/mesa3d/src/intel/common/ |
| D | intel_urb_config.c | 219 entries[i] = ROUND_DOWN_TO(entries[i], granularity[i]); in intel_get_urb_config()
361 r.task_entries = ROUND_DOWN_TO(r.task_entries, 8); in intel_get_mesh_urb_config()
373 r.mesh_entries = ROUND_DOWN_TO(r.mesh_entries, 8); in intel_get_mesh_urb_config()
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| D | intel_batch_decoder.c | 178 bo.map + ROUND_DOWN_TO(MIN2(bo.size, read_length), 4); in ctx_print_buffer()
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| /third_party/mesa3d/src/gallium/drivers/panfrost/ |
| D | pan_mempool.c | 143 offset = ROUND_DOWN_TO(aligned - sz, alignment); in panfrost_pool_alloc_aligned()
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| /third_party/mesa3d/src/intel/compiler/ |
| D | brw_nir_analyze_ubo_ranges.c | 170 const int start = ROUND_DOWN_TO(byte_offset, 32); in analyze_ubos_block()
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| D | brw_fs_reg_allocate.cpp | 1094 ROUND_DOWN_TO(inst->src[i].offset, REG_SIZE); in spill_reg()
1123 ROUND_DOWN_TO(inst->dst.offset, REG_SIZE); in spill_reg()
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| D | brw_compiler.h | 2029 return ROUND_DOWN_TO(i, 2); in brw_compute_first_urb_slot_required()
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| D | brw_vec4_nir.cpp | 591 src.offset = ROUND_DOWN_TO(offset, 16); in nir_emit_intrinsic()
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| D | brw_fs.cpp | 5984 ROUND_DOWN_TO(max_push_components / nir->info.gs.vertices_in, 8) / 8; in setup_gs_payload()
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| /third_party/mesa3d/src/util/ |
| D | u_math.h | 692 ROUND_DOWN_TO(uint64_t value, int32_t alignment) in ROUND_DOWN_TO() function
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| /third_party/mesa3d/src/freedreno/ir3/ |
| D | ir3_nir_analyze_ubo_ranges.c | 49 r->start = ROUND_DOWN_TO(offset, alignment * 16); in get_ubo_load_range()
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| /third_party/mesa3d/src/intel/blorp/ |
| D | blorp_blit.c | 1990 params->x0 = ROUND_DOWN_TO(params->x0, 2) * px_size_sa.width; in try_blorp_blit()
1991 params->y0 = ROUND_DOWN_TO(params->y0, 2) * px_size_sa.height; in try_blorp_blit()
2051 params->x0 = ROUND_DOWN_TO(params->x0, x_align) * 2; in try_blorp_blit()
2052 params->y0 = ROUND_DOWN_TO(params->y0, y_align) / 2; in try_blorp_blit()
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| D | blorp_clear.c | 441 *x0 = ROUND_DOWN_TO(*x0, x_align) / x_scaledown; in get_fast_clear_rect()
442 *y0 = ROUND_DOWN_TO(*y0, y_align) / y_scaledown; in get_fast_clear_rect()
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a6xx/ |
| D | fd6_gmem.c | 969 blit_scissor.minx = ROUND_DOWN_TO(blit_scissor.minx, 16); in set_blit_scissor()
970 blit_scissor.miny = ROUND_DOWN_TO(blit_scissor.miny, 4); in set_blit_scissor()
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| /third_party/mesa3d/docs/relnotes/ |
| D | 7.10.3.rst | 185 - intel: Fix ROUND_DOWN_TO macro
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| D | 20.1.0.rst | 3714 - util: move ALIGN/ROUND_DOWN_TO to u_math.h
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| D | 21.2.0.rst | 4752 - util/math: change ROUND_DOWN_TO to return a uint64_t
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| /third_party/mesa3d/src/intel/isl/ |
| D | isl_tiled_memcpy.c | 47 #define ALIGN_DOWN(a, b) ROUND_DOWN_TO(a, b)
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| /third_party/mesa3d/src/imagination/vulkan/ |
| D | pvr_device.c | 727 ROUND_DOWN_TO(max_common_size, in pvr_calc_fscommon_size_and_tiles_in_flight()
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| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_texture.c | 1371 unsigned level_base = ROUND_DOWN_TO(surface->u.gfx9.prt_level_offset[level], in si_texture_commit()
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| /third_party/mesa3d/src/amd/compiler/ |
| D | aco_register_allocation.cpp | 426 for (int i = 0; i < std::min<int>(max_regs_per_line, ROUND_DOWN_TO(regs.size, 4)); i += 4) { in print_regs()
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| D | aco_instruction_selection.cpp | 7619 bld.copy(bld.def(s1), Operand::c32(ROUND_DOWN_TO(nir_src_as_uint(instr->src[0]), max))); in visit_load_scratch()
7676 saddr = bld.copy(bld.def(s1), Operand::c32(ROUND_DOWN_TO(const_offset, max))); in visit_store_scratch()
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| /third_party/mesa3d/src/gallium/drivers/crocus/ |
| D | crocus_state.c | 8940 ice->urb.nr_vs_entries = ROUND_DOWN_TO(nr_vs_entries, 4);
8941 ice->urb.nr_gs_entries = ROUND_DOWN_TO(nr_gs_entries, 4);
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| /third_party/mesa3d/src/gallium/frontends/lavapipe/ |
| D | lvp_execute.c | 2640 size = ROUND_DOWN_TO(size, 4); in handle_fill_buffer()
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| /third_party/mesa3d/src/amd/vulkan/ |
| D | radv_device.c | 2734 vram_vis_free_space = ROUND_DOWN_TO(MIN2((total_free_space * 2) / 3, vram_vis_free_space), in radv_get_memory_budget_properties()
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