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Searched refs:src_reg (Results 1 – 25 of 59) sorted by relevance

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/third_party/mesa3d/src/intel/compiler/
Dtest_vec4_cmod_propagation.cpp159 src_reg src0 = src_reg(v, glsl_type::float_type); in TEST_F()
160 src_reg src1 = src_reg(v, glsl_type::float_type); in TEST_F()
161 src_reg zero(brw_imm_f(0.0f)); in TEST_F()
166 bld.CMP(dest_null, src_reg(dest), zero, BRW_CONDITIONAL_GE); in TEST_F()
195 src_reg src0 = src_reg(v, glsl_type::float_type); in TEST_F()
196 src_reg src1 = src_reg(v, glsl_type::float_type); in TEST_F()
197 src_reg zero(brw_imm_f(0.0f)); in TEST_F()
201 bld.CMP(dest_null, src_reg(dest), zero, BRW_CONDITIONAL_GE); in TEST_F()
232 src_reg src0 = src_reg(v, glsl_type::float_type); in TEST_F()
233 src_reg zero(brw_imm_f(0.0f)); in TEST_F()
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Dbrw_vec4.h126 src_reg shader_start_time;
172 const src_reg &src0);
174 const src_reg &src0, const src_reg &src1);
176 const src_reg &src0, const src_reg &src1,
177 const src_reg &src2);
183 #define EMIT1(op) vec4_instruction *op(const dst_reg &, const src_reg &);
184 #define EMIT2(op) vec4_instruction *op(const dst_reg &, const src_reg &, const src_reg &);
185 …e EMIT3(op) vec4_instruction *op(const dst_reg &, const src_reg &, const src_reg &, const src_reg …
207 vec4_instruction *CMP(dst_reg dst, src_reg src0, src_reg src1,
209 vec4_instruction *IF(src_reg src0, src_reg src1,
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Dbrw_vec4_surface_builder.cpp34 static src_reg
35 emit_stride(const vec4_builder &bld, const src_reg &src, unsigned size, in emit_stride()
50 return src_reg(dst); in emit_stride()
60 static src_reg
61 emit_insert(const vec4_builder &bld, const src_reg &src, in emit_insert()
65 return src_reg(); in emit_insert()
76 return emit_stride(bld, src_reg(tmp), n, has_simd4x2 ? 1 : 4, 1); in emit_insert()
91 src_reg
93 const src_reg &header, in emit_send()
94 const src_reg &addr, unsigned addr_sz, in emit_send()
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Dbrw_vec4_visitor.cpp32 const src_reg &src0, const src_reg &src1, in vec4_instruction()
33 const src_reg &src2) in vec4_instruction()
89 vec4_visitor::emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0, in emit()
90 const src_reg &src1, const src_reg &src2) in emit()
97 vec4_visitor::emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0, in emit()
98 const src_reg &src1) in emit()
104 vec4_visitor::emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0) in emit()
123 vec4_visitor::op(const dst_reg &dst, const src_reg &src0) \
130 vec4_visitor::op(const dst_reg &dst, const src_reg &src0, \
131 const src_reg &src1) \
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Dbrw_vec4_builder.h43 typedef brw::src_reg src_reg; typedef
245 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0) const in emit()
268 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0, in emit()
269 const src_reg &src1) const in emit()
289 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0, in emit()
290 const src_reg &src1, const src_reg &src2) const in emit()
335 emit_minmax(const dst_reg &dst, const src_reg &src0, in emit_minmax()
336 const src_reg &src1, brw_conditional_mod mod) const in emit_minmax()
347 src_reg
348 emit_uniformize(const src_reg &src) const in emit_uniformize()
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Dbrw_ir_vec4.h34 class src_reg : public backend_reg
37 DECLARE_RALLOC_CXX_OPERATORS(src_reg)
41 src_reg(enum brw_reg_file file, int nr, const glsl_type *type);
42 src_reg();
43 src_reg(struct ::brw_reg reg);
45 bool equals(const src_reg &r) const;
46 bool negative_equals(const src_reg &r) const;
48 src_reg(class vec4_visitor *v, const struct glsl_type *type);
49 src_reg(class vec4_visitor *v, const struct glsl_type *type, int size);
51 explicit src_reg(const dst_reg &reg);
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Dtest_vec4_register_coalesce.cpp140 src_reg something = src_reg(v, glsl_type::float_type); in TEST_F()
149 v->emit(v->MOV(m0, src_reg(temp))); in TEST_F()
159 src_reg something = src_reg(v, glsl_type::float_type); in TEST_F()
171 src_reg src = src_reg(temp); in TEST_F()
185 src_reg some_src_1 = src_reg(v, glsl_type::vec4_type); in TEST_F()
186 src_reg some_src_2 = src_reg(v, glsl_type::vec4_type); in TEST_F()
196 v->emit(v->MOV(m0, src_reg(temp))); in TEST_F()
206 src_reg some_src_1 = src_reg(v, glsl_type::vec4_type); in TEST_F()
207 src_reg some_src_2 = src_reg(v, glsl_type::vec4_type); in TEST_F()
215 v->emit(v->MOV(to, src_reg(temp))); in TEST_F()
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Dgfx6_gs_visitor.cpp65 this->vertex_output = src_reg(this, in emit_prolog()
69 this->vertex_output_offset = src_reg(this, glsl_type::uint_type); in emit_prolog()
83 this->temp = src_reg(this, glsl_type::uint_type); in emit_prolog()
91 this->first_vertex = src_reg(this, glsl_type::uint_type); in emit_prolog()
97 this->prim_count = src_reg(this, glsl_type::uint_type); in emit_prolog()
102 this->destination_indices = src_reg(this, glsl_type::uvec4_type); in emit_prolog()
104 this->sol_prim_written = src_reg(this, glsl_type::uint_type); in emit_prolog()
106 this->svbi = src_reg(this, glsl_type::uvec4_type); in emit_prolog()
108 this->max_svbi = src_reg(this, glsl_type::uvec4_type); in emit_prolog()
110 src_reg(retype(brw_vec1_grf(1, 4), BRW_REGISTER_TYPE_UD)))); in emit_prolog()
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Dbrw_fs_builder.h43 typedef fs_reg src_reg; typedef
276 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0) const in emit()
298 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0, in emit()
299 const src_reg &src1) const in emit()
320 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0, in emit()
321 const src_reg &src1, const src_reg &src2) const in emit()
344 emit(enum opcode opcode, const dst_reg &dst, const src_reg srcs[], in emit()
389 emit_minmax(const dst_reg &dst, const src_reg &src0, in emit_minmax()
390 const src_reg &src1, brw_conditional_mod mod) const in emit_minmax()
404 src_reg
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Dbrw_vec4_nir.cpp101 src_reg condition = get_nir_src(if_stmt->condition, BRW_REGISTER_TYPE_D, 1); in nir_emit_if()
184 new(v->mem_ctx) src_reg(v->get_nir_src(*indirect, in dst_reg_for_nir_reg()
219 src_reg
236 src_reg reg_as_src = src_reg(reg); in get_nir_src()
241 src_reg
249 src_reg
256 src_reg
261 return nir_src_is_const(src) ? src_reg(brw_imm_d(nir_src_as_int(src))) : in get_nir_src_imm()
265 src_reg
276 return src_reg(); in get_indirect_offset()
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Dbrw_vec4_surface_builder.h32 src_reg
34 const src_reg &surface, const src_reg &addr,
39 emit_untyped_write(const vec4_builder &bld, const src_reg &surface,
40 const src_reg &addr, const src_reg &src,
44 src_reg
46 const src_reg &surface, const src_reg &addr,
47 const src_reg &src0, const src_reg &src1,
Dbrw_vec4_tes.cpp86 input_read_header = src_reg(this, glsl_type::uvec4_type); in emit_prolog()
123 src_reg(brw_vec8_grf(1, 0)))); in nir_emit_intrinsic()
128 swizzle(src_reg(ATTR, 1, glsl_type::vec4_type), in nir_emit_intrinsic()
132 swizzle(src_reg(ATTR, 1, glsl_type::vec4_type), in nir_emit_intrinsic()
139 swizzle(src_reg(ATTR, 0, glsl_type::vec4_type), in nir_emit_intrinsic()
143 src_reg(ATTR, 1, glsl_type::float_type))); in nir_emit_intrinsic()
154 src_reg indirect_offset = get_indirect_offset(instr); in nir_emit_intrinsic()
156 src_reg header = input_read_header; in nir_emit_intrinsic()
160 src_reg clamped_indirect_offset = src_reg(this, glsl_type::uvec4_type); in nir_emit_intrinsic()
170 header = src_reg(this, glsl_type::uvec4_type); in nir_emit_intrinsic()
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Dgfx6_gs_visitor.h68 src_reg vertex_output;
69 src_reg vertex_output_offset;
70 src_reg temp;
71 src_reg first_vertex;
72 src_reg prim_count;
73 src_reg primitive_id;
76 src_reg sol_prim_written;
77 src_reg svbi;
78 src_reg max_svbi;
79 src_reg destination_indices;
Dtest_vec4_dead_code_eliminate.cpp137 src_reg r1 = src_reg(v, glsl_type::vec4_type); in TEST_F()
138 src_reg r2 = src_reg(v, glsl_type::vec4_type); in TEST_F()
139 src_reg r3 = src_reg(v, glsl_type::vec4_type); in TEST_F()
140 src_reg r4 = src_reg(v, glsl_type::vec4_type); in TEST_F()
141 src_reg r5 = src_reg(v, glsl_type::vec4_type); in TEST_F()
142 src_reg r6 = src_reg(v, glsl_type::vec4_type); in TEST_F()
Dbrw_vec4_tcs.cpp77 invocation_id = src_reg(this, glsl_type::uint_type); in emit_prolog()
118 emit(SHADER_OPCODE_BARRIER, dst_null_ud(), src_reg(header)); in emit_thread_end()
153 const src_reg &vertex_index, in emit_input_urb_read()
156 const src_reg &indirect_offset) in emit_input_urb_read()
169 inst = emit(VEC4_OPCODE_URB_READ, temp, src_reg(header)); in emit_input_urb_read()
179 emit(MOV(dst, swizzle(src_reg(temp), BRW_SWIZZLE_WWWW))); in emit_input_urb_read()
181 src_reg src = src_reg(temp); in emit_input_urb_read()
191 const src_reg &indirect_offset) in emit_output_urb_read()
201 vec4_instruction *read = emit(VEC4_OPCODE_URB_READ, dst, src_reg(header)); in emit_output_urb_read()
209 emit(MOV(dst, swizzle(src_reg(read->dst), in emit_output_urb_read()
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Dbrw_vec4_tcs.h58 const src_reg &vertex_index,
61 const src_reg &indirect_offset);
65 const src_reg &indirect_offset);
67 void emit_urb_write(const src_reg &value, unsigned writemask,
68 unsigned base_offset, const src_reg &indirect_offset);
77 src_reg invocation_id;
Dbrw_vec4_gs_visitor.cpp173 this->vertex_count = src_reg(this, glsl_type::uint_type); in emit_prolog()
184 this->control_data_bits = src_reg(this, glsl_type::uint_type); in emit_prolog()
220 src_reg r0(retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UD)); in emit_thread_end()
242 src_reg r0(retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UD)); in emit_urb_write_header()
318 src_reg dword_index(this, glsl_type::uint_type); in emit_control_data_bits()
320 src_reg prev_count(this, glsl_type::uint_type); in emit_control_data_bits()
334 src_reg r0(retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UD)); in emit_control_data_bits()
342 src_reg per_slot_offset(this, glsl_type::uint_type); in emit_control_data_bits()
356 src_reg channel(this, glsl_type::uint_type); in emit_control_data_bits()
359 src_reg one(this, glsl_type::uint_type); in emit_control_data_bits()
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Dbrw_fs_register_coalesce.cpp197 unsigned src_reg = ~0u, dst_reg = ~0u; in register_coalesce() local
213 if (src_reg != inst->src[0].nr) { in register_coalesce()
214 src_reg = inst->src[0].nr; in register_coalesce()
260 src_reg = ~0u; in register_coalesce()
265 src_var[i] = live.var_from_vgrf[src_reg] + i; in register_coalesce()
269 src_reg = ~0u; in register_coalesce()
305 scan_inst->dst.nr == src_reg) { in register_coalesce()
313 scan_inst->src[j].nr == src_reg) { in register_coalesce()
327 src_reg = ~0u; in register_coalesce()
Dtest_vec4_copy_propagation.cpp141 v->emit(v->ADD(a, src_reg(a), src_reg(a))); in TEST_F()
143 v->emit(v->MOV(b, swizzle(src_reg(a), BRW_SWIZZLE4(SWIZZLE_Y, in TEST_F()
149 v->MOV(c, swizzle(src_reg(b), BRW_SWIZZLE4(SWIZZLE_Y, in TEST_F()
170 v->emit(v->MOV(b, swizzle(src_reg(a), BRW_SWIZZLE4(SWIZZLE_X, in TEST_F()
178 v->MOV(c, swizzle(src_reg(b), BRW_SWIZZLE4(SWIZZLE_W, in TEST_F()
Dbrw_vec4_copy_propagation.cpp39 src_reg *value[4];
67 is_channel_updated(vec4_instruction *inst, src_reg *values[4], int ch) in is_channel_updated()
69 const src_reg *src = values[ch]; in is_channel_updated()
86 static src_reg
90 src_reg value; in get_copy_value()
95 src_reg src = *entry.value[i]; in get_copy_value()
111 return src_reg(); in get_copy_value()
114 return src_reg(); in get_copy_value()
136 src_reg value = in try_constant_propagate()
311 src_reg value = in try_copy_propagate()
/third_party/libbpf/include/linux/
Dfilter.h12 .src_reg = SRC, \
20 .src_reg = 0, \
28 .src_reg = 0, \
36 .src_reg = 0, \
44 .src_reg = 0, \
52 .src_reg = 0, \
60 .src_reg = SRC, \
68 .src_reg = SRC, \
76 .src_reg = 0, \
84 .src_reg = SRC, \
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/third_party/mesa3d/src/freedreno/ir3/
Dir3_cp.c332 struct ir3_register *src_reg) in is_valid_shared_copy() argument
334 return !(src_reg->flags & IR3_REG_SHARED) || in is_valid_shared_copy()
353 struct ir3_register *src_reg = src->srcs[0]; in reg_cp() local
356 if (!is_valid_shared_copy(instr, src, src_reg)) in reg_cp()
364 reg->array = src_reg->array; in reg_cp()
367 reg->def = src_reg->def; in reg_cp()
381 struct ir3_register *src_reg = src->srcs[0]; in reg_cp() local
384 if (!is_valid_shared_copy(instr, src, src_reg)) in reg_cp()
387 if (src_reg->flags & IR3_REG_ARRAY) in reg_cp()
394 if (lower_immed(ctx, instr, n, src_reg, new_flags)) in reg_cp()
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/third_party/mesa3d/src/gallium/drivers/r300/compiler/
Dradeon_inline_literals.c111 struct rc_src_register * src_reg = in rc_inline_literals() local
114 if (src_reg->File != RC_FILE_CONSTANT) { in rc_inline_literals()
118 &c->Program.Constants.Constants[src_reg->Index]; in rc_inline_literals()
125 swz = GET_SWZ(src_reg->Swizzle, chan); in rc_inline_literals()
143 if (ret == -1 && src_reg->Abs) { in rc_inline_literals()
164 src_reg->File = RC_FILE_INLINE; in rc_inline_literals()
165 src_reg->Index = r300_float; in rc_inline_literals()
166 src_reg->Swizzle = new_swizzle; in rc_inline_literals()
167 src_reg->Negate = src_reg->Negate ^ negate_mask; in rc_inline_literals()
/third_party/mesa3d/src/gallium/drivers/r300/compiler/tests/
Drc_test_helpers.c143 struct rc_src_register * src_reg = &inst->U.I.SrcReg[src_index]; in init_rc_normal_src() local
166 src_reg->Negate = RC_MASK_XYZW; in init_rc_normal_src()
171 src_reg->Abs = 1; in init_rc_normal_src()
176 src_reg->File = RC_FILE_TEMPORARY; in init_rc_normal_src()
178 src_reg->File = RC_FILE_INPUT; in init_rc_normal_src()
180 src_reg->File = RC_FILE_CONSTANT; in init_rc_normal_src()
182 src_reg->File = RC_FILE_NONE; in init_rc_normal_src()
187 src_reg->Index = strtol(tokens.Index.String, NULL, 10); in init_rc_normal_src()
195 src_reg->Swizzle = RC_SWIZZLE_XYZW; in init_rc_normal_src()
198 src_reg->Swizzle = RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_UNUSED); in init_rc_normal_src()
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/third_party/ltp/include/lapi/
Dbpf.h76 uint8_t src_reg:4; /* source register */ member
451 .src_reg = SRC, \
459 .src_reg = SRC, \
467 .src_reg = 0, \
475 .src_reg = 0, \
483 .src_reg = SRC, \
491 .src_reg = SRC, \
502 .src_reg = SRC, \
508 .src_reg = 0, \
520 .src_reg = 0, \
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