1&l4_wkup { /* 0x44c00000 */ 2 compatible = "ti,am4-l4-wkup", "simple-bus"; 3 reg = <0x44c00000 0x800>, 4 <0x44c00800 0x800>, 5 <0x44c01000 0x400>, 6 <0x44c01400 0x400>; 7 reg-names = "ap", "la", "ia0", "ia1"; 8 #address-cells = <1>; 9 #size-cells = <1>; 10 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */ 11 <0x00100000 0x44d00000 0x100000>, /* segment 1 */ 12 <0x00200000 0x44e00000 0x100000>; /* segment 2 */ 13 14 segment@0 { /* 0x44c00000 */ 15 compatible = "simple-bus"; 16 #address-cells = <1>; 17 #size-cells = <1>; 18 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */ 19 <0x00000800 0x00000800 0x000800>, /* ap 1 */ 20 <0x00001000 0x00001000 0x000400>, /* ap 2 */ 21 <0x00001400 0x00001400 0x000400>; /* ap 3 */ 22 }; 23 24 segment@100000 { /* 0x44d00000 */ 25 compatible = "simple-bus"; 26 #address-cells = <1>; 27 #size-cells = <1>; 28 ranges = <0x00000000 0x00100000 0x004000>, /* ap 4 */ 29 <0x00004000 0x00104000 0x001000>, /* ap 5 */ 30 <0x00080000 0x00180000 0x002000>, /* ap 6 */ 31 <0x00082000 0x00182000 0x001000>, /* ap 7 */ 32 <0x000f0000 0x001f0000 0x010000>; /* ap 8 */ 33 34 target-module@0 { /* 0x44d00000, ap 4 28.0 */ 35 compatible = "ti,sysc"; 36 status = "disabled"; 37 #address-cells = <1>; 38 #size-cells = <1>; 39 ranges = <0x0 0x0 0x4000>; 40 }; 41 42 target-module@80000 { /* 0x44d80000, ap 6 10.0 */ 43 compatible = "ti,sysc"; 44 status = "disabled"; 45 #address-cells = <1>; 46 #size-cells = <1>; 47 ranges = <0x0 0x80000 0x2000>; 48 }; 49 50 target-module@f0000 { /* 0x44df0000, ap 8 58.0 */ 51 compatible = "ti,sysc-omap4", "ti,sysc"; 52 reg = <0xf0000 0x4>; 53 reg-names = "rev"; 54 #address-cells = <1>; 55 #size-cells = <1>; 56 ranges = <0x0 0xf0000 0x10000>; 57 58 prcm: prcm@0 { 59 compatible = "ti,am4-prcm", "simple-bus"; 60 reg = <0x0 0x11000>; 61 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 62 #address-cells = <1>; 63 #size-cells = <1>; 64 ranges = <0 0 0x11000>; 65 66 prcm_clocks: clocks { 67 #address-cells = <1>; 68 #size-cells = <0>; 69 }; 70 71 prcm_clockdomains: clockdomains { 72 }; 73 }; 74 }; 75 }; 76 77 segment@200000 { /* 0x44e00000 */ 78 compatible = "simple-bus"; 79 #address-cells = <1>; 80 #size-cells = <1>; 81 ranges = <0x00000000 0x00200000 0x001000>, /* ap 9 */ 82 <0x00003000 0x00203000 0x001000>, /* ap 10 */ 83 <0x00004000 0x00204000 0x001000>, /* ap 11 */ 84 <0x00005000 0x00205000 0x001000>, /* ap 12 */ 85 <0x00006000 0x00206000 0x001000>, /* ap 13 */ 86 <0x00007000 0x00207000 0x001000>, /* ap 14 */ 87 <0x00008000 0x00208000 0x001000>, /* ap 15 */ 88 <0x00009000 0x00209000 0x001000>, /* ap 16 */ 89 <0x0000a000 0x0020a000 0x001000>, /* ap 17 */ 90 <0x0000b000 0x0020b000 0x001000>, /* ap 18 */ 91 <0x0000c000 0x0020c000 0x001000>, /* ap 19 */ 92 <0x0000d000 0x0020d000 0x001000>, /* ap 20 */ 93 <0x0000f000 0x0020f000 0x001000>, /* ap 21 */ 94 <0x00010000 0x00210000 0x010000>, /* ap 22 */ 95 <0x00030000 0x00230000 0x001000>, /* ap 23 */ 96 <0x00031000 0x00231000 0x001000>, /* ap 24 */ 97 <0x00032000 0x00232000 0x001000>, /* ap 25 */ 98 <0x00033000 0x00233000 0x001000>, /* ap 26 */ 99 <0x00034000 0x00234000 0x001000>, /* ap 27 */ 100 <0x00035000 0x00235000 0x001000>, /* ap 28 */ 101 <0x00036000 0x00236000 0x001000>, /* ap 29 */ 102 <0x00037000 0x00237000 0x001000>, /* ap 30 */ 103 <0x00038000 0x00238000 0x001000>, /* ap 31 */ 104 <0x00039000 0x00239000 0x001000>, /* ap 32 */ 105 <0x0003a000 0x0023a000 0x001000>, /* ap 33 */ 106 <0x0003e000 0x0023e000 0x001000>, /* ap 34 */ 107 <0x0003f000 0x0023f000 0x001000>, /* ap 35 */ 108 <0x00040000 0x00240000 0x040000>, /* ap 36 */ 109 <0x00080000 0x00280000 0x001000>, /* ap 37 */ 110 <0x00088000 0x00288000 0x008000>, /* ap 38 */ 111 <0x00092000 0x00292000 0x001000>, /* ap 39 */ 112 <0x00086000 0x00286000 0x001000>, /* ap 40 */ 113 <0x00087000 0x00287000 0x001000>, /* ap 41 */ 114 <0x00090000 0x00290000 0x001000>, /* ap 42 */ 115 <0x00091000 0x00291000 0x001000>; /* ap 43 */ 116 117 target-module@3000 { /* 0x44e03000, ap 10 0a.0 */ 118 compatible = "ti,sysc"; 119 status = "disabled"; 120 #address-cells = <1>; 121 #size-cells = <1>; 122 ranges = <0x0 0x3000 0x1000>; 123 }; 124 125 target-module@5000 { /* 0x44e05000, ap 12 30.0 */ 126 compatible = "ti,sysc"; 127 status = "disabled"; 128 #address-cells = <1>; 129 #size-cells = <1>; 130 ranges = <0x0 0x5000 0x1000>; 131 }; 132 133 target-module@7000 { /* 0x44e07000, ap 14 20.0 */ 134 compatible = "ti,sysc-omap2", "ti,sysc"; 135 reg = <0x7000 0x4>, 136 <0x7010 0x4>, 137 <0x7114 0x4>; 138 reg-names = "rev", "sysc", "syss"; 139 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 140 SYSC_OMAP2_SOFTRESET | 141 SYSC_OMAP2_AUTOIDLE)>; 142 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 143 <SYSC_IDLE_NO>, 144 <SYSC_IDLE_SMART>, 145 <SYSC_IDLE_SMART_WKUP>; 146 ti,syss-mask = <1>; 147 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 148 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_GPIO1_CLKCTRL 0>, 149 <&l4_wkup_clkctrl AM4_L4_WKUP_GPIO1_CLKCTRL 8>; 150 clock-names = "fck", "dbclk"; 151 #address-cells = <1>; 152 #size-cells = <1>; 153 ranges = <0x0 0x7000 0x1000>; 154 155 gpio0: gpio@0 { 156 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 157 reg = <0x0 0x1000>; 158 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 159 gpio-controller; 160 #gpio-cells = <2>; 161 interrupt-controller; 162 #interrupt-cells = <2>; 163 status = "disabled"; 164 }; 165 }; 166 167 target-module@9000 { /* 0x44e09000, ap 16 04.0 */ 168 compatible = "ti,sysc-omap2", "ti,sysc"; 169 reg = <0x9050 0x4>, 170 <0x9054 0x4>, 171 <0x9058 0x4>; 172 reg-names = "rev", "sysc", "syss"; 173 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 174 SYSC_OMAP2_SOFTRESET | 175 SYSC_OMAP2_AUTOIDLE)>; 176 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 177 <SYSC_IDLE_NO>, 178 <SYSC_IDLE_SMART>, 179 <SYSC_IDLE_SMART_WKUP>; 180 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 181 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_UART1_CLKCTRL 0>; 182 clock-names = "fck"; 183 #address-cells = <1>; 184 #size-cells = <1>; 185 ranges = <0x0 0x9000 0x1000>; 186 187 uart0: serial@0 { 188 compatible = "ti,am4372-uart","ti,omap2-uart"; 189 reg = <0x0 0x2000>; 190 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 191 }; 192 }; 193 194 target-module@b000 { /* 0x44e0b000, ap 18 48.0 */ 195 compatible = "ti,sysc-omap2", "ti,sysc"; 196 reg = <0xb000 0x8>, 197 <0xb010 0x8>, 198 <0xb090 0x8>; 199 reg-names = "rev", "sysc", "syss"; 200 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 201 SYSC_OMAP2_ENAWAKEUP | 202 SYSC_OMAP2_SOFTRESET | 203 SYSC_OMAP2_AUTOIDLE)>; 204 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 205 <SYSC_IDLE_NO>, 206 <SYSC_IDLE_SMART>, 207 <SYSC_IDLE_SMART_WKUP>; 208 ti,syss-mask = <1>; 209 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 210 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_I2C1_CLKCTRL 0>; 211 clock-names = "fck"; 212 #address-cells = <1>; 213 #size-cells = <1>; 214 ranges = <0x0 0xb000 0x1000>; 215 216 i2c0: i2c@0 { 217 compatible = "ti,am4372-i2c","ti,omap4-i2c"; 218 reg = <0x0 0x1000>; 219 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 220 #address-cells = <1>; 221 #size-cells = <0>; 222 status = "disabled"; 223 }; 224 }; 225 226 target-module@d000 { /* 0x44e0d000, ap 20 38.0 */ 227 compatible = "ti,sysc-omap4", "ti,sysc"; 228 reg = <0xd000 0x4>, 229 <0xd010 0x4>; 230 reg-names = "rev", "sysc"; 231 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 232 <SYSC_IDLE_NO>, 233 <SYSC_IDLE_SMART>, 234 <SYSC_IDLE_SMART_WKUP>; 235 /* Domains (P, C): wkup_pwrdm, l3s_tsc_clkdm */ 236 clocks = <&l3s_tsc_clkctrl AM4_L3S_TSC_ADC_TSC_CLKCTRL 0>; 237 clock-names = "fck"; 238 #address-cells = <1>; 239 #size-cells = <1>; 240 ranges = <0x0 0xd000 0x1000>; 241 242 tscadc: tscadc@0 { 243 compatible = "ti,am3359-tscadc"; 244 reg = <0x0 0x1000>; 245 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 246 clocks = <&adc_tsc_fck>; 247 clock-names = "fck"; 248 status = "disabled"; 249 dmas = <&edma 53 0>, <&edma 57 0>; 250 dma-names = "fifo0", "fifo1"; 251 252 tsc { 253 compatible = "ti,am3359-tsc"; 254 }; 255 256 adc { 257 #io-channel-cells = <1>; 258 compatible = "ti,am3359-adc"; 259 }; 260 261 }; 262 }; 263 264 target-module@10000 { /* 0x44e10000, ap 22 0c.0 */ 265 compatible = "ti,sysc-omap4", "ti,sysc"; 266 reg = <0x10000 0x4>; 267 reg-names = "rev"; 268 #address-cells = <1>; 269 #size-cells = <1>; 270 ranges = <0x0 0x10000 0x10000>; 271 272 scm: scm@0 { 273 compatible = "ti,am4-scm", "simple-bus"; 274 reg = <0x0 0x4000>; 275 #address-cells = <1>; 276 #size-cells = <1>; 277 ranges = <0 0 0x4000>; 278 279 am43xx_pinmux: pinmux@800 { 280 compatible = "ti,am437-padconf", 281 "pinctrl-single"; 282 reg = <0x800 0x31c>; 283 #address-cells = <1>; 284 #size-cells = <0>; 285 #pinctrl-cells = <1>; 286 #interrupt-cells = <1>; 287 interrupt-controller; 288 pinctrl-single,register-width = <32>; 289 pinctrl-single,function-mask = <0xffffffff>; 290 }; 291 292 scm_conf: scm_conf@0 { 293 compatible = "syscon", "simple-bus"; 294 reg = <0x0 0x800>; 295 #address-cells = <1>; 296 #size-cells = <1>; 297 298 phy_gmii_sel: phy-gmii-sel { 299 compatible = "ti,am43xx-phy-gmii-sel"; 300 reg = <0x650 0x4>; 301 #phy-cells = <2>; 302 }; 303 304 scm_clocks: clocks { 305 #address-cells = <1>; 306 #size-cells = <0>; 307 }; 308 }; 309 310 wkup_m3_ipc: wkup_m3_ipc@1324 { 311 compatible = "ti,am4372-wkup-m3-ipc"; 312 reg = <0x1324 0x44>; 313 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 314 ti,rproc = <&wkup_m3>; 315 mboxes = <&mailbox &mbox_wkupm3>; 316 }; 317 318 edma_xbar: dma-router@f90 { 319 compatible = "ti,am335x-edma-crossbar"; 320 reg = <0xf90 0x40>; 321 #dma-cells = <3>; 322 dma-requests = <64>; 323 dma-masters = <&edma>; 324 }; 325 326 scm_clockdomains: clockdomains { 327 }; 328 }; 329 }; 330 331 timer1_target: target-module@31000 { /* 0x44e31000, ap 24 40.0 */ 332 compatible = "ti,sysc-omap2-timer", "ti,sysc"; 333 reg = <0x31000 0x4>, 334 <0x31010 0x4>, 335 <0x31014 0x4>; 336 reg-names = "rev", "sysc", "syss"; 337 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 338 SYSC_OMAP2_SOFTRESET | 339 SYSC_OMAP2_AUTOIDLE)>; 340 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 341 <SYSC_IDLE_NO>, 342 <SYSC_IDLE_SMART>; 343 ti,syss-mask = <1>; 344 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 345 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_TIMER1_CLKCTRL 0>; 346 clock-names = "fck"; 347 #address-cells = <1>; 348 #size-cells = <1>; 349 ranges = <0x0 0x31000 0x1000>; 350 351 timer1: timer@0 { 352 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms"; 353 reg = <0x0 0x400>; 354 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 355 ti,timer-alwon; 356 clocks = <&timer1_fck>; 357 clock-names = "fck"; 358 }; 359 }; 360 361 target-module@33000 { /* 0x44e33000, ap 26 18.0 */ 362 compatible = "ti,sysc"; 363 status = "disabled"; 364 #address-cells = <1>; 365 #size-cells = <1>; 366 ranges = <0x0 0x33000 0x1000>; 367 }; 368 369 target-module@35000 { /* 0x44e35000, ap 28 50.0 */ 370 compatible = "ti,sysc-omap2", "ti,sysc"; 371 reg = <0x35000 0x4>, 372 <0x35010 0x4>, 373 <0x35014 0x4>; 374 reg-names = "rev", "sysc", "syss"; 375 ti,sysc-mask = <(SYSC_OMAP2_EMUFREE | 376 SYSC_OMAP2_SOFTRESET)>; 377 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 378 <SYSC_IDLE_NO>, 379 <SYSC_IDLE_SMART>, 380 <SYSC_IDLE_SMART_WKUP>; 381 ti,syss-mask = <1>; 382 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 383 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_WD_TIMER2_CLKCTRL 0>; 384 clock-names = "fck"; 385 #address-cells = <1>; 386 #size-cells = <1>; 387 ranges = <0x0 0x35000 0x1000>; 388 389 wdt: wdt@0 { 390 compatible = "ti,am4372-wdt","ti,omap3-wdt"; 391 reg = <0x0 0x1000>; 392 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 393 }; 394 }; 395 396 target-module@37000 { /* 0x44e37000, ap 30 08.0 */ 397 compatible = "ti,sysc"; 398 status = "disabled"; 399 #address-cells = <1>; 400 #size-cells = <1>; 401 ranges = <0x0 0x37000 0x1000>; 402 }; 403 404 target-module@39000 { /* 0x44e39000, ap 32 02.0 */ 405 compatible = "ti,sysc"; 406 status = "disabled"; 407 #address-cells = <1>; 408 #size-cells = <1>; 409 ranges = <0x0 0x39000 0x1000>; 410 }; 411 412 rtc_target: target-module@3e000 { /* 0x44e3e000, ap 34 60.0 */ 413 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 414 reg = <0x3e074 0x4>, 415 <0x3e078 0x4>; 416 reg-names = "rev", "sysc"; 417 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 418 <SYSC_IDLE_NO>, 419 <SYSC_IDLE_SMART>, 420 <SYSC_IDLE_SMART_WKUP>; 421 /* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */ 422 clocks = <&l4_rtc_clkctrl AM4_L4_RTC_RTC_CLKCTRL 0>; 423 clock-names = "fck"; 424 #address-cells = <1>; 425 #size-cells = <1>; 426 ranges = <0x0 0x3e000 0x1000>; 427 428 rtc: rtc@0 { 429 compatible = "ti,am4372-rtc", "ti,am3352-rtc", 430 "ti,da830-rtc"; 431 reg = <0x0 0x1000>; 432 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH 433 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 434 clocks = <&clk_32768_ck>; 435 clock-names = "int-clk"; 436 system-power-controller; 437 status = "disabled"; 438 }; 439 }; 440 441 target-module@40000 { /* 0x44e40000, ap 36 68.0 */ 442 compatible = "ti,sysc"; 443 status = "disabled"; 444 #address-cells = <1>; 445 #size-cells = <1>; 446 ranges = <0x0 0x40000 0x40000>; 447 }; 448 449 target-module@86000 { /* 0x44e86000, ap 40 70.0 */ 450 compatible = "ti,sysc-omap2", "ti,sysc"; 451 reg = <0x86000 0x4>, 452 <0x86004 0x4>; 453 reg-names = "rev", "sysc"; 454 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 455 <SYSC_IDLE_NO>; 456 /* Domains (P, C): wkup_pwrdm, l4_wkup_aon_clkdm */ 457 clocks = <&l4_wkup_aon_clkctrl AM4_L4_WKUP_AON_COUNTER_32K_CLKCTRL 0>; 458 clock-names = "fck"; 459 #address-cells = <1>; 460 #size-cells = <1>; 461 ranges = <0x0 0x86000 0x1000>; 462 463 counter32k: counter@0 { 464 compatible = "ti,am4372-counter32k","ti,omap-counter32k"; 465 reg = <0x0 0x40>; 466 }; 467 }; 468 469 target-module@88000 { /* 0x44e88000, ap 38 12.0 */ 470 compatible = "ti,sysc"; 471 status = "disabled"; 472 #address-cells = <1>; 473 #size-cells = <1>; 474 ranges = <0x00000000 0x00088000 0x00008000>, 475 <0x00008000 0x00090000 0x00001000>, 476 <0x00009000 0x00091000 0x00001000>; 477 }; 478 }; 479}; 480 481&l4_fast { /* 0x4a000000 */ 482 compatible = "ti,am4-l4-fast", "simple-bus"; 483 reg = <0x4a000000 0x800>, 484 <0x4a000800 0x800>, 485 <0x4a001000 0x400>; 486 reg-names = "ap", "la", "ia0"; 487 #address-cells = <1>; 488 #size-cells = <1>; 489 ranges = <0x00000000 0x4a000000 0x1000000>; /* segment 0 */ 490 491 segment@0 { /* 0x4a000000 */ 492 compatible = "simple-bus"; 493 #address-cells = <1>; 494 #size-cells = <1>; 495 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */ 496 <0x00000800 0x00000800 0x000800>, /* ap 1 */ 497 <0x00001000 0x00001000 0x000400>, /* ap 2 */ 498 <0x00100000 0x00100000 0x008000>, /* ap 3 */ 499 <0x00108000 0x00108000 0x001000>, /* ap 4 */ 500 <0x00400000 0x00400000 0x002000>, /* ap 5 */ 501 <0x00402000 0x00402000 0x001000>, /* ap 6 */ 502 <0x00200000 0x00200000 0x080000>, /* ap 7 */ 503 <0x00280000 0x00280000 0x001000>; /* ap 8 */ 504 505 target-module@100000 { /* 0x4a100000, ap 3 04.0 */ 506 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 507 reg = <0x101200 0x4>, 508 <0x101208 0x4>, 509 <0x101204 0x4>; 510 reg-names = "rev", "sysc", "syss"; 511 ti,sysc-mask = <0>; 512 ti,sysc-midle = <SYSC_IDLE_FORCE>, 513 <SYSC_IDLE_NO>; 514 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 515 <SYSC_IDLE_NO>; 516 ti,syss-mask = <1>; 517 clocks = <&cpsw_125mhz_clkctrl AM4_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>; 518 clock-names = "fck"; 519 #address-cells = <1>; 520 #size-cells = <1>; 521 ranges = <0x0 0x100000 0x8000>; 522 523 mac_sw: switch@0 { 524 compatible = "ti,am4372-cpsw-switch", "ti,cpsw-switch"; 525 reg = <0x0 0x4000>; 526 ranges = <0 0 0x4000>; 527 clocks = <&cpsw_125mhz_gclk>, <&dpll_clksel_mac_clk>; 528 clock-names = "fck", "50mclk"; 529 assigned-clocks = <&dpll_clksel_mac_clk>; 530 assigned-clock-rates = <50000000>; 531 #address-cells = <1>; 532 #size-cells = <1>; 533 syscon = <&scm_conf>; 534 status = "disabled"; 535 536 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH 537 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH 538 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 539 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 540 interrupt-names = "rx_thresh", "rx", "tx", "misc"; 541 542 ethernet-ports { 543 #address-cells = <1>; 544 #size-cells = <0>; 545 546 cpsw_port1: port@1 { 547 reg = <1>; 548 label = "port1"; 549 mac-address = [ 00 00 00 00 00 00 ]; 550 phys = <&phy_gmii_sel 1 0>; 551 }; 552 553 cpsw_port2: port@2 { 554 reg = <2>; 555 label = "port2"; 556 mac-address = [ 00 00 00 00 00 00 ]; 557 phys = <&phy_gmii_sel 2 0>; 558 }; 559 }; 560 561 davinci_mdio_sw: mdio@1000 { 562 compatible = "ti,am4372-mdio", "ti,cpsw-mdio","ti,davinci_mdio"; 563 clocks = <&cpsw_125mhz_gclk>; 564 clock-names = "fck"; 565 #address-cells = <1>; 566 #size-cells = <0>; 567 bus_freq = <1000000>; 568 reg = <0x1000 0x100>; 569 }; 570 571 cpts { 572 clocks = <&cpsw_cpts_rft_clk>; 573 clock-names = "cpts"; 574 }; 575 }; 576 }; 577 578 target-module@200000 { /* 0x4a200000, ap 7 02.0 */ 579 compatible = "ti,sysc"; 580 status = "disabled"; 581 #address-cells = <1>; 582 #size-cells = <1>; 583 ranges = <0x0 0x200000 0x80000>; 584 }; 585 586 target-module@400000 { /* 0x4a400000, ap 5 08.0 */ 587 compatible = "ti,sysc"; 588 status = "disabled"; 589 #address-cells = <1>; 590 #size-cells = <1>; 591 ranges = <0x0 0x400000 0x2000>; 592 }; 593 }; 594}; 595 596&l4_per { /* 0x48000000 */ 597 compatible = "ti,am4-l4-per", "simple-bus"; 598 reg = <0x48000000 0x800>, 599 <0x48000800 0x800>, 600 <0x48001000 0x400>, 601 <0x48001400 0x400>, 602 <0x48001800 0x400>, 603 <0x48001c00 0x400>; 604 reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3"; 605 #address-cells = <1>; 606 #size-cells = <1>; 607 ranges = <0x00000000 0x48000000 0x100000>, /* segment 0 */ 608 <0x00100000 0x48100000 0x100000>, /* segment 1 */ 609 <0x00200000 0x48200000 0x100000>, /* segment 2 */ 610 <0x00300000 0x48300000 0x100000>, /* segment 3 */ 611 <0x46000000 0x46000000 0x400000>, /* l3 data port */ 612 <0x46400000 0x46400000 0x400000>; /* l3 data port */ 613 614 segment@0 { /* 0x48000000 */ 615 compatible = "simple-bus"; 616 #address-cells = <1>; 617 #size-cells = <1>; 618 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */ 619 <0x00000800 0x00000800 0x000800>, /* ap 1 */ 620 <0x00001000 0x00001000 0x000400>, /* ap 2 */ 621 <0x00001400 0x00001400 0x000400>, /* ap 3 */ 622 <0x00001800 0x00001800 0x000400>, /* ap 4 */ 623 <0x00001c00 0x00001c00 0x000400>, /* ap 5 */ 624 <0x00008000 0x00008000 0x001000>, /* ap 6 */ 625 <0x00009000 0x00009000 0x001000>, /* ap 7 */ 626 <0x00022000 0x00022000 0x001000>, /* ap 8 */ 627 <0x00023000 0x00023000 0x001000>, /* ap 9 */ 628 <0x00024000 0x00024000 0x001000>, /* ap 10 */ 629 <0x00025000 0x00025000 0x001000>, /* ap 11 */ 630 <0x0002a000 0x0002a000 0x001000>, /* ap 12 */ 631 <0x0002b000 0x0002b000 0x001000>, /* ap 13 */ 632 <0x00038000 0x00038000 0x002000>, /* ap 14 */ 633 <0x0003a000 0x0003a000 0x001000>, /* ap 15 */ 634 <0x0003c000 0x0003c000 0x002000>, /* ap 16 */ 635 <0x0003e000 0x0003e000 0x001000>, /* ap 17 */ 636 <0x00040000 0x00040000 0x001000>, /* ap 18 */ 637 <0x00041000 0x00041000 0x001000>, /* ap 19 */ 638 <0x00042000 0x00042000 0x001000>, /* ap 20 */ 639 <0x00043000 0x00043000 0x001000>, /* ap 21 */ 640 <0x00044000 0x00044000 0x001000>, /* ap 22 */ 641 <0x00045000 0x00045000 0x001000>, /* ap 23 */ 642 <0x00046000 0x00046000 0x001000>, /* ap 24 */ 643 <0x00047000 0x00047000 0x001000>, /* ap 25 */ 644 <0x00048000 0x00048000 0x001000>, /* ap 26 */ 645 <0x00049000 0x00049000 0x001000>, /* ap 27 */ 646 <0x0004c000 0x0004c000 0x001000>, /* ap 28 */ 647 <0x0004d000 0x0004d000 0x001000>, /* ap 29 */ 648 <0x00060000 0x00060000 0x001000>, /* ap 30 */ 649 <0x00061000 0x00061000 0x001000>, /* ap 31 */ 650 <0x00080000 0x00080000 0x010000>, /* ap 32 */ 651 <0x00090000 0x00090000 0x001000>, /* ap 33 */ 652 <0x00030000 0x00030000 0x001000>, /* ap 65 */ 653 <0x00031000 0x00031000 0x001000>, /* ap 66 */ 654 <0x0004a000 0x0004a000 0x001000>, /* ap 71 */ 655 <0x0004b000 0x0004b000 0x001000>, /* ap 72 */ 656 <0x000c8000 0x000c8000 0x001000>, /* ap 73 */ 657 <0x000c9000 0x000c9000 0x001000>, /* ap 74 */ 658 <0x000ca000 0x000ca000 0x001000>, /* ap 77 */ 659 <0x000cb000 0x000cb000 0x001000>, /* ap 78 */ 660 <0x00034000 0x00034000 0x001000>, /* ap 80 */ 661 <0x00035000 0x00035000 0x001000>, /* ap 81 */ 662 <0x00036000 0x00036000 0x001000>, /* ap 84 */ 663 <0x00037000 0x00037000 0x001000>, /* ap 85 */ 664 <0x46000000 0x46000000 0x400000>, /* l3 data port */ 665 <0x46400000 0x46400000 0x400000>; /* l3 data port */ 666 667 target-module@8000 { /* 0x48008000, ap 6 10.0 */ 668 compatible = "ti,sysc"; 669 status = "disabled"; 670 #address-cells = <1>; 671 #size-cells = <1>; 672 ranges = <0x0 0x8000 0x1000>; 673 }; 674 675 target-module@22000 { /* 0x48022000, ap 8 0a.0 */ 676 compatible = "ti,sysc-omap2", "ti,sysc"; 677 reg = <0x22050 0x4>, 678 <0x22054 0x4>, 679 <0x22058 0x4>; 680 reg-names = "rev", "sysc", "syss"; 681 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 682 SYSC_OMAP2_SOFTRESET | 683 SYSC_OMAP2_AUTOIDLE)>; 684 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 685 <SYSC_IDLE_NO>, 686 <SYSC_IDLE_SMART>, 687 <SYSC_IDLE_SMART_WKUP>; 688 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 689 clocks = <&l4ls_clkctrl AM4_L4LS_UART2_CLKCTRL 0>; 690 clock-names = "fck"; 691 #address-cells = <1>; 692 #size-cells = <1>; 693 ranges = <0x0 0x22000 0x1000>; 694 695 uart1: serial@0 { 696 compatible = "ti,am4372-uart","ti,omap2-uart"; 697 reg = <0x0 0x2000>; 698 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 699 status = "disabled"; 700 }; 701 }; 702 703 target-module@24000 { /* 0x48024000, ap 10 1c.0 */ 704 compatible = "ti,sysc-omap2", "ti,sysc"; 705 reg = <0x24050 0x4>, 706 <0x24054 0x4>, 707 <0x24058 0x4>; 708 reg-names = "rev", "sysc", "syss"; 709 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 710 SYSC_OMAP2_SOFTRESET | 711 SYSC_OMAP2_AUTOIDLE)>; 712 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 713 <SYSC_IDLE_NO>, 714 <SYSC_IDLE_SMART>, 715 <SYSC_IDLE_SMART_WKUP>; 716 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 717 clocks = <&l4ls_clkctrl AM4_L4LS_UART3_CLKCTRL 0>; 718 clock-names = "fck"; 719 #address-cells = <1>; 720 #size-cells = <1>; 721 ranges = <0x0 0x24000 0x1000>; 722 723 uart2: serial@0 { 724 compatible = "ti,am4372-uart","ti,omap2-uart"; 725 reg = <0x0 0x2000>; 726 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 727 status = "disabled"; 728 }; 729 }; 730 731 target-module@2a000 { /* 0x4802a000, ap 12 22.0 */ 732 compatible = "ti,sysc-omap2", "ti,sysc"; 733 reg = <0x2a000 0x8>, 734 <0x2a010 0x8>, 735 <0x2a090 0x8>; 736 reg-names = "rev", "sysc", "syss"; 737 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 738 SYSC_OMAP2_ENAWAKEUP | 739 SYSC_OMAP2_SOFTRESET | 740 SYSC_OMAP2_AUTOIDLE)>; 741 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 742 <SYSC_IDLE_NO>, 743 <SYSC_IDLE_SMART>, 744 <SYSC_IDLE_SMART_WKUP>; 745 ti,syss-mask = <1>; 746 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 747 clocks = <&l4ls_clkctrl AM4_L4LS_I2C2_CLKCTRL 0>; 748 clock-names = "fck"; 749 #address-cells = <1>; 750 #size-cells = <1>; 751 ranges = <0x0 0x2a000 0x1000>; 752 753 i2c1: i2c@0 { 754 compatible = "ti,am4372-i2c","ti,omap4-i2c"; 755 reg = <0x0 0x1000>; 756 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 757 #address-cells = <1>; 758 #size-cells = <0>; 759 status = "disabled"; 760 }; 761 }; 762 763 target-module@30000 { /* 0x48030000, ap 65 08.0 */ 764 compatible = "ti,sysc-omap2", "ti,sysc"; 765 reg = <0x30000 0x4>, 766 <0x30110 0x4>, 767 <0x30114 0x4>; 768 reg-names = "rev", "sysc", "syss"; 769 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 770 SYSC_OMAP2_SOFTRESET | 771 SYSC_OMAP2_AUTOIDLE)>; 772 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 773 <SYSC_IDLE_NO>, 774 <SYSC_IDLE_SMART>; 775 ti,syss-mask = <1>; 776 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 777 clocks = <&l4ls_clkctrl AM4_L4LS_SPI0_CLKCTRL 0>; 778 clock-names = "fck"; 779 #address-cells = <1>; 780 #size-cells = <1>; 781 ranges = <0x0 0x30000 0x1000>; 782 783 spi0: spi@0 { 784 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 785 reg = <0x0 0x400>; 786 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 787 #address-cells = <1>; 788 #size-cells = <0>; 789 status = "disabled"; 790 }; 791 }; 792 793 target-module@34000 { /* 0x48034000, ap 80 56.0 */ 794 compatible = "ti,sysc"; 795 status = "disabled"; 796 #address-cells = <1>; 797 #size-cells = <1>; 798 ranges = <0x0 0x34000 0x1000>; 799 }; 800 801 target-module@36000 { /* 0x48036000, ap 84 3e.0 */ 802 compatible = "ti,sysc"; 803 status = "disabled"; 804 #address-cells = <1>; 805 #size-cells = <1>; 806 ranges = <0x0 0x36000 0x1000>; 807 }; 808 809 target-module@38000 { /* 0x48038000, ap 14 04.0 */ 810 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 811 reg = <0x38000 0x4>, 812 <0x38004 0x4>; 813 reg-names = "rev", "sysc"; 814 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 815 <SYSC_IDLE_NO>, 816 <SYSC_IDLE_SMART>; 817 /* Domains (P, C): per_pwrdm, l3s_clkdm */ 818 clocks = <&l3s_clkctrl AM4_L3S_MCASP0_CLKCTRL 0>; 819 clock-names = "fck"; 820 #address-cells = <1>; 821 #size-cells = <1>; 822 ranges = <0x0 0x38000 0x2000>, 823 <0x46000000 0x46000000 0x400000>; 824 825 mcasp0: mcasp@0 { 826 compatible = "ti,am33xx-mcasp-audio"; 827 reg = <0x0 0x2000>, 828 <0x46000000 0x400000>; 829 reg-names = "mpu", "dat"; 830 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 831 <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 832 interrupt-names = "tx", "rx"; 833 status = "disabled"; 834 dmas = <&edma 8 2>, 835 <&edma 9 2>; 836 dma-names = "tx", "rx"; 837 }; 838 }; 839 840 target-module@3c000 { /* 0x4803c000, ap 16 2a.0 */ 841 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 842 reg = <0x3c000 0x4>, 843 <0x3c004 0x4>; 844 reg-names = "rev", "sysc"; 845 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 846 <SYSC_IDLE_NO>, 847 <SYSC_IDLE_SMART>; 848 /* Domains (P, C): per_pwrdm, l3s_clkdm */ 849 clocks = <&l3s_clkctrl AM4_L3S_MCASP1_CLKCTRL 0>; 850 clock-names = "fck"; 851 #address-cells = <1>; 852 #size-cells = <1>; 853 ranges = <0x0 0x3c000 0x2000>, 854 <0x46400000 0x46400000 0x400000>; 855 856 mcasp1: mcasp@0 { 857 compatible = "ti,am33xx-mcasp-audio"; 858 reg = <0x0 0x2000>, 859 <0x46400000 0x400000>; 860 reg-names = "mpu", "dat"; 861 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 862 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 863 interrupt-names = "tx", "rx"; 864 status = "disabled"; 865 dmas = <&edma 10 2>, 866 <&edma 11 2>; 867 dma-names = "tx", "rx"; 868 }; 869 }; 870 871 timer2_target: target-module@40000 { /* 0x48040000, ap 18 1e.0 */ 872 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 873 reg = <0x40000 0x4>, 874 <0x40010 0x4>, 875 <0x40014 0x4>; 876 reg-names = "rev", "sysc", "syss"; 877 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 878 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 879 <SYSC_IDLE_NO>, 880 <SYSC_IDLE_SMART>, 881 <SYSC_IDLE_SMART_WKUP>; 882 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 883 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER2_CLKCTRL 0>; 884 clock-names = "fck"; 885 #address-cells = <1>; 886 #size-cells = <1>; 887 ranges = <0x0 0x40000 0x1000>; 888 889 timer2: timer@0 { 890 compatible = "ti,am4372-timer","ti,am335x-timer"; 891 reg = <0x0 0x400>; 892 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 893 clocks = <&timer2_fck>; 894 clock-names = "fck"; 895 }; 896 }; 897 898 target-module@42000 { /* 0x48042000, ap 20 24.0 */ 899 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 900 reg = <0x42000 0x4>, 901 <0x42010 0x4>, 902 <0x42014 0x4>; 903 reg-names = "rev", "sysc", "syss"; 904 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 905 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 906 <SYSC_IDLE_NO>, 907 <SYSC_IDLE_SMART>, 908 <SYSC_IDLE_SMART_WKUP>; 909 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 910 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER3_CLKCTRL 0>; 911 clock-names = "fck"; 912 #address-cells = <1>; 913 #size-cells = <1>; 914 ranges = <0x0 0x42000 0x1000>; 915 916 timer3: timer@0 { 917 compatible = "ti,am4372-timer","ti,am335x-timer"; 918 reg = <0x0 0x400>; 919 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 920 status = "disabled"; 921 }; 922 }; 923 924 target-module@44000 { /* 0x48044000, ap 22 26.0 */ 925 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 926 reg = <0x44000 0x4>, 927 <0x44010 0x4>, 928 <0x44014 0x4>; 929 reg-names = "rev", "sysc", "syss"; 930 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 931 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 932 <SYSC_IDLE_NO>, 933 <SYSC_IDLE_SMART>, 934 <SYSC_IDLE_SMART_WKUP>; 935 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 936 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER4_CLKCTRL 0>; 937 clock-names = "fck"; 938 #address-cells = <1>; 939 #size-cells = <1>; 940 ranges = <0x0 0x44000 0x1000>; 941 942 timer4: timer@0 { 943 compatible = "ti,am4372-timer","ti,am335x-timer"; 944 reg = <0x0 0x400>; 945 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 946 ti,timer-pwm; 947 status = "disabled"; 948 }; 949 }; 950 951 target-module@46000 { /* 0x48046000, ap 24 28.0 */ 952 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 953 reg = <0x46000 0x4>, 954 <0x46010 0x4>, 955 <0x46014 0x4>; 956 reg-names = "rev", "sysc", "syss"; 957 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 958 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 959 <SYSC_IDLE_NO>, 960 <SYSC_IDLE_SMART>, 961 <SYSC_IDLE_SMART_WKUP>; 962 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 963 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER5_CLKCTRL 0>; 964 clock-names = "fck"; 965 #address-cells = <1>; 966 #size-cells = <1>; 967 ranges = <0x0 0x46000 0x1000>; 968 969 timer5: timer@0 { 970 compatible = "ti,am4372-timer","ti,am335x-timer"; 971 reg = <0x0 0x400>; 972 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 973 ti,timer-pwm; 974 status = "disabled"; 975 }; 976 }; 977 978 target-module@48000 { /* 0x48048000, ap 26 1a.0 */ 979 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 980 reg = <0x48000 0x4>, 981 <0x48010 0x4>, 982 <0x48014 0x4>; 983 reg-names = "rev", "sysc", "syss"; 984 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 985 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 986 <SYSC_IDLE_NO>, 987 <SYSC_IDLE_SMART>, 988 <SYSC_IDLE_SMART_WKUP>; 989 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 990 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER6_CLKCTRL 0>; 991 clock-names = "fck"; 992 #address-cells = <1>; 993 #size-cells = <1>; 994 ranges = <0x0 0x48000 0x1000>; 995 996 timer6: timer@0 { 997 compatible = "ti,am4372-timer","ti,am335x-timer"; 998 reg = <0x0 0x400>; 999 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 1000 ti,timer-pwm; 1001 status = "disabled"; 1002 }; 1003 }; 1004 1005 target-module@4a000 { /* 0x4804a000, ap 71 48.0 */ 1006 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 1007 reg = <0x4a000 0x4>, 1008 <0x4a010 0x4>, 1009 <0x4a014 0x4>; 1010 reg-names = "rev", "sysc", "syss"; 1011 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1012 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1013 <SYSC_IDLE_NO>, 1014 <SYSC_IDLE_SMART>, 1015 <SYSC_IDLE_SMART_WKUP>; 1016 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1017 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER7_CLKCTRL 0>; 1018 clock-names = "fck"; 1019 #address-cells = <1>; 1020 #size-cells = <1>; 1021 ranges = <0x0 0x4a000 0x1000>; 1022 1023 timer7: timer@0 { 1024 compatible = "ti,am4372-timer","ti,am335x-timer"; 1025 reg = <0x0 0x400>; 1026 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; 1027 ti,timer-pwm; 1028 status = "disabled"; 1029 }; 1030 }; 1031 1032 target-module@4c000 { /* 0x4804c000, ap 28 36.0 */ 1033 compatible = "ti,sysc-omap2", "ti,sysc"; 1034 reg = <0x4c000 0x4>, 1035 <0x4c010 0x4>, 1036 <0x4c114 0x4>; 1037 reg-names = "rev", "sysc", "syss"; 1038 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1039 SYSC_OMAP2_SOFTRESET | 1040 SYSC_OMAP2_AUTOIDLE)>; 1041 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1042 <SYSC_IDLE_NO>, 1043 <SYSC_IDLE_SMART>, 1044 <SYSC_IDLE_SMART_WKUP>; 1045 ti,syss-mask = <1>; 1046 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1047 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO2_CLKCTRL 0>, 1048 <&l4ls_clkctrl AM4_L4LS_GPIO2_CLKCTRL 8>; 1049 clock-names = "fck", "dbclk"; 1050 #address-cells = <1>; 1051 #size-cells = <1>; 1052 ranges = <0x0 0x4c000 0x1000>; 1053 1054 gpio1: gpio@0 { 1055 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 1056 reg = <0x0 0x1000>; 1057 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 1058 gpio-controller; 1059 #gpio-cells = <2>; 1060 interrupt-controller; 1061 #interrupt-cells = <2>; 1062 status = "disabled"; 1063 }; 1064 }; 1065 1066 target-module@60000 { /* 0x48060000, ap 30 14.0 */ 1067 compatible = "ti,sysc-omap2", "ti,sysc"; 1068 reg = <0x602fc 0x4>, 1069 <0x60110 0x4>, 1070 <0x60114 0x4>; 1071 reg-names = "rev", "sysc", "syss"; 1072 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1073 SYSC_OMAP2_ENAWAKEUP | 1074 SYSC_OMAP2_SOFTRESET | 1075 SYSC_OMAP2_AUTOIDLE)>; 1076 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1077 <SYSC_IDLE_NO>, 1078 <SYSC_IDLE_SMART>; 1079 ti,syss-mask = <1>; 1080 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1081 clocks = <&l4ls_clkctrl AM4_L4LS_MMC1_CLKCTRL 0>; 1082 clock-names = "fck"; 1083 #address-cells = <1>; 1084 #size-cells = <1>; 1085 ranges = <0x0 0x60000 0x1000>; 1086 1087 mmc1: mmc@0 { 1088 compatible = "ti,am437-sdhci"; 1089 reg = <0x0 0x1000>; 1090 ti,needs-special-reset; 1091 dmas = <&edma 24 0>, 1092 <&edma 25 0>; 1093 dma-names = "tx", "rx"; 1094 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; 1095 status = "disabled"; 1096 }; 1097 }; 1098 1099 target-module@80000 { /* 0x48080000, ap 32 18.0 */ 1100 compatible = "ti,sysc-omap2", "ti,sysc"; 1101 reg = <0x80000 0x4>, 1102 <0x80010 0x4>, 1103 <0x80014 0x4>; 1104 reg-names = "rev", "sysc", "syss"; 1105 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1106 SYSC_OMAP2_SOFTRESET | 1107 SYSC_OMAP2_AUTOIDLE)>; 1108 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1109 <SYSC_IDLE_NO>, 1110 <SYSC_IDLE_SMART>; 1111 ti,syss-mask = <1>; 1112 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1113 clocks = <&l4ls_clkctrl AM4_L4LS_ELM_CLKCTRL 0>; 1114 clock-names = "fck"; 1115 #address-cells = <1>; 1116 #size-cells = <1>; 1117 ranges = <0x0 0x80000 0x10000>; 1118 1119 elm: elm@0 { 1120 compatible = "ti,am3352-elm"; 1121 reg = <0x0 0x2000>; 1122 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 1123 clocks = <&l4ls_gclk>; 1124 clock-names = "fck"; 1125 status = "disabled"; 1126 }; 1127 }; 1128 1129 target-module@c8000 { /* 0x480c8000, ap 73 06.0 */ 1130 compatible = "ti,sysc-omap4", "ti,sysc"; 1131 reg = <0xc8000 0x4>, 1132 <0xc8010 0x4>; 1133 reg-names = "rev", "sysc"; 1134 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1135 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1136 <SYSC_IDLE_NO>, 1137 <SYSC_IDLE_SMART>; 1138 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1139 clocks = <&l4ls_clkctrl AM4_L4LS_MAILBOX_CLKCTRL 0>; 1140 clock-names = "fck"; 1141 #address-cells = <1>; 1142 #size-cells = <1>; 1143 ranges = <0x0 0xc8000 0x1000>; 1144 1145 mailbox: mailbox@0 { 1146 compatible = "ti,omap4-mailbox"; 1147 reg = <0x0 0x200>; 1148 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 1149 #mbox-cells = <1>; 1150 ti,mbox-num-users = <4>; 1151 ti,mbox-num-fifos = <8>; 1152 mbox_wkupm3: wkup_m3 { 1153 ti,mbox-send-noirq; 1154 ti,mbox-tx = <0 0 0>; 1155 ti,mbox-rx = <0 0 3>; 1156 }; 1157 }; 1158 }; 1159 1160 target-module@ca000 { /* 0x480ca000, ap 77 38.0 */ 1161 compatible = "ti,sysc-omap2", "ti,sysc"; 1162 reg = <0xca000 0x4>, 1163 <0xca010 0x4>, 1164 <0xca014 0x4>; 1165 reg-names = "rev", "sysc", "syss"; 1166 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1167 SYSC_OMAP2_ENAWAKEUP | 1168 SYSC_OMAP2_SOFTRESET | 1169 SYSC_OMAP2_AUTOIDLE)>; 1170 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1171 <SYSC_IDLE_NO>, 1172 <SYSC_IDLE_SMART>; 1173 ti,syss-mask = <1>; 1174 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1175 clocks = <&l4ls_clkctrl AM4_L4LS_SPINLOCK_CLKCTRL 0>; 1176 clock-names = "fck"; 1177 #address-cells = <1>; 1178 #size-cells = <1>; 1179 ranges = <0x0 0xca000 0x1000>; 1180 1181 hwspinlock: spinlock@0 { 1182 compatible = "ti,omap4-hwspinlock"; 1183 reg = <0x0 0x1000>; 1184 #hwlock-cells = <1>; 1185 }; 1186 }; 1187 }; 1188 1189 segment@100000 { /* 0x48100000 */ 1190 compatible = "simple-bus"; 1191 #address-cells = <1>; 1192 #size-cells = <1>; 1193 ranges = <0x0008c000 0x0018c000 0x001000>, /* ap 34 */ 1194 <0x0008d000 0x0018d000 0x001000>, /* ap 35 */ 1195 <0x0008e000 0x0018e000 0x001000>, /* ap 36 */ 1196 <0x0008f000 0x0018f000 0x001000>, /* ap 37 */ 1197 <0x0009c000 0x0019c000 0x001000>, /* ap 38 */ 1198 <0x0009d000 0x0019d000 0x001000>, /* ap 39 */ 1199 <0x000a6000 0x001a6000 0x001000>, /* ap 40 */ 1200 <0x000a7000 0x001a7000 0x001000>, /* ap 41 */ 1201 <0x000a8000 0x001a8000 0x001000>, /* ap 42 */ 1202 <0x000a9000 0x001a9000 0x001000>, /* ap 43 */ 1203 <0x000aa000 0x001aa000 0x001000>, /* ap 44 */ 1204 <0x000ab000 0x001ab000 0x001000>, /* ap 45 */ 1205 <0x000ac000 0x001ac000 0x001000>, /* ap 46 */ 1206 <0x000ad000 0x001ad000 0x001000>, /* ap 47 */ 1207 <0x000ae000 0x001ae000 0x001000>, /* ap 48 */ 1208 <0x000af000 0x001af000 0x001000>, /* ap 49 */ 1209 <0x000cc000 0x001cc000 0x002000>, /* ap 50 */ 1210 <0x000ce000 0x001ce000 0x002000>, /* ap 51 */ 1211 <0x000d0000 0x001d0000 0x002000>, /* ap 52 */ 1212 <0x000d2000 0x001d2000 0x002000>, /* ap 53 */ 1213 <0x000d8000 0x001d8000 0x001000>, /* ap 54 */ 1214 <0x000d9000 0x001d9000 0x001000>, /* ap 55 */ 1215 <0x000a0000 0x001a0000 0x001000>, /* ap 67 */ 1216 <0x000a1000 0x001a1000 0x001000>, /* ap 68 */ 1217 <0x000a2000 0x001a2000 0x001000>, /* ap 69 */ 1218 <0x000a3000 0x001a3000 0x001000>, /* ap 70 */ 1219 <0x000a4000 0x001a4000 0x001000>, /* ap 92 */ 1220 <0x000a5000 0x001a5000 0x001000>, /* ap 93 */ 1221 <0x000c1000 0x001c1000 0x001000>, /* ap 94 */ 1222 <0x000c2000 0x001c2000 0x001000>; /* ap 95 */ 1223 1224 target-module@8c000 { /* 0x4818c000, ap 34 0c.0 */ 1225 compatible = "ti,sysc"; 1226 status = "disabled"; 1227 #address-cells = <1>; 1228 #size-cells = <1>; 1229 ranges = <0x0 0x8c000 0x1000>; 1230 }; 1231 1232 target-module@8e000 { /* 0x4818e000, ap 36 02.0 */ 1233 compatible = "ti,sysc"; 1234 status = "disabled"; 1235 #address-cells = <1>; 1236 #size-cells = <1>; 1237 ranges = <0x0 0x8e000 0x1000>; 1238 }; 1239 1240 target-module@9c000 { /* 0x4819c000, ap 38 52.0 */ 1241 compatible = "ti,sysc-omap2", "ti,sysc"; 1242 reg = <0x9c000 0x8>, 1243 <0x9c010 0x8>, 1244 <0x9c090 0x8>; 1245 reg-names = "rev", "sysc", "syss"; 1246 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1247 SYSC_OMAP2_ENAWAKEUP | 1248 SYSC_OMAP2_SOFTRESET | 1249 SYSC_OMAP2_AUTOIDLE)>; 1250 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1251 <SYSC_IDLE_NO>, 1252 <SYSC_IDLE_SMART>, 1253 <SYSC_IDLE_SMART_WKUP>; 1254 ti,syss-mask = <1>; 1255 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1256 clocks = <&l4ls_clkctrl AM4_L4LS_I2C3_CLKCTRL 0>; 1257 clock-names = "fck"; 1258 #address-cells = <1>; 1259 #size-cells = <1>; 1260 ranges = <0x0 0x9c000 0x1000>; 1261 1262 i2c2: i2c@0 { 1263 compatible = "ti,am4372-i2c","ti,omap4-i2c"; 1264 reg = <0x0 0x1000>; 1265 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1266 #address-cells = <1>; 1267 #size-cells = <0>; 1268 status = "disabled"; 1269 }; 1270 }; 1271 1272 target-module@a0000 { /* 0x481a0000, ap 67 2c.0 */ 1273 compatible = "ti,sysc-omap2", "ti,sysc"; 1274 reg = <0xa0000 0x4>, 1275 <0xa0110 0x4>, 1276 <0xa0114 0x4>; 1277 reg-names = "rev", "sysc", "syss"; 1278 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1279 SYSC_OMAP2_SOFTRESET | 1280 SYSC_OMAP2_AUTOIDLE)>; 1281 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1282 <SYSC_IDLE_NO>, 1283 <SYSC_IDLE_SMART>; 1284 ti,syss-mask = <1>; 1285 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1286 clocks = <&l4ls_clkctrl AM4_L4LS_SPI1_CLKCTRL 0>; 1287 clock-names = "fck"; 1288 #address-cells = <1>; 1289 #size-cells = <1>; 1290 ranges = <0x0 0xa0000 0x1000>; 1291 1292 spi1: spi@0 { 1293 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 1294 reg = <0x0 0x400>; 1295 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 1296 #address-cells = <1>; 1297 #size-cells = <0>; 1298 status = "disabled"; 1299 }; 1300 }; 1301 1302 target-module@a2000 { /* 0x481a2000, ap 69 2e.0 */ 1303 compatible = "ti,sysc-omap2", "ti,sysc"; 1304 reg = <0xa2000 0x4>, 1305 <0xa2110 0x4>, 1306 <0xa2114 0x4>; 1307 reg-names = "rev", "sysc", "syss"; 1308 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1309 SYSC_OMAP2_SOFTRESET | 1310 SYSC_OMAP2_AUTOIDLE)>; 1311 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1312 <SYSC_IDLE_NO>, 1313 <SYSC_IDLE_SMART>; 1314 ti,syss-mask = <1>; 1315 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1316 clocks = <&l4ls_clkctrl AM4_L4LS_SPI2_CLKCTRL 0>; 1317 clock-names = "fck"; 1318 #address-cells = <1>; 1319 #size-cells = <1>; 1320 ranges = <0x0 0xa2000 0x1000>; 1321 1322 spi2: spi@0 { 1323 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 1324 reg = <0x0 0x400>; 1325 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; 1326 #address-cells = <1>; 1327 #size-cells = <0>; 1328 status = "disabled"; 1329 }; 1330 }; 1331 1332 target-module@a4000 { /* 0x481a4000, ap 92 62.0 */ 1333 compatible = "ti,sysc-omap2", "ti,sysc"; 1334 reg = <0xa4000 0x4>, 1335 <0xa4110 0x4>, 1336 <0xa4114 0x4>; 1337 reg-names = "rev", "sysc", "syss"; 1338 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1339 SYSC_OMAP2_SOFTRESET | 1340 SYSC_OMAP2_AUTOIDLE)>; 1341 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1342 <SYSC_IDLE_NO>, 1343 <SYSC_IDLE_SMART>; 1344 ti,syss-mask = <1>; 1345 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1346 clocks = <&l4ls_clkctrl AM4_L4LS_SPI3_CLKCTRL 0>; 1347 clock-names = "fck"; 1348 #address-cells = <1>; 1349 #size-cells = <1>; 1350 ranges = <0x0 0xa4000 0x1000>; 1351 1352 spi3: spi@0 { 1353 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 1354 reg = <0x0 0x400>; 1355 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; 1356 #address-cells = <1>; 1357 #size-cells = <0>; 1358 status = "disabled"; 1359 }; 1360 }; 1361 1362 target-module@a6000 { /* 0x481a6000, ap 40 16.0 */ 1363 compatible = "ti,sysc-omap2", "ti,sysc"; 1364 reg = <0xa6050 0x4>, 1365 <0xa6054 0x4>, 1366 <0xa6058 0x4>; 1367 reg-names = "rev", "sysc", "syss"; 1368 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1369 SYSC_OMAP2_SOFTRESET | 1370 SYSC_OMAP2_AUTOIDLE)>; 1371 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1372 <SYSC_IDLE_NO>, 1373 <SYSC_IDLE_SMART>, 1374 <SYSC_IDLE_SMART_WKUP>; 1375 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1376 clocks = <&l4ls_clkctrl AM4_L4LS_UART4_CLKCTRL 0>; 1377 clock-names = "fck"; 1378 #address-cells = <1>; 1379 #size-cells = <1>; 1380 ranges = <0x0 0xa6000 0x1000>; 1381 1382 uart3: serial@0 { 1383 compatible = "ti,am4372-uart","ti,omap2-uart"; 1384 reg = <0x0 0x2000>; 1385 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 1386 status = "disabled"; 1387 }; 1388 }; 1389 1390 target-module@a8000 { /* 0x481a8000, ap 42 20.0 */ 1391 compatible = "ti,sysc-omap2", "ti,sysc"; 1392 reg = <0xa8050 0x4>, 1393 <0xa8054 0x4>, 1394 <0xa8058 0x4>; 1395 reg-names = "rev", "sysc", "syss"; 1396 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1397 SYSC_OMAP2_SOFTRESET | 1398 SYSC_OMAP2_AUTOIDLE)>; 1399 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1400 <SYSC_IDLE_NO>, 1401 <SYSC_IDLE_SMART>, 1402 <SYSC_IDLE_SMART_WKUP>; 1403 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1404 clocks = <&l4ls_clkctrl AM4_L4LS_UART5_CLKCTRL 0>; 1405 clock-names = "fck"; 1406 #address-cells = <1>; 1407 #size-cells = <1>; 1408 ranges = <0x0 0xa8000 0x1000>; 1409 1410 uart4: serial@0 { 1411 compatible = "ti,am4372-uart","ti,omap2-uart"; 1412 reg = <0x0 0x2000>; 1413 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 1414 status = "disabled"; 1415 }; 1416 }; 1417 1418 target-module@aa000 { /* 0x481aa000, ap 44 12.0 */ 1419 compatible = "ti,sysc-omap2", "ti,sysc"; 1420 reg = <0xaa050 0x4>, 1421 <0xaa054 0x4>, 1422 <0xaa058 0x4>; 1423 reg-names = "rev", "sysc", "syss"; 1424 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1425 SYSC_OMAP2_SOFTRESET | 1426 SYSC_OMAP2_AUTOIDLE)>; 1427 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1428 <SYSC_IDLE_NO>, 1429 <SYSC_IDLE_SMART>, 1430 <SYSC_IDLE_SMART_WKUP>; 1431 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1432 clocks = <&l4ls_clkctrl AM4_L4LS_UART6_CLKCTRL 0>; 1433 clock-names = "fck"; 1434 #address-cells = <1>; 1435 #size-cells = <1>; 1436 ranges = <0x0 0xaa000 0x1000>; 1437 1438 uart5: serial@0 { 1439 compatible = "ti,am4372-uart","ti,omap2-uart"; 1440 reg = <0x0 0x2000>; 1441 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 1442 status = "disabled"; 1443 }; 1444 }; 1445 1446 target-module@ac000 { /* 0x481ac000, ap 46 30.0 */ 1447 compatible = "ti,sysc-omap2", "ti,sysc"; 1448 reg = <0xac000 0x4>, 1449 <0xac010 0x4>, 1450 <0xac114 0x4>; 1451 reg-names = "rev", "sysc", "syss"; 1452 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1453 SYSC_OMAP2_SOFTRESET | 1454 SYSC_OMAP2_AUTOIDLE)>; 1455 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1456 <SYSC_IDLE_NO>, 1457 <SYSC_IDLE_SMART>, 1458 <SYSC_IDLE_SMART_WKUP>; 1459 ti,syss-mask = <1>; 1460 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1461 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO3_CLKCTRL 0>, 1462 <&l4ls_clkctrl AM4_L4LS_GPIO3_CLKCTRL 8>; 1463 clock-names = "fck", "dbclk"; 1464 #address-cells = <1>; 1465 #size-cells = <1>; 1466 ranges = <0x0 0xac000 0x1000>; 1467 1468 gpio2: gpio@0 { 1469 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 1470 reg = <0x0 0x1000>; 1471 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 1472 gpio-controller; 1473 #gpio-cells = <2>; 1474 interrupt-controller; 1475 #interrupt-cells = <2>; 1476 status = "disabled"; 1477 }; 1478 }; 1479 1480 target-module@ae000 { /* 0x481ae000, ap 48 32.0 */ 1481 compatible = "ti,sysc-omap2", "ti,sysc"; 1482 reg = <0xae000 0x4>, 1483 <0xae010 0x4>, 1484 <0xae114 0x4>; 1485 reg-names = "rev", "sysc", "syss"; 1486 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1487 SYSC_OMAP2_SOFTRESET | 1488 SYSC_OMAP2_AUTOIDLE)>; 1489 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1490 <SYSC_IDLE_NO>, 1491 <SYSC_IDLE_SMART>, 1492 <SYSC_IDLE_SMART_WKUP>; 1493 ti,syss-mask = <1>; 1494 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1495 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO4_CLKCTRL 0>, 1496 <&l4ls_clkctrl AM4_L4LS_GPIO4_CLKCTRL 8>; 1497 clock-names = "fck", "dbclk"; 1498 #address-cells = <1>; 1499 #size-cells = <1>; 1500 ranges = <0x0 0xae000 0x1000>; 1501 1502 gpio3: gpio@0 { 1503 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 1504 reg = <0x0 0x1000>; 1505 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 1506 gpio-controller; 1507 #gpio-cells = <2>; 1508 interrupt-controller; 1509 #interrupt-cells = <2>; 1510 status = "disabled"; 1511 }; 1512 }; 1513 1514 target-module@c1000 { /* 0x481c1000, ap 94 68.0 */ 1515 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 1516 reg = <0xc1000 0x4>, 1517 <0xc1010 0x4>, 1518 <0xc1014 0x4>; 1519 reg-names = "rev", "sysc", "syss"; 1520 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1521 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1522 <SYSC_IDLE_NO>, 1523 <SYSC_IDLE_SMART>, 1524 <SYSC_IDLE_SMART_WKUP>; 1525 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1526 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER8_CLKCTRL 0>; 1527 clock-names = "fck"; 1528 #address-cells = <1>; 1529 #size-cells = <1>; 1530 ranges = <0x0 0xc1000 0x1000>; 1531 1532 timer8: timer@0 { 1533 compatible = "ti,am4372-timer","ti,am335x-timer"; 1534 reg = <0x0 0x400>; 1535 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; 1536 status = "disabled"; 1537 }; 1538 }; 1539 1540 target-module@cc000 { /* 0x481cc000, ap 50 46.0 */ 1541 compatible = "ti,sysc-omap4", "ti,sysc"; 1542 reg = <0xcc020 0x4>; 1543 reg-names = "rev"; 1544 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1545 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>, 1546 <&dcan0_fck>; 1547 clock-names = "fck", "osc"; 1548 #address-cells = <1>; 1549 #size-cells = <1>; 1550 ranges = <0x0 0xcc000 0x2000>; 1551 1552 dcan0: can@0 { 1553 compatible = "ti,am4372-d_can", "ti,am3352-d_can"; 1554 reg = <0x0 0x2000>; 1555 clocks = <&dcan0_fck>; 1556 clock-names = "fck"; 1557 syscon-raminit = <&scm_conf 0x644 0>; 1558 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; 1559 status = "disabled"; 1560 }; 1561 }; 1562 1563 target-module@d0000 { /* 0x481d0000, ap 52 3a.0 */ 1564 compatible = "ti,sysc-omap4", "ti,sysc"; 1565 reg = <0xd0020 0x4>; 1566 reg-names = "rev"; 1567 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1568 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>, 1569 <&dcan1_fck>; 1570 clock-names = "fck", "osc"; 1571 #address-cells = <1>; 1572 #size-cells = <1>; 1573 ranges = <0x0 0xd0000 0x2000>; 1574 1575 dcan1: can@0 { 1576 compatible = "ti,am4372-d_can", "ti,am3352-d_can"; 1577 reg = <0x0 0x2000>; 1578 clocks = <&dcan1_fck>; 1579 clock-names = "fck"; 1580 syscon-raminit = <&scm_conf 0x644 1>; 1581 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 1582 status = "disabled"; 1583 }; 1584 }; 1585 1586 target-module@d8000 { /* 0x481d8000, ap 54 5e.0 */ 1587 compatible = "ti,sysc-omap2", "ti,sysc"; 1588 reg = <0xd82fc 0x4>, 1589 <0xd8110 0x4>, 1590 <0xd8114 0x4>; 1591 reg-names = "rev", "sysc", "syss"; 1592 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1593 SYSC_OMAP2_ENAWAKEUP | 1594 SYSC_OMAP2_SOFTRESET | 1595 SYSC_OMAP2_AUTOIDLE)>; 1596 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1597 <SYSC_IDLE_NO>, 1598 <SYSC_IDLE_SMART>; 1599 ti,syss-mask = <1>; 1600 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1601 clocks = <&l4ls_clkctrl AM4_L4LS_MMC2_CLKCTRL 0>; 1602 clock-names = "fck"; 1603 #address-cells = <1>; 1604 #size-cells = <1>; 1605 ranges = <0x0 0xd8000 0x1000>; 1606 1607 mmc2: mmc@0 { 1608 compatible = "ti,am437-sdhci"; 1609 reg = <0x0 0x1000>; 1610 ti,needs-special-reset; 1611 dmas = <&edma 2 0>, 1612 <&edma 3 0>; 1613 dma-names = "tx", "rx"; 1614 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 1615 status = "disabled"; 1616 }; 1617 }; 1618 }; 1619 1620 segment@200000 { /* 0x48200000 */ 1621 compatible = "simple-bus"; 1622 #address-cells = <1>; 1623 #size-cells = <1>; 1624 }; 1625 1626 segment@300000 { /* 0x48300000 */ 1627 compatible = "simple-bus"; 1628 #address-cells = <1>; 1629 #size-cells = <1>; 1630 ranges = <0x00000000 0x00300000 0x001000>, /* ap 56 */ 1631 <0x00001000 0x00301000 0x001000>, /* ap 57 */ 1632 <0x00002000 0x00302000 0x001000>, /* ap 58 */ 1633 <0x00003000 0x00303000 0x001000>, /* ap 59 */ 1634 <0x00004000 0x00304000 0x001000>, /* ap 60 */ 1635 <0x00005000 0x00305000 0x001000>, /* ap 61 */ 1636 <0x00018000 0x00318000 0x004000>, /* ap 62 */ 1637 <0x0001c000 0x0031c000 0x001000>, /* ap 63 */ 1638 <0x00010000 0x00310000 0x002000>, /* ap 64 */ 1639 <0x00028000 0x00328000 0x001000>, /* ap 75 */ 1640 <0x00029000 0x00329000 0x001000>, /* ap 76 */ 1641 <0x00012000 0x00312000 0x001000>, /* ap 79 */ 1642 <0x00020000 0x00320000 0x001000>, /* ap 82 */ 1643 <0x00021000 0x00321000 0x001000>, /* ap 83 */ 1644 <0x00026000 0x00326000 0x001000>, /* ap 86 */ 1645 <0x00027000 0x00327000 0x001000>, /* ap 87 */ 1646 <0x0002a000 0x0032a000 0x000400>, /* ap 88 */ 1647 <0x0002c000 0x0032c000 0x001000>, /* ap 89 */ 1648 <0x00013000 0x00313000 0x001000>, /* ap 90 */ 1649 <0x00014000 0x00314000 0x001000>, /* ap 91 */ 1650 <0x00006000 0x00306000 0x001000>, /* ap 96 */ 1651 <0x00007000 0x00307000 0x001000>, /* ap 97 */ 1652 <0x00008000 0x00308000 0x001000>, /* ap 98 */ 1653 <0x00009000 0x00309000 0x001000>, /* ap 99 */ 1654 <0x0000a000 0x0030a000 0x001000>, /* ap 100 */ 1655 <0x0000b000 0x0030b000 0x001000>, /* ap 101 */ 1656 <0x0003d000 0x0033d000 0x001000>, /* ap 102 */ 1657 <0x0003e000 0x0033e000 0x001000>, /* ap 103 */ 1658 <0x0003f000 0x0033f000 0x001000>, /* ap 104 */ 1659 <0x00040000 0x00340000 0x001000>, /* ap 105 */ 1660 <0x00041000 0x00341000 0x001000>, /* ap 106 */ 1661 <0x00042000 0x00342000 0x001000>, /* ap 107 */ 1662 <0x00045000 0x00345000 0x001000>, /* ap 108 */ 1663 <0x00046000 0x00346000 0x001000>, /* ap 109 */ 1664 <0x00047000 0x00347000 0x001000>, /* ap 110 */ 1665 <0x00048000 0x00348000 0x001000>, /* ap 111 */ 1666 <0x000f2000 0x003f2000 0x002000>, /* ap 112 */ 1667 <0x000f4000 0x003f4000 0x001000>, /* ap 113 */ 1668 <0x0004c000 0x0034c000 0x002000>, /* ap 114 */ 1669 <0x0004e000 0x0034e000 0x001000>, /* ap 115 */ 1670 <0x00022000 0x00322000 0x001000>, /* ap 116 */ 1671 <0x00023000 0x00323000 0x001000>, /* ap 117 */ 1672 <0x000f0000 0x003f0000 0x001000>, /* ap 118 */ 1673 <0x0002a400 0x0032a400 0x000400>, /* ap 119 */ 1674 <0x0002a800 0x0032a800 0x000400>, /* ap 120 */ 1675 <0x0002ac00 0x0032ac00 0x000400>, /* ap 121 */ 1676 <0x0002b000 0x0032b000 0x001000>, /* ap 122 */ 1677 <0x00080000 0x00380000 0x020000>, /* ap 123 */ 1678 <0x000a0000 0x003a0000 0x001000>, /* ap 124 */ 1679 <0x000a8000 0x003a8000 0x008000>, /* ap 125 */ 1680 <0x000b0000 0x003b0000 0x001000>, /* ap 126 */ 1681 <0x000c0000 0x003c0000 0x020000>, /* ap 127 */ 1682 <0x000e0000 0x003e0000 0x001000>, /* ap 128 */ 1683 <0x000e8000 0x003e8000 0x008000>; /* ap 129 */ 1684 1685 target-module@0 { /* 0x48300000, ap 56 40.0 */ 1686 compatible = "ti,sysc-omap4", "ti,sysc"; 1687 reg = <0x0 0x4>, 1688 <0x4 0x4>; 1689 reg-names = "rev", "sysc"; 1690 ti,sysc-midle = <SYSC_IDLE_FORCE>, 1691 <SYSC_IDLE_NO>, 1692 <SYSC_IDLE_SMART>, 1693 <SYSC_IDLE_SMART_WKUP>; 1694 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1695 <SYSC_IDLE_NO>, 1696 <SYSC_IDLE_SMART>, 1697 <SYSC_IDLE_SMART_WKUP>; 1698 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1699 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS0_CLKCTRL 0>; 1700 clock-names = "fck"; 1701 #address-cells = <1>; 1702 #size-cells = <1>; 1703 ranges = <0x0 0x0 0x1000>; 1704 1705 epwmss0: epwmss@0 { 1706 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1707 reg = <0x0 0x10>; 1708 #address-cells = <1>; 1709 #size-cells = <1>; 1710 ranges = <0 0 0x1000>; 1711 status = "disabled"; 1712 1713 ecap0: ecap@100 { 1714 compatible = "ti,am4372-ecap", 1715 "ti,am3352-ecap", 1716 "ti,am33xx-ecap"; 1717 #pwm-cells = <3>; 1718 reg = <0x100 0x80>; 1719 clocks = <&l4ls_gclk>; 1720 clock-names = "fck"; 1721 status = "disabled"; 1722 }; 1723 1724 ehrpwm0: pwm@200 { 1725 compatible = "ti,am4372-ehrpwm", 1726 "ti,am3352-ehrpwm", 1727 "ti,am33xx-ehrpwm"; 1728 #pwm-cells = <3>; 1729 reg = <0x200 0x80>; 1730 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>; 1731 clock-names = "tbclk", "fck"; 1732 status = "disabled"; 1733 }; 1734 }; 1735 }; 1736 1737 target-module@2000 { /* 0x48302000, ap 58 4a.0 */ 1738 compatible = "ti,sysc-omap4", "ti,sysc"; 1739 reg = <0x2000 0x4>, 1740 <0x2004 0x4>; 1741 reg-names = "rev", "sysc"; 1742 ti,sysc-midle = <SYSC_IDLE_FORCE>, 1743 <SYSC_IDLE_NO>, 1744 <SYSC_IDLE_SMART>, 1745 <SYSC_IDLE_SMART_WKUP>; 1746 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1747 <SYSC_IDLE_NO>, 1748 <SYSC_IDLE_SMART>, 1749 <SYSC_IDLE_SMART_WKUP>; 1750 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1751 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS1_CLKCTRL 0>; 1752 clock-names = "fck"; 1753 #address-cells = <1>; 1754 #size-cells = <1>; 1755 ranges = <0x0 0x2000 0x1000>; 1756 1757 epwmss1: epwmss@0 { 1758 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1759 reg = <0x0 0x10>; 1760 #address-cells = <1>; 1761 #size-cells = <1>; 1762 ranges = <0 0 0x1000>; 1763 status = "disabled"; 1764 1765 ecap1: ecap@100 { 1766 compatible = "ti,am4372-ecap", 1767 "ti,am3352-ecap", 1768 "ti,am33xx-ecap"; 1769 #pwm-cells = <3>; 1770 reg = <0x100 0x80>; 1771 clocks = <&l4ls_gclk>; 1772 clock-names = "fck"; 1773 status = "disabled"; 1774 }; 1775 1776 ehrpwm1: pwm@200 { 1777 compatible = "ti,am4372-ehrpwm", 1778 "ti,am3352-ehrpwm", 1779 "ti,am33xx-ehrpwm"; 1780 #pwm-cells = <3>; 1781 reg = <0x200 0x80>; 1782 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>; 1783 clock-names = "tbclk", "fck"; 1784 status = "disabled"; 1785 }; 1786 }; 1787 }; 1788 1789 target-module@4000 { /* 0x48304000, ap 60 44.0 */ 1790 compatible = "ti,sysc-omap4", "ti,sysc"; 1791 reg = <0x4000 0x4>, 1792 <0x4004 0x4>; 1793 reg-names = "rev", "sysc"; 1794 ti,sysc-midle = <SYSC_IDLE_FORCE>, 1795 <SYSC_IDLE_NO>, 1796 <SYSC_IDLE_SMART>, 1797 <SYSC_IDLE_SMART_WKUP>; 1798 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1799 <SYSC_IDLE_NO>, 1800 <SYSC_IDLE_SMART>, 1801 <SYSC_IDLE_SMART_WKUP>; 1802 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1803 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS2_CLKCTRL 0>; 1804 clock-names = "fck"; 1805 #address-cells = <1>; 1806 #size-cells = <1>; 1807 ranges = <0x0 0x4000 0x1000>; 1808 1809 epwmss2: epwmss@0 { 1810 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1811 reg = <0x0 0x10>; 1812 #address-cells = <1>; 1813 #size-cells = <1>; 1814 ranges = <0 0 0x1000>; 1815 status = "disabled"; 1816 1817 ecap2: ecap@100 { 1818 compatible = "ti,am4372-ecap", 1819 "ti,am3352-ecap", 1820 "ti,am33xx-ecap"; 1821 #pwm-cells = <3>; 1822 reg = <0x100 0x80>; 1823 clocks = <&l4ls_gclk>; 1824 clock-names = "fck"; 1825 status = "disabled"; 1826 }; 1827 1828 ehrpwm2: pwm@200 { 1829 compatible = "ti,am4372-ehrpwm", 1830 "ti,am3352-ehrpwm", 1831 "ti,am33xx-ehrpwm"; 1832 #pwm-cells = <3>; 1833 reg = <0x200 0x80>; 1834 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>; 1835 clock-names = "tbclk", "fck"; 1836 status = "disabled"; 1837 }; 1838 }; 1839 }; 1840 1841 target-module@6000 { /* 0x48306000, ap 96 58.0 */ 1842 compatible = "ti,sysc-omap4", "ti,sysc"; 1843 reg = <0x6000 0x4>, 1844 <0x6004 0x4>; 1845 reg-names = "rev", "sysc"; 1846 ti,sysc-midle = <SYSC_IDLE_FORCE>, 1847 <SYSC_IDLE_NO>, 1848 <SYSC_IDLE_SMART>, 1849 <SYSC_IDLE_SMART_WKUP>; 1850 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1851 <SYSC_IDLE_NO>, 1852 <SYSC_IDLE_SMART>, 1853 <SYSC_IDLE_SMART_WKUP>; 1854 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1855 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS3_CLKCTRL 0>; 1856 clock-names = "fck"; 1857 #address-cells = <1>; 1858 #size-cells = <1>; 1859 ranges = <0x0 0x6000 0x1000>; 1860 1861 epwmss3: epwmss@0 { 1862 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1863 reg = <0x0 0x10>; 1864 #address-cells = <1>; 1865 #size-cells = <1>; 1866 ranges = <0 0 0x1000>; 1867 status = "disabled"; 1868 1869 ehrpwm3: pwm@200 { 1870 compatible = "ti,am4372-ehrpwm", 1871 "ti,am3352-ehrpwm", 1872 "ti,am33xx-ehrpwm"; 1873 #pwm-cells = <3>; 1874 reg = <0x200 0x80>; 1875 clocks = <&ehrpwm3_tbclk>, <&l4ls_gclk>; 1876 clock-names = "tbclk", "fck"; 1877 status = "disabled"; 1878 }; 1879 }; 1880 }; 1881 1882 target-module@8000 { /* 0x48308000, ap 98 54.0 */ 1883 compatible = "ti,sysc-omap4", "ti,sysc"; 1884 reg = <0x8000 0x4>, 1885 <0x8004 0x4>; 1886 reg-names = "rev", "sysc"; 1887 ti,sysc-midle = <SYSC_IDLE_FORCE>, 1888 <SYSC_IDLE_NO>, 1889 <SYSC_IDLE_SMART>, 1890 <SYSC_IDLE_SMART_WKUP>; 1891 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1892 <SYSC_IDLE_NO>, 1893 <SYSC_IDLE_SMART>, 1894 <SYSC_IDLE_SMART_WKUP>; 1895 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1896 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS4_CLKCTRL 0>; 1897 clock-names = "fck"; 1898 #address-cells = <1>; 1899 #size-cells = <1>; 1900 ranges = <0x0 0x8000 0x1000>; 1901 1902 epwmss4: epwmss@0 { 1903 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1904 reg = <0x0 0x10>; 1905 #address-cells = <1>; 1906 #size-cells = <1>; 1907 ranges = <0 0 0x1000>; 1908 status = "disabled"; 1909 1910 ehrpwm4: pwm@48308200 { 1911 compatible = "ti,am4372-ehrpwm", 1912 "ti,am3352-ehrpwm", 1913 "ti,am33xx-ehrpwm"; 1914 #pwm-cells = <3>; 1915 reg = <0x200 0x80>; 1916 clocks = <&ehrpwm4_tbclk>, <&l4ls_gclk>; 1917 clock-names = "tbclk", "fck"; 1918 status = "disabled"; 1919 }; 1920 }; 1921 }; 1922 1923 target-module@a000 { /* 0x4830a000, ap 100 60.0 */ 1924 compatible = "ti,sysc-omap4", "ti,sysc"; 1925 reg = <0xa000 0x4>, 1926 <0xa004 0x4>; 1927 reg-names = "rev", "sysc"; 1928 ti,sysc-midle = <SYSC_IDLE_FORCE>, 1929 <SYSC_IDLE_NO>, 1930 <SYSC_IDLE_SMART>, 1931 <SYSC_IDLE_SMART_WKUP>; 1932 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1933 <SYSC_IDLE_NO>, 1934 <SYSC_IDLE_SMART>, 1935 <SYSC_IDLE_SMART_WKUP>; 1936 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1937 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS5_CLKCTRL 0>; 1938 clock-names = "fck"; 1939 #address-cells = <1>; 1940 #size-cells = <1>; 1941 ranges = <0x0 0xa000 0x1000>; 1942 1943 epwmss5: epwmss@0 { 1944 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1945 reg = <0x0 0x10>; 1946 #address-cells = <1>; 1947 #size-cells = <1>; 1948 ranges = <0 0 0x1000>; 1949 status = "disabled"; 1950 1951 ehrpwm5: pwm@200 { 1952 compatible = "ti,am4372-ehrpwm", 1953 "ti,am3352-ehrpwm", 1954 "ti,am33xx-ehrpwm"; 1955 #pwm-cells = <3>; 1956 reg = <0x200 0x80>; 1957 clocks = <&ehrpwm5_tbclk>, <&l4ls_gclk>; 1958 clock-names = "tbclk", "fck"; 1959 status = "disabled"; 1960 }; 1961 }; 1962 }; 1963 1964 target-module@10000 { /* 0x48310000, ap 64 4e.1 */ 1965 compatible = "ti,sysc-omap2", "ti,sysc"; 1966 reg = <0x11fe0 0x4>, 1967 <0x11fe4 0x4>; 1968 reg-names = "rev", "sysc"; 1969 ti,sysc-mask = <SYSC_OMAP2_AUTOIDLE>; 1970 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1971 <SYSC_IDLE_NO>; 1972 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1973 clocks = <&l4ls_clkctrl AM4_L4LS_RNG_CLKCTRL 0>; 1974 clock-names = "fck"; 1975 #address-cells = <1>; 1976 #size-cells = <1>; 1977 ranges = <0x0 0x10000 0x2000>; 1978 1979 rng: rng@0 { 1980 compatible = "ti,omap4-rng"; 1981 reg = <0x0 0x2000>; 1982 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 1983 }; 1984 }; 1985 1986 target-module@13000 { /* 0x48313000, ap 90 50.0 */ 1987 compatible = "ti,sysc"; 1988 status = "disabled"; 1989 #address-cells = <1>; 1990 #size-cells = <1>; 1991 ranges = <0x0 0x13000 0x1000>; 1992 }; 1993 1994 target-module@18000 { /* 0x48318000, ap 62 4c.0 */ 1995 compatible = "ti,sysc"; 1996 status = "disabled"; 1997 #address-cells = <1>; 1998 #size-cells = <1>; 1999 ranges = <0x0 0x18000 0x4000>; 2000 }; 2001 2002 target-module@20000 { /* 0x48320000, ap 82 34.0 */ 2003 compatible = "ti,sysc-omap2", "ti,sysc"; 2004 reg = <0x20000 0x4>, 2005 <0x20010 0x4>, 2006 <0x20114 0x4>; 2007 reg-names = "rev", "sysc", "syss"; 2008 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 2009 SYSC_OMAP2_SOFTRESET | 2010 SYSC_OMAP2_AUTOIDLE)>; 2011 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2012 <SYSC_IDLE_NO>, 2013 <SYSC_IDLE_SMART>, 2014 <SYSC_IDLE_SMART_WKUP>; 2015 ti,syss-mask = <1>; 2016 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2017 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO5_CLKCTRL 0>, 2018 <&l4ls_clkctrl AM4_L4LS_GPIO5_CLKCTRL 8>; 2019 clock-names = "fck", "dbclk"; 2020 #address-cells = <1>; 2021 #size-cells = <1>; 2022 ranges = <0x0 0x20000 0x1000>; 2023 2024 gpio4: gpio@0 { 2025 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 2026 reg = <0x0 0x1000>; 2027 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 2028 gpio-controller; 2029 #gpio-cells = <2>; 2030 interrupt-controller; 2031 #interrupt-cells = <2>; 2032 status = "disabled"; 2033 }; 2034 }; 2035 2036 gpio5_target: target-module@22000 { /* 0x48322000, ap 116 64.0 */ 2037 compatible = "ti,sysc-omap2", "ti,sysc"; 2038 reg = <0x22000 0x4>, 2039 <0x22010 0x4>, 2040 <0x22114 0x4>; 2041 reg-names = "rev", "sysc", "syss"; 2042 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 2043 SYSC_OMAP2_SOFTRESET | 2044 SYSC_OMAP2_AUTOIDLE)>; 2045 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2046 <SYSC_IDLE_NO>, 2047 <SYSC_IDLE_SMART>, 2048 <SYSC_IDLE_SMART_WKUP>; 2049 ti,syss-mask = <1>; 2050 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2051 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO6_CLKCTRL 0>, 2052 <&l4ls_clkctrl AM4_L4LS_GPIO6_CLKCTRL 8>; 2053 clock-names = "fck", "dbclk"; 2054 #address-cells = <1>; 2055 #size-cells = <1>; 2056 ranges = <0x0 0x22000 0x1000>; 2057 2058 gpio5: gpio@0 { 2059 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 2060 reg = <0x0 0x1000>; 2061 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2062 gpio-controller; 2063 #gpio-cells = <2>; 2064 interrupt-controller; 2065 #interrupt-cells = <2>; 2066 status = "disabled"; 2067 }; 2068 }; 2069 2070 target-module@26000 { /* 0x48326000, ap 86 66.0 */ 2071 compatible = "ti,sysc-omap4", "ti,sysc"; 2072 reg = <0x26000 0x4>, 2073 <0x26104 0x4>; 2074 reg-names = "rev", "sysc"; 2075 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2076 <SYSC_IDLE_NO>, 2077 <SYSC_IDLE_SMART>; 2078 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2079 <SYSC_IDLE_NO>, 2080 <SYSC_IDLE_SMART>; 2081 /* Domains (P, C): per_pwrdm, l3s_clkdm */ 2082 clocks = <&l3s_clkctrl AM4_L3S_VPFE0_CLKCTRL 0>; 2083 clock-names = "fck"; 2084 #address-cells = <1>; 2085 #size-cells = <1>; 2086 ranges = <0x0 0x26000 0x1000>; 2087 2088 vpfe0: vpfe@0 { 2089 compatible = "ti,am437x-vpfe"; 2090 reg = <0x0 0x2000>; 2091 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 2092 status = "disabled"; 2093 }; 2094 }; 2095 2096 target-module@28000 { /* 0x48328000, ap 75 0e.0 */ 2097 compatible = "ti,sysc-omap4", "ti,sysc"; 2098 reg = <0x28000 0x4>, 2099 <0x28104 0x4>; 2100 reg-names = "rev", "sysc"; 2101 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2102 <SYSC_IDLE_NO>, 2103 <SYSC_IDLE_SMART>; 2104 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2105 <SYSC_IDLE_NO>, 2106 <SYSC_IDLE_SMART>; 2107 /* Domains (P, C): per_pwrdm, l3s_clkdm */ 2108 clocks = <&l3s_clkctrl AM4_L3S_VPFE1_CLKCTRL 0>; 2109 clock-names = "fck"; 2110 #address-cells = <1>; 2111 #size-cells = <1>; 2112 ranges = <0x0 0x28000 0x1000>; 2113 2114 vpfe1: vpfe@0 { 2115 compatible = "ti,am437x-vpfe"; 2116 reg = <0x0 0x2000>; 2117 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 2118 status = "disabled"; 2119 }; 2120 }; 2121 2122 target-module@2a000 { /* 0x4832a000, ap 88 3c.0 */ 2123 compatible = "ti,sysc-omap2", "ti,sysc"; 2124 reg = <0x2a000 0x4>, 2125 <0x2a010 0x4>, 2126 <0x2a014 0x4>; 2127 reg-names = "rev", "sysc", "syss"; 2128 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | 2129 SYSC_OMAP2_AUTOIDLE)>; 2130 ti,syss-mask = <1>; 2131 /* Domains (P, C): per_pwrdm, dss_clkdm */ 2132 clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>; 2133 clock-names = "fck"; 2134 #address-cells = <1>; 2135 #size-cells = <1>; 2136 ranges = <0x00000000 0x0002a000 0x00000400>, 2137 <0x00000400 0x0002a400 0x00000400>, 2138 <0x00000800 0x0002a800 0x00000400>, 2139 <0x00000c00 0x0002ac00 0x00000400>, 2140 <0x00001000 0x0002b000 0x00001000>; 2141 2142 dss: dss@0 { 2143 compatible = "ti,omap3-dss"; 2144 reg = <0 0x200>; 2145 status = "disabled"; 2146 clocks = <&disp_clk>; 2147 clock-names = "fck"; 2148 #address-cells = <1>; 2149 #size-cells = <1>; 2150 ranges = <0x00000000 0x00000000 0x00000400>, 2151 <0x00000400 0x00000400 0x00000400>, 2152 <0x00000800 0x00000800 0x00000400>, 2153 <0x00000c00 0x00000c00 0x00000400>, 2154 <0x00001000 0x00001000 0x00001000>; 2155 2156 target-module@400 { 2157 compatible = "ti,sysc-omap2", "ti,sysc"; 2158 reg = <0x400 0x4>, 2159 <0x410 0x4>, 2160 <0x414 0x4>; 2161 reg-names = "rev", "sysc", "syss"; 2162 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2163 <SYSC_IDLE_NO>, 2164 <SYSC_IDLE_SMART>; 2165 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2166 <SYSC_IDLE_NO>, 2167 <SYSC_IDLE_SMART>; 2168 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 2169 SYSC_OMAP2_ENAWAKEUP | 2170 SYSC_OMAP2_SOFTRESET | 2171 SYSC_OMAP2_AUTOIDLE)>; 2172 ti,syss-mask = <1>; 2173 clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>; 2174 clock-names = "fck"; 2175 #address-cells = <1>; 2176 #size-cells = <1>; 2177 ranges = <0 0x400 0x400>; 2178 2179 dispc: dispc@0 { 2180 compatible = "ti,omap3-dispc"; 2181 reg = <0 0x400>; 2182 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 2183 clocks = <&disp_clk>; 2184 clock-names = "fck"; 2185 2186 max-memory-bandwidth = <230000000>; 2187 }; 2188 }; 2189 2190 target-module@800 { 2191 compatible = "ti,sysc-omap2", "ti,sysc"; 2192 reg = <0x800 0x4>, 2193 <0x810 0x4>, 2194 <0x814 0x4>; 2195 reg-names = "rev", "sysc", "syss"; 2196 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2197 <SYSC_IDLE_NO>, 2198 <SYSC_IDLE_SMART>; 2199 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | 2200 SYSC_OMAP2_AUTOIDLE)>; 2201 ti,syss-mask = <1>; 2202 clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>; 2203 clock-names = "fck"; 2204 #address-cells = <1>; 2205 #size-cells = <1>; 2206 ranges = <0 0x800 0x400>; 2207 2208 rfbi: rfbi@0 { 2209 compatible = "ti,omap3-rfbi"; 2210 reg = <0 0x100>; 2211 clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>; 2212 clock-names = "fck"; 2213 status = "disabled"; 2214 }; 2215 }; 2216 }; 2217 }; 2218 2219 target-module@3d000 { /* 0x4833d000, ap 102 6e.0 */ 2220 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 2221 reg = <0x3d000 0x4>, 2222 <0x3d010 0x4>, 2223 <0x3d014 0x4>; 2224 reg-names = "rev", "sysc", "syss"; 2225 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 2226 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2227 <SYSC_IDLE_NO>, 2228 <SYSC_IDLE_SMART>, 2229 <SYSC_IDLE_SMART_WKUP>; 2230 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2231 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER9_CLKCTRL 0>; 2232 clock-names = "fck"; 2233 #address-cells = <1>; 2234 #size-cells = <1>; 2235 ranges = <0x0 0x3d000 0x1000>; 2236 2237 timer9: timer@0 { 2238 compatible = "ti,am4372-timer","ti,am335x-timer"; 2239 reg = <0x0 0x400>; 2240 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; 2241 status = "disabled"; 2242 }; 2243 }; 2244 2245 target-module@3f000 { /* 0x4833f000, ap 104 5c.0 */ 2246 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 2247 reg = <0x3f000 0x4>, 2248 <0x3f010 0x4>, 2249 <0x3f014 0x4>; 2250 reg-names = "rev", "sysc", "syss"; 2251 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 2252 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2253 <SYSC_IDLE_NO>, 2254 <SYSC_IDLE_SMART>, 2255 <SYSC_IDLE_SMART_WKUP>; 2256 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2257 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER10_CLKCTRL 0>; 2258 clock-names = "fck"; 2259 #address-cells = <1>; 2260 #size-cells = <1>; 2261 ranges = <0x0 0x3f000 0x1000>; 2262 2263 timer10: timer@0 { 2264 compatible = "ti,am4372-timer","ti,am335x-timer"; 2265 reg = <0x0 0x400>; 2266 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 2267 status = "disabled"; 2268 }; 2269 }; 2270 2271 target-module@41000 { /* 0x48341000, ap 106 76.0 */ 2272 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 2273 reg = <0x41000 0x4>, 2274 <0x41010 0x4>, 2275 <0x41014 0x4>; 2276 reg-names = "rev", "sysc", "syss"; 2277 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 2278 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2279 <SYSC_IDLE_NO>, 2280 <SYSC_IDLE_SMART>, 2281 <SYSC_IDLE_SMART_WKUP>; 2282 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2283 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER11_CLKCTRL 0>; 2284 clock-names = "fck"; 2285 #address-cells = <1>; 2286 #size-cells = <1>; 2287 ranges = <0x0 0x41000 0x1000>; 2288 2289 timer11: timer@0 { 2290 compatible = "ti,am4372-timer","ti,am335x-timer"; 2291 reg = <0x0 0x400>; 2292 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; 2293 status = "disabled"; 2294 }; 2295 }; 2296 2297 target-module@45000 { /* 0x48345000, ap 108 6a.0 */ 2298 compatible = "ti,sysc-omap2", "ti,sysc"; 2299 reg = <0x45000 0x4>, 2300 <0x45110 0x4>, 2301 <0x45114 0x4>; 2302 reg-names = "rev", "sysc", "syss"; 2303 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 2304 SYSC_OMAP2_SOFTRESET | 2305 SYSC_OMAP2_AUTOIDLE)>; 2306 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2307 <SYSC_IDLE_NO>, 2308 <SYSC_IDLE_SMART>; 2309 ti,syss-mask = <1>; 2310 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2311 clocks = <&l4ls_clkctrl AM4_L4LS_SPI4_CLKCTRL 0>; 2312 clock-names = "fck"; 2313 #address-cells = <1>; 2314 #size-cells = <1>; 2315 ranges = <0x0 0x45000 0x1000>; 2316 2317 spi4: spi@0 { 2318 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 2319 reg = <0x0 0x400>; 2320 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; 2321 #address-cells = <1>; 2322 #size-cells = <0>; 2323 status = "disabled"; 2324 }; 2325 }; 2326 2327 target-module@47000 { /* 0x48347000, ap 110 70.0 */ 2328 compatible = "ti,sysc-omap2", "ti,sysc"; 2329 reg = <0x47000 0x4>, 2330 <0x47014 0x4>, 2331 <0x47018 0x4>; 2332 reg-names = "rev", "sysc", "syss"; 2333 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | 2334 SYSC_OMAP2_AUTOIDLE)>; 2335 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2336 clocks = <&l4ls_clkctrl AM4_L4LS_HDQ1W_CLKCTRL 0>; 2337 clock-names = "fck"; 2338 #address-cells = <1>; 2339 #size-cells = <1>; 2340 ranges = <0x0 0x47000 0x1000>; 2341 2342 hdq: hdq@0 { 2343 compatible = "ti,am4372-hdq"; 2344 reg = <0x0 0x1000>; 2345 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; 2346 clocks = <&func_12m_clk>; 2347 clock-names = "fck"; 2348 status = "disabled"; 2349 }; 2350 }; 2351 2352 target-module@4c000 { /* 0x4834c000, ap 114 72.0 */ 2353 compatible = "ti,sysc"; 2354 status = "disabled"; 2355 #address-cells = <1>; 2356 #size-cells = <1>; 2357 ranges = <0x0 0x4c000 0x2000>; 2358 }; 2359 2360 target-module@80000 { /* 0x48380000, ap 123 42.0 */ 2361 compatible = "ti,sysc-omap4", "ti,sysc"; 2362 reg = <0x80000 0x4>, 2363 <0x80010 0x4>; 2364 reg-names = "rev", "sysc"; 2365 ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>; 2366 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2367 <SYSC_IDLE_NO>, 2368 <SYSC_IDLE_SMART>, 2369 <SYSC_IDLE_SMART_WKUP>; 2370 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2371 <SYSC_IDLE_NO>, 2372 <SYSC_IDLE_SMART>, 2373 <SYSC_IDLE_SMART_WKUP>; 2374 /* Domains (P, C): per_pwrdm, l3s_clkdm */ 2375 clocks = <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 0>; 2376 clock-names = "fck"; 2377 #address-cells = <1>; 2378 #size-cells = <1>; 2379 ranges = <0x0 0x80000 0x20000>; 2380 2381 dwc3_1: omap_dwc3@0 { 2382 compatible = "ti,am437x-dwc3"; 2383 reg = <0x0 0x10000>; 2384 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; 2385 #address-cells = <1>; 2386 #size-cells = <1>; 2387 utmi-mode = <1>; 2388 ranges = <0 0 0x20000>; 2389 2390 usb1: usb@10000 { 2391 compatible = "synopsys,dwc3"; 2392 reg = <0x10000 0x10000>; 2393 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, 2394 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, 2395 <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; 2396 interrupt-names = "peripheral", 2397 "host", 2398 "otg"; 2399 phys = <&usb2_phy1>; 2400 phy-names = "usb2-phy"; 2401 maximum-speed = "high-speed"; 2402 dr_mode = "otg"; 2403 status = "disabled"; 2404 snps,dis_u3_susphy_quirk; 2405 snps,dis_u2_susphy_quirk; 2406 }; 2407 }; 2408 }; 2409 2410 target-module@a8000 { /* 0x483a8000, ap 125 6c.0 */ 2411 compatible = "ti,sysc-omap4", "ti,sysc"; 2412 reg = <0xa8000 0x4>; 2413 reg-names = "rev"; 2414 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2415 clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP0_CLKCTRL 0>; 2416 clock-names = "fck"; 2417 #address-cells = <1>; 2418 #size-cells = <1>; 2419 ranges = <0x0 0xa8000 0x8000>; 2420 2421 ocp2scp0: ocp2scp@0 { 2422 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; 2423 #address-cells = <1>; 2424 #size-cells = <1>; 2425 ranges = <0 0 0x8000>; 2426 2427 usb2_phy1: phy@8000 { 2428 compatible = "ti,am437x-usb2"; 2429 reg = <0x0 0x8000>; 2430 syscon-phy-power = <&scm_conf 0x620>; 2431 clocks = <&usb_phy0_always_on_clk32k>, 2432 <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 8>; 2433 clock-names = "wkupclk", "refclk"; 2434 #phy-cells = <0>; 2435 status = "disabled"; 2436 }; 2437 }; 2438 }; 2439 2440 target-module@c0000 { /* 0x483c0000, ap 127 7a.0 */ 2441 compatible = "ti,sysc-omap4", "ti,sysc"; 2442 reg = <0xc0000 0x4>, 2443 <0xc0010 0x4>; 2444 reg-names = "rev", "sysc"; 2445 ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>; 2446 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2447 <SYSC_IDLE_NO>, 2448 <SYSC_IDLE_SMART>, 2449 <SYSC_IDLE_SMART_WKUP>; 2450 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2451 <SYSC_IDLE_NO>, 2452 <SYSC_IDLE_SMART>, 2453 <SYSC_IDLE_SMART_WKUP>; 2454 /* Domains (P, C): per_pwrdm, l3s_clkdm */ 2455 clocks = <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 0>; 2456 clock-names = "fck"; 2457 #address-cells = <1>; 2458 #size-cells = <1>; 2459 ranges = <0x0 0xc0000 0x20000>; 2460 2461 dwc3_2: omap_dwc3@0 { 2462 compatible = "ti,am437x-dwc3"; 2463 reg = <0x0 0x10000>; 2464 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 2465 #address-cells = <1>; 2466 #size-cells = <1>; 2467 utmi-mode = <1>; 2468 ranges = <0 0 0x20000>; 2469 2470 usb2: usb@10000 { 2471 compatible = "synopsys,dwc3"; 2472 reg = <0x10000 0x10000>; 2473 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>, 2474 <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>, 2475 <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 2476 interrupt-names = "peripheral", 2477 "host", 2478 "otg"; 2479 phys = <&usb2_phy2>; 2480 phy-names = "usb2-phy"; 2481 maximum-speed = "high-speed"; 2482 dr_mode = "otg"; 2483 status = "disabled"; 2484 snps,dis_u3_susphy_quirk; 2485 snps,dis_u2_susphy_quirk; 2486 }; 2487 }; 2488 }; 2489 2490 target-module@e8000 { /* 0x483e8000, ap 129 78.0 */ 2491 compatible = "ti,sysc-omap4", "ti,sysc"; 2492 reg = <0xe8000 0x4>; 2493 reg-names = "rev"; 2494 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2495 clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP1_CLKCTRL 0>; 2496 clock-names = "fck"; 2497 #address-cells = <1>; 2498 #size-cells = <1>; 2499 ranges = <0x0 0xe8000 0x8000>; 2500 2501 ocp2scp1: ocp2scp@0 { 2502 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; 2503 #address-cells = <1>; 2504 #size-cells = <1>; 2505 ranges = <0 0 0x8000>; 2506 2507 usb2_phy2: phy@8000 { 2508 compatible = "ti,am437x-usb2"; 2509 reg = <0x0 0x8000>; 2510 syscon-phy-power = <&scm_conf 0x628>; 2511 clocks = <&usb_phy1_always_on_clk32k>, 2512 <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 8>; 2513 clock-names = "wkupclk", "refclk"; 2514 #phy-cells = <0>; 2515 status = "disabled"; 2516 }; 2517 }; 2518 }; 2519 2520 target-module@f2000 { /* 0x483f2000, ap 112 5a.0 */ 2521 compatible = "ti,sysc"; 2522 status = "disabled"; 2523 #address-cells = <1>; 2524 #size-cells = <1>; 2525 ranges = <0x0 0xf2000 0x2000>; 2526 }; 2527 }; 2528}; 2529 2530