1/* 2 * Copyright 2016 Linaro Ltd 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a copy 5 * of this software and associated documentation files (the "Software"), to deal 6 * in the Software without restriction, including without limitation the rights 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 8 * copies of the Software, and to permit persons to whom the Software is 9 * furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 20 * THE SOFTWARE. 21 */ 22 23/dts-v1/; 24#include "arm-realview-pbx.dtsi" 25 26/ { 27 model = "ARM RealView Platform Baseboard for Cortex-A8"; 28 compatible = "arm,realview-pba8"; 29 arm,hbi = <0x178>; 30 31 cpus { 32 #address-cells = <1>; 33 #size-cells = <0>; 34 enable-method = "arm,realview-smp"; 35 36 cpu0: cpu@0 { 37 device_type = "cpu"; 38 compatible = "arm,cortex-a8"; 39 reg = <0>; 40 }; 41 }; 42 43 pmu: pmu@0 { 44 compatible = "arm,cortex-a8-pmu"; 45 interrupt-parent = <&intc>; 46 interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; 47 interrupt-affinity = <&cpu0>; 48 }; 49 50 /* Primary GIC PL390 interrupt controller in the test chip */ 51 intc: interrupt-controller@1e000000 { 52 compatible = "arm,pl390"; 53 #interrupt-cells = <3>; 54 #address-cells = <1>; 55 interrupt-controller; 56 reg = <0x1e001000 0x1000>, 57 <0x1e000000 0x100>; 58 }; 59}; 60 61ðernet { 62 interrupt-parent = <&intc>; 63 interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>; 64}; 65 66&usb { 67 interrupt-parent = <&intc>; 68 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>; 69}; 70 71&soc { 72 compatible = "arm,realview-pba8-soc", "simple-bus"; 73}; 74 75&syscon { 76 compatible = "arm,realview-pba8-syscon", "syscon", "simple-mfd"; 77}; 78 79&serial0 { 80 interrupt-parent = <&intc>; 81 interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>; 82}; 83 84&serial1 { 85 interrupt-parent = <&intc>; 86 interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>; 87}; 88 89&serial2 { 90 interrupt-parent = <&intc>; 91 interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>; 92}; 93 94&serial3 { 95 interrupt-parent = <&intc>; 96 interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>; 97}; 98 99&ssp { 100 interrupt-parent = <&intc>; 101 interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>; 102}; 103 104&wdog0 { 105 interrupt-parent = <&intc>; 106 interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>; 107}; 108 109&wdog1 { 110 interrupt-parent = <&intc>; 111 interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>; 112}; 113 114&timer01 { 115 interrupt-parent = <&intc>; 116 interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>; 117}; 118 119&timer23 { 120 interrupt-parent = <&intc>; 121 interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>; 122}; 123 124&gpio0 { 125 interrupt-parent = <&intc>; 126 interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>; 127}; 128 129&gpio1 { 130 interrupt-parent = <&intc>; 131 interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>; 132}; 133 134&gpio2 { 135 interrupt-parent = <&intc>; 136 interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>; 137}; 138 139&rtc { 140 interrupt-parent = <&intc>; 141 interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>; 142}; 143 144&timer45 { 145 interrupt-parent = <&intc>; 146 interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>; 147}; 148 149&timer67 { 150 interrupt-parent = <&intc>; 151 interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>; 152}; 153 154&aaci { 155 interrupt-parent = <&intc>; 156 interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>; 157}; 158 159&mmc { 160 interrupt-parent = <&intc>; 161 interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH>, 162 <0 18 IRQ_TYPE_LEVEL_HIGH>; 163}; 164 165&kmi0 { 166 interrupt-parent = <&intc>; 167 interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>; 168}; 169 170&kmi1 { 171 interrupt-parent = <&intc>; 172 interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>; 173}; 174 175&clcd { 176 interrupt-parent = <&intc>; 177 interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>; 178}; 179