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1// SPDX-License-Identifier: GPL-2.0
2// Copyright (c) 2020 AMD Inc.
3// Author: Supreeth Venkatesh <supreeth.venkatesh@amd.com>
4/dts-v1/;
5
6#include "aspeed-g5.dtsi"
7#include <dt-bindings/gpio/aspeed-gpio.h>
8
9/ {
10	model = "AMD EthanolX BMC";
11	compatible = "amd,ethanolx-bmc", "aspeed,ast2500";
12
13	memory@80000000 {
14		reg = <0x80000000 0x20000000>;
15	};
16	aliases {
17		serial0 = &uart1;
18		serial4 = &uart5;
19	};
20	chosen {
21		stdout-path = &uart5;
22		bootargs = "console=ttyS4,115200 earlyprintk";
23	};
24	leds {
25		compatible = "gpio-leds";
26
27		fault {
28			gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;
29		};
30
31		identify {
32			gpios = <&gpio ASPEED_GPIO(A, 3) GPIO_ACTIVE_LOW>;
33		};
34	};
35	iio-hwmon {
36		compatible = "iio-hwmon";
37		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>;
38	};
39};
40
41&fmc {
42	status = "okay";
43	flash@0 {
44		status = "okay";
45		m25p,fast-read;
46		#include "openbmc-flash-layout.dtsi"
47	};
48};
49
50
51&mac0 {
52	status = "okay";
53
54	pinctrl-names = "default";
55	pinctrl-0 = <&pinctrl_rmii1_default>;
56	clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
57		 <&syscon ASPEED_CLK_MAC1RCLK>;
58	clock-names = "MACCLK", "RCLK";
59};
60
61&uart1 {
62	//Host Console
63	status = "okay";
64	pinctrl-names = "default";
65	pinctrl-0 = <&pinctrl_txd1_default
66		     &pinctrl_rxd1_default>;
67};
68
69&uart5 {
70	//BMC Console
71	status = "okay";
72};
73
74&adc {
75	status = "okay";
76
77	pinctrl-names = "default";
78	pinctrl-0 = <&pinctrl_adc0_default
79		     &pinctrl_adc1_default
80		     &pinctrl_adc2_default
81		     &pinctrl_adc3_default
82		     &pinctrl_adc4_default>;
83};
84
85//APML for P0
86&i2c0 {
87	status = "okay";
88};
89
90//APML for P1
91&i2c1 {
92	status = "okay";
93};
94
95// Thermal Sensors
96&i2c7 {
97	status = "okay";
98
99	lm75a@48 {
100		compatible = "national,lm75a";
101		reg = <0x48>;
102	};
103
104	lm75a@49 {
105		compatible = "national,lm75a";
106		reg = <0x49>;
107	};
108
109	lm75a@4a {
110		compatible = "national,lm75a";
111		reg = <0x4a>;
112	};
113
114	lm75a@4b {
115		compatible = "national,lm75a";
116		reg = <0x4b>;
117	};
118
119	lm75a@4c {
120		compatible = "national,lm75a";
121		reg = <0x4c>;
122	};
123
124	lm75a@4d {
125		compatible = "national,lm75a";
126		reg = <0x4d>;
127	};
128
129	lm75a@4e {
130		compatible = "national,lm75a";
131		reg = <0x4e>;
132	};
133
134	lm75a@4f {
135		compatible = "national,lm75a";
136		reg = <0x4f>;
137	};
138};
139
140&kcs1 {
141	status = "okay";
142	kcs_addr = <0x60>;
143};
144
145&kcs2 {
146	status = "okay";
147	kcs_addr = <0x62>;
148};
149
150&kcs4 {
151	status = "okay";
152	kcs_addr = <0x97DE>;
153};
154
155&lpc_snoop {
156	status = "okay";
157	snoop-ports = <0x80>;
158};
159
160&lpc_ctrl {
161	//Enable lpc clock
162	status = "okay";
163};
164
165&pwm_tacho {
166	status = "okay";
167	pinctrl-names = "default";
168	pinctrl-0 = <&pinctrl_pwm0_default
169	&pinctrl_pwm1_default
170	&pinctrl_pwm2_default
171	&pinctrl_pwm3_default
172	&pinctrl_pwm4_default
173	&pinctrl_pwm5_default
174	&pinctrl_pwm6_default
175	&pinctrl_pwm7_default>;
176
177	fan@0 {
178		reg = <0x00>;
179		aspeed,fan-tach-ch = /bits/ 8 <0x00>;
180	};
181
182	fan@1 {
183		reg = <0x01>;
184		aspeed,fan-tach-ch = /bits/ 8 <0x01>;
185	};
186
187	fan@2 {
188		reg = <0x02>;
189		aspeed,fan-tach-ch = /bits/ 8 <0x02>;
190	};
191
192	fan@3 {
193		reg = <0x03>;
194		aspeed,fan-tach-ch = /bits/ 8 <0x03>;
195	};
196
197	fan@4 {
198		reg = <0x04>;
199		aspeed,fan-tach-ch = /bits/ 8 <0x04>;
200	};
201
202	fan@5 {
203		reg = <0x05>;
204		aspeed,fan-tach-ch = /bits/ 8 <0x05>;
205	};
206
207	fan@6 {
208		reg = <0x06>;
209		aspeed,fan-tach-ch = /bits/ 8 <0x06>;
210	};
211
212	fan@7 {
213		reg = <0x07>;
214		aspeed,fan-tach-ch = /bits/ 8 <0x07>;
215	};
216};
217
218
219
220