1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the iWave-RZ/G1H Qseven board 4 * 5 * Copyright (C) 2020 Renesas Electronics Corp. 6 */ 7 8/* 9 * SSI-SGTL5000 10 * 11 * This command is required when Playback/Capture 12 * 13 * amixer set "DVC Out" 100% 14 * amixer set "DVC In" 100% 15 * 16 * You can use Mute 17 * 18 * amixer set "DVC Out Mute" on 19 * amixer set "DVC In Mute" on 20 * 21 * You can use Volume Ramp 22 * 23 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" 24 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" 25 * amixer set "DVC Out Ramp" on 26 * aplay xxx.wav & 27 * amixer set "DVC Out" 80% // Volume Down 28 * amixer set "DVC Out" 100% // Volume Up 29 */ 30 31/dts-v1/; 32#include "r8a7742-iwg21m.dtsi" 33 34/ { 35 model = "iWave Systems RainboW-G21D-Qseven board based on RZ/G1H"; 36 compatible = "iwave,g21d", "iwave,g21m", "renesas,r8a7742"; 37 38 aliases { 39 serial2 = &scifa2; 40 serial4 = &scifb2; 41 ethernet0 = &avb; 42 }; 43 44 chosen { 45 bootargs = "ignore_loglevel root=/dev/mmcblk0p1 rw rootwait"; 46 stdout-path = "serial2:115200n8"; 47 }; 48 49 audio_clock: audio_clock { 50 compatible = "fixed-clock"; 51 #clock-cells = <0>; 52 clock-frequency = <26000000>; 53 }; 54 55 leds { 56 compatible = "gpio-leds"; 57 58 sdhi2_led { 59 label = "sdio-led"; 60 gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; 61 linux,default-trigger = "mmc1"; 62 }; 63 }; 64 65 reg_1p5v: 1p5v { 66 compatible = "regulator-fixed"; 67 regulator-name = "1P5V"; 68 regulator-min-microvolt = <1500000>; 69 regulator-max-microvolt = <1500000>; 70 regulator-always-on; 71 }; 72 73 rsnd_sgtl5000: sound { 74 compatible = "simple-audio-card"; 75 simple-audio-card,format = "i2s"; 76 simple-audio-card,bitclock-master = <&sndcodec>; 77 simple-audio-card,frame-master = <&sndcodec>; 78 79 sndcpu: simple-audio-card,cpu { 80 sound-dai = <&rcar_sound>; 81 }; 82 83 sndcodec: simple-audio-card,codec { 84 sound-dai = <&sgtl5000>; 85 }; 86 }; 87 88 vcc_sdhi2: regulator-vcc-sdhi2 { 89 compatible = "regulator-fixed"; 90 91 regulator-name = "SDHI2 Vcc"; 92 regulator-min-microvolt = <3300000>; 93 regulator-max-microvolt = <3300000>; 94 95 gpio = <&gpio1 27 GPIO_ACTIVE_LOW>; 96 }; 97 98 vccq_sdhi2: regulator-vccq-sdhi2 { 99 compatible = "regulator-gpio"; 100 101 regulator-name = "SDHI2 VccQ"; 102 regulator-min-microvolt = <1800000>; 103 regulator-max-microvolt = <3300000>; 104 105 gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; 106 gpios-states = <1>; 107 states = <3300000 1>, <1800000 0>; 108 }; 109}; 110 111&avb { 112 pinctrl-0 = <&avb_pins>; 113 pinctrl-names = "default"; 114 115 phy-handle = <&phy3>; 116 phy-mode = "gmii"; 117 renesas,no-ether-link; 118 status = "okay"; 119 120 phy3: ethernet-phy@3 { 121 reg = <3>; 122 micrel,led-mode = <1>; 123 }; 124}; 125 126&i2c2 { 127 pinctrl-0 = <&i2c2_pins>; 128 pinctrl-names = "default"; 129 130 status = "okay"; 131 clock-frequency = <400000>; 132 133 sgtl5000: codec@a { 134 compatible = "fsl,sgtl5000"; 135 #sound-dai-cells = <0>; 136 reg = <0x0a>; 137 clocks = <&audio_clock>; 138 VDDA-supply = <®_3p3v>; 139 VDDIO-supply = <®_3p3v>; 140 VDDD-supply = <®_1p5v>; 141 }; 142}; 143 144&can1 { 145 pinctrl-0 = <&can1_pins>; 146 pinctrl-names = "default"; 147 148 status = "okay"; 149}; 150 151&cmt0 { 152 status = "okay"; 153}; 154 155&gpio1 { 156 can-trx-en-gpio{ 157 gpio-hog; 158 gpios = <28 GPIO_ACTIVE_HIGH>; 159 output-low; 160 line-name = "can-trx-en-gpio"; 161 }; 162}; 163 164&hsusb { 165 pinctrl-0 = <&usb0_pins>; 166 pinctrl-names = "default"; 167 status = "okay"; 168}; 169 170&msiof0 { 171 pinctrl-0 = <&msiof0_pins>; 172 pinctrl-names = "default"; 173 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; 174 175 status = "okay"; 176 177 flash1: flash@0 { 178 compatible = "sst,sst25vf016b", "jedec,spi-nor"; 179 reg = <0>; 180 spi-max-frequency = <50000000>; 181 m25p,fast-read; 182 183 partitions { 184 compatible = "fixed-partitions"; 185 #address-cells = <1>; 186 #size-cells = <1>; 187 188 partition@0 { 189 label = "user"; 190 reg = <0x00000000 0x00200000>; 191 }; 192 }; 193 }; 194}; 195 196&pci0 { 197 pinctrl-0 = <&usb0_pins>; 198 pinctrl-names = "default"; 199 /* Disable hsusb to enable USB2.0 host mode support on J2 */ 200 /* status = "okay"; */ 201}; 202 203&pci1 { 204 pinctrl-0 = <&usb1_pins>; 205 pinctrl-names = "default"; 206 status = "okay"; 207}; 208 209&pci2 { 210 /* Disable xhci to enable USB2.0 host mode support on J23 bottom port */ 211 /* status = "okay"; */ 212}; 213 214&pcie_bus_clk { 215 clock-frequency = <100000000>; 216}; 217 218&pciec { 219 /* SW2[6] determines which connector is activated 220 * ON = PCIe X4 (connector-J7) 221 * OFF = mini-PCIe (connector-J26) 222 */ 223 status = "okay"; 224}; 225 226&pfc { 227 avb_pins: avb { 228 groups = "avb_mdio", "avb_gmii"; 229 function = "avb"; 230 }; 231 232 can1_pins: can1 { 233 groups = "can1_data_b"; 234 function = "can1"; 235 }; 236 237 i2c2_pins: i2c2 { 238 groups = "i2c2_b"; 239 function = "i2c2"; 240 }; 241 242 msiof0_pins: msiof0 { 243 groups = "msiof0_clk", "msiof0_sync", "msiof0_tx", "msiof0_rx"; 244 function = "msiof0"; 245 }; 246 247 scifa2_pins: scifa2 { 248 groups = "scifa2_data_c"; 249 function = "scifa2"; 250 }; 251 252 scifb2_pins: scifb2 { 253 groups = "scifb2_data", "scifb2_ctrl"; 254 function = "scifb2"; 255 }; 256 257 sdhi2_pins: sd2 { 258 groups = "sdhi2_data4", "sdhi2_ctrl"; 259 function = "sdhi2"; 260 power-source = <3300>; 261 }; 262 263 sdhi2_pins_uhs: sd2_uhs { 264 groups = "sdhi2_data4", "sdhi2_ctrl"; 265 function = "sdhi2"; 266 power-source = <1800>; 267 }; 268 269 sound_pins: sound { 270 groups = "ssi34_ctrl", "ssi3_data", "ssi4_data"; 271 function = "ssi"; 272 }; 273 274 usb0_pins: usb0 { 275 groups = "usb0"; 276 function = "usb0"; 277 }; 278 279 usb1_pins: usb1 { 280 groups = "usb1_pwen"; 281 function = "usb1"; 282 }; 283}; 284 285&rcar_sound { 286 pinctrl-0 = <&sound_pins>; 287 pinctrl-names = "default"; 288 status = "okay"; 289 290 /* Single DAI */ 291 #sound-dai-cells = <0>; 292 293 rcar_sound,dai { 294 dai0 { 295 playback = <&ssi4 &src4 &dvc1>; 296 capture = <&ssi3 &src3 &dvc0>; 297 }; 298 }; 299}; 300 301&rwdt { 302 timeout-sec = <60>; 303 status = "okay"; 304}; 305 306&scifa2 { 307 pinctrl-0 = <&scifa2_pins>; 308 pinctrl-names = "default"; 309 310 status = "okay"; 311}; 312 313&scifb2 { 314 pinctrl-0 = <&scifb2_pins>; 315 pinctrl-names = "default"; 316 317 uart-has-rtscts; 318 status = "okay"; 319}; 320 321&sdhi2 { 322 pinctrl-0 = <&sdhi2_pins>; 323 pinctrl-1 = <&sdhi2_pins_uhs>; 324 pinctrl-names = "default", "state_uhs"; 325 326 vmmc-supply = <&vcc_sdhi2>; 327 vqmmc-supply = <&vccq_sdhi2>; 328 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; 329 wp-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; 330 sd-uhs-sdr50; 331 status = "okay"; 332}; 333 334&ssi4 { 335 shared-pin; 336}; 337 338&usbphy { 339 status = "okay"; 340}; 341 342&xhci { 343 status = "okay"; 344}; 345