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1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include <dt-bindings/input/input.h>
5#include "tegra124.dtsi"
6
7/ {
8	model = "NVIDIA Tegra124 Venice2";
9	compatible = "nvidia,venice2", "nvidia,tegra124";
10
11	aliases {
12		rtc0 = "/i2c@7000d000/pmic@40";
13		rtc1 = "/rtc@7000e000";
14		serial0 = &uarta;
15	};
16
17	chosen {
18		stdout-path = "serial0:115200n8";
19	};
20
21	memory@80000000 {
22		reg = <0x0 0x80000000 0x0 0x80000000>;
23	};
24
25	host1x@50000000 {
26		hdmi@54280000 {
27			status = "okay";
28
29			vdd-supply = <&vdd_3v3_hdmi>;
30			pll-supply = <&vdd_hdmi_pll>;
31			hdmi-supply = <&vdd_5v0_hdmi>;
32
33			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
34			nvidia,hpd-gpio =
35				<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
36		};
37
38		sor@54540000 {
39			status = "okay";
40
41			avdd-io-hdmi-dp-supply = <&vdd_1v05_run>;
42			vdd-hdmi-dp-pll-supply = <&vdd_3v3_run>;
43
44			nvidia,dpaux = <&dpaux>;
45			nvidia,panel = <&panel>;
46		};
47
48		dpaux@545c0000 {
49			vdd-supply = <&vdd_3v3_panel>;
50			status = "okay";
51
52			aux-bus {
53				panel: panel {
54					compatible = "lg,lp129qe";
55					backlight = <&backlight>;
56				};
57			};
58		};
59	};
60
61	gpu@0,57000000 {
62		/*
63		 * Node left disabled on purpose - the bootloader will enable
64		 * it after having set the VPR up
65		 */
66		vdd-supply = <&vdd_gpu>;
67	};
68
69	pinmux: pinmux@70000868 {
70		pinctrl-names = "boot";
71		pinctrl-0 = <&pinmux_boot>;
72
73		pinmux_boot: common {
74			dap_mclk1_pw4 {
75				nvidia,pins = "dap_mclk1_pw4";
76				nvidia,function = "extperiph1";
77				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
78				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
79				nvidia,tristate = <TEGRA_PIN_DISABLE>;
80			};
81			dap1_din_pn1 {
82				nvidia,pins = "dap1_din_pn1";
83				nvidia,function = "i2s0";
84				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
85				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
86				nvidia,tristate = <TEGRA_PIN_ENABLE>;
87			};
88			dap1_dout_pn2 {
89				nvidia,pins = "dap1_dout_pn2",
90					      "dap1_fs_pn0",
91					      "dap1_sclk_pn3";
92				nvidia,function = "i2s0";
93				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
94				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
95				nvidia,tristate = <TEGRA_PIN_ENABLE>;
96			};
97			dap2_din_pa4 {
98				nvidia,pins = "dap2_din_pa4";
99				nvidia,function = "i2s1";
100				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
101				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
102				nvidia,tristate = <TEGRA_PIN_DISABLE>;
103			};
104			dap2_dout_pa5 {
105				nvidia,pins = "dap2_dout_pa5",
106					      "dap2_fs_pa2",
107					      "dap2_sclk_pa3";
108				nvidia,function = "i2s1";
109				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
110				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
111				nvidia,tristate = <TEGRA_PIN_DISABLE>;
112			};
113			dvfs_pwm_px0 {
114				nvidia,pins = "dvfs_pwm_px0",
115					      "dvfs_clk_px2";
116				nvidia,function = "cldvfs";
117				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
118				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
119				nvidia,tristate = <TEGRA_PIN_DISABLE>;
120			};
121			ulpi_clk_py0 {
122				nvidia,pins = "ulpi_clk_py0",
123					      "ulpi_nxt_py2",
124					      "ulpi_stp_py3";
125				nvidia,function = "spi1";
126				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
127				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
128				nvidia,tristate = <TEGRA_PIN_DISABLE>;
129			};
130			ulpi_dir_py1 {
131				nvidia,pins = "ulpi_dir_py1";
132				nvidia,function = "spi1";
133				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
134				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
135				nvidia,tristate = <TEGRA_PIN_DISABLE>;
136			};
137			cam_i2c_scl_pbb1 {
138				nvidia,pins = "cam_i2c_scl_pbb1",
139					      "cam_i2c_sda_pbb2";
140				nvidia,function = "i2c3";
141				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
142				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
143				nvidia,tristate = <TEGRA_PIN_DISABLE>;
144				nvidia,lock = <TEGRA_PIN_DISABLE>;
145				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
146			};
147			gen2_i2c_scl_pt5 {
148				nvidia,pins = "gen2_i2c_scl_pt5",
149					      "gen2_i2c_sda_pt6";
150				nvidia,function = "i2c2";
151				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
152				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
153				nvidia,tristate = <TEGRA_PIN_DISABLE>;
154				nvidia,lock = <TEGRA_PIN_DISABLE>;
155				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
156			};
157			pg4 {
158				nvidia,pins = "pg4",
159					      "pg5",
160					      "pg6",
161					      "pi3";
162				nvidia,function = "spi4";
163				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
164				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
165				nvidia,tristate = <TEGRA_PIN_DISABLE>;
166			};
167			pg7 {
168				nvidia,pins = "pg7";
169				nvidia,function = "spi4";
170				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
171				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
172				nvidia,tristate = <TEGRA_PIN_DISABLE>;
173			};
174			ph1 {
175				nvidia,pins = "ph1";
176				nvidia,function = "pwm1";
177				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
178				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
179				nvidia,tristate = <TEGRA_PIN_DISABLE>;
180			};
181			pk0 {
182				nvidia,pins = "pk0",
183					      "kb_row15_ps7",
184					      "clk_32k_out_pa0";
185				nvidia,function = "soc";
186				nvidia,pull = <TEGRA_PIN_PULL_UP>;
187				nvidia,tristate = <TEGRA_PIN_DISABLE>;
188				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
189			};
190			sdmmc1_clk_pz0 {
191				nvidia,pins = "sdmmc1_clk_pz0";
192				nvidia,function = "sdmmc1";
193				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
194				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
195				nvidia,tristate = <TEGRA_PIN_DISABLE>;
196			};
197			sdmmc1_cmd_pz1 {
198				nvidia,pins = "sdmmc1_cmd_pz1",
199					      "sdmmc1_dat0_py7",
200					      "sdmmc1_dat1_py6",
201					      "sdmmc1_dat2_py5",
202					      "sdmmc1_dat3_py4";
203				nvidia,function = "sdmmc1";
204				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
205				nvidia,pull = <TEGRA_PIN_PULL_UP>;
206				nvidia,tristate = <TEGRA_PIN_DISABLE>;
207			};
208			sdmmc3_clk_pa6 {
209				nvidia,pins = "sdmmc3_clk_pa6";
210				nvidia,function = "sdmmc3";
211				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
212				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
213				nvidia,tristate = <TEGRA_PIN_DISABLE>;
214			};
215			sdmmc3_cmd_pa7 {
216				nvidia,pins = "sdmmc3_cmd_pa7",
217					      "sdmmc3_dat0_pb7",
218					      "sdmmc3_dat1_pb6",
219					      "sdmmc3_dat2_pb5",
220					      "sdmmc3_dat3_pb4",
221					      "sdmmc3_clk_lb_out_pee4",
222					      "sdmmc3_clk_lb_in_pee5";
223				nvidia,function = "sdmmc3";
224				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
225				nvidia,pull = <TEGRA_PIN_PULL_UP>;
226				nvidia,tristate = <TEGRA_PIN_DISABLE>;
227			};
228			sdmmc4_clk_pcc4 {
229				nvidia,pins = "sdmmc4_clk_pcc4";
230				nvidia,function = "sdmmc4";
231				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
232				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
233				nvidia,tristate = <TEGRA_PIN_DISABLE>;
234			};
235			sdmmc4_cmd_pt7 {
236				nvidia,pins = "sdmmc4_cmd_pt7",
237					      "sdmmc4_dat0_paa0",
238					      "sdmmc4_dat1_paa1",
239					      "sdmmc4_dat2_paa2",
240					      "sdmmc4_dat3_paa3",
241					      "sdmmc4_dat4_paa4",
242					      "sdmmc4_dat5_paa5",
243					      "sdmmc4_dat6_paa6",
244					      "sdmmc4_dat7_paa7";
245				nvidia,function = "sdmmc4";
246				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
247				nvidia,pull = <TEGRA_PIN_PULL_UP>;
248				nvidia,tristate = <TEGRA_PIN_DISABLE>;
249			};
250			pwr_i2c_scl_pz6 {
251				nvidia,pins = "pwr_i2c_scl_pz6",
252					      "pwr_i2c_sda_pz7";
253				nvidia,function = "i2cpwr";
254				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
255				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
256				nvidia,tristate = <TEGRA_PIN_DISABLE>;
257				nvidia,lock = <TEGRA_PIN_DISABLE>;
258				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
259			};
260			jtag_rtck {
261				nvidia,pins = "jtag_rtck";
262				nvidia,function = "rtck";
263				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
264				nvidia,pull = <TEGRA_PIN_PULL_UP>;
265				nvidia,tristate = <TEGRA_PIN_DISABLE>;
266			};
267			clk_32k_in {
268				nvidia,pins = "clk_32k_in";
269				nvidia,function = "clk";
270				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
271				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
272				nvidia,tristate = <TEGRA_PIN_DISABLE>;
273			};
274			core_pwr_req {
275				nvidia,pins = "core_pwr_req";
276				nvidia,function = "pwron";
277				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
278				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
279				nvidia,tristate = <TEGRA_PIN_DISABLE>;
280			};
281			cpu_pwr_req {
282				nvidia,pins = "cpu_pwr_req";
283				nvidia,function = "cpu";
284				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
285				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
286				nvidia,tristate = <TEGRA_PIN_DISABLE>;
287			};
288			pwr_int_n {
289				nvidia,pins = "pwr_int_n";
290				nvidia,function = "pmi";
291				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
292				nvidia,pull = <TEGRA_PIN_PULL_UP>;
293				nvidia,tristate = <TEGRA_PIN_DISABLE>;
294			};
295			reset_out_n {
296				nvidia,pins = "reset_out_n";
297				nvidia,function = "reset_out_n";
298				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
299				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
300				nvidia,tristate = <TEGRA_PIN_DISABLE>;
301			};
302			clk3_out_pee0 {
303				nvidia,pins = "clk3_out_pee0";
304				nvidia,function = "extperiph3";
305				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
306				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
307				nvidia,tristate = <TEGRA_PIN_DISABLE>;
308			};
309			dap4_din_pp5 {
310				nvidia,pins = "dap4_din_pp5";
311				nvidia,function = "i2s3";
312				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
313				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
314				nvidia,tristate = <TEGRA_PIN_ENABLE>;
315			};
316			dap4_dout_pp6 {
317				nvidia,pins = "dap4_dout_pp6",
318					      "dap4_fs_pp4",
319					      "dap4_sclk_pp7";
320				nvidia,function = "i2s3";
321				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
322				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
323				nvidia,tristate = <TEGRA_PIN_ENABLE>;
324			};
325			gen1_i2c_sda_pc5 {
326				nvidia,pins = "gen1_i2c_sda_pc5",
327					      "gen1_i2c_scl_pc4";
328				nvidia,function = "i2c1";
329				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
330				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
331				nvidia,tristate = <TEGRA_PIN_DISABLE>;
332				nvidia,lock = <TEGRA_PIN_DISABLE>;
333				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
334			};
335			uart2_cts_n_pj5 {
336				nvidia,pins = "uart2_cts_n_pj5";
337				nvidia,function = "uartb";
338				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
339				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
340				nvidia,tristate = <TEGRA_PIN_DISABLE>;
341			};
342			uart2_rts_n_pj6 {
343				nvidia,pins = "uart2_rts_n_pj6";
344				nvidia,function = "uartb";
345				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
346				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
347				nvidia,tristate = <TEGRA_PIN_DISABLE>;
348			};
349			uart2_rxd_pc3 {
350				nvidia,pins = "uart2_rxd_pc3";
351				nvidia,function = "irda";
352				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
353				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
354				nvidia,tristate = <TEGRA_PIN_DISABLE>;
355			};
356			uart2_txd_pc2 {
357				nvidia,pins = "uart2_txd_pc2";
358				nvidia,function = "irda";
359				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
360				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
361				nvidia,tristate = <TEGRA_PIN_DISABLE>;
362			};
363			uart3_cts_n_pa1 {
364				nvidia,pins = "uart3_cts_n_pa1",
365					      "uart3_rxd_pw7";
366				nvidia,function = "uartc";
367				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
368				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
369				nvidia,tristate = <TEGRA_PIN_DISABLE>;
370			};
371			uart3_rts_n_pc0 {
372				nvidia,pins = "uart3_rts_n_pc0",
373					      "uart3_txd_pw6";
374				nvidia,function = "uartc";
375				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
376				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
377				nvidia,tristate = <TEGRA_PIN_DISABLE>;
378			};
379			hdmi_cec_pee3 {
380				nvidia,pins = "hdmi_cec_pee3";
381				nvidia,function = "cec";
382				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
383				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
384				nvidia,tristate = <TEGRA_PIN_DISABLE>;
385				nvidia,lock = <TEGRA_PIN_DISABLE>;
386				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
387			};
388			hdmi_int_pn7 {
389				nvidia,pins = "hdmi_int_pn7";
390				nvidia,function = "rsvd1";
391				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
392				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
393				nvidia,tristate = <TEGRA_PIN_DISABLE>;
394			};
395			ddc_scl_pv4 {
396				nvidia,pins = "ddc_scl_pv4",
397					      "ddc_sda_pv5";
398				nvidia,function = "i2c4";
399				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
400				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
401				nvidia,tristate = <TEGRA_PIN_DISABLE>;
402				nvidia,lock = <TEGRA_PIN_DISABLE>;
403				nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
404			};
405			pj7 {
406				nvidia,pins = "pj7",
407					      "pk7";
408				nvidia,function = "uartd";
409				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
410				nvidia,tristate = <TEGRA_PIN_DISABLE>;
411				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
412			};
413			pb0 {
414				nvidia,pins = "pb0",
415					      "pb1";
416				nvidia,function = "uartd";
417				nvidia,pull = <TEGRA_PIN_PULL_UP>;
418				nvidia,tristate = <TEGRA_PIN_DISABLE>;
419				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
420			};
421			ph0 {
422				nvidia,pins = "ph0";
423				nvidia,function = "pwm0";
424				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
425				nvidia,tristate = <TEGRA_PIN_DISABLE>;
426				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
427			};
428			kb_row10_ps2 {
429				nvidia,pins = "kb_row10_ps2";
430				nvidia,function = "uarta";
431				nvidia,pull = <TEGRA_PIN_PULL_UP>;
432				nvidia,tristate = <TEGRA_PIN_DISABLE>;
433				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
434			};
435			kb_row9_ps1 {
436				nvidia,pins = "kb_row9_ps1";
437				nvidia,function = "uarta";
438				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
439				nvidia,tristate = <TEGRA_PIN_DISABLE>;
440				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
441			};
442			kb_row6_pr6 {
443				nvidia,pins = "kb_row6_pr6";
444				nvidia,function = "displaya_alt";
445				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
446				nvidia,tristate = <TEGRA_PIN_DISABLE>;
447				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
448			};
449			usb_vbus_en0_pn4 {
450				nvidia,pins = "usb_vbus_en0_pn4",
451					      "usb_vbus_en1_pn5";
452				nvidia,function = "usb";
453				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
454				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
455				nvidia,tristate = <TEGRA_PIN_DISABLE>;
456				nvidia,lock = <TEGRA_PIN_DISABLE>;
457				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
458			};
459			drive_sdio1 {
460				nvidia,pins = "drive_sdio1";
461				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
462				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
463				nvidia,pull-down-strength = <32>;
464				nvidia,pull-up-strength = <42>;
465				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
466				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
467			};
468			drive_sdio3 {
469				nvidia,pins = "drive_sdio3";
470				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
471				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
472				nvidia,pull-down-strength = <20>;
473				nvidia,pull-up-strength = <36>;
474				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
475				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
476			};
477			drive_gma {
478				nvidia,pins = "drive_gma";
479				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
480				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
481				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
482				nvidia,pull-down-strength = <1>;
483				nvidia,pull-up-strength = <2>;
484				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
485				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
486				nvidia,drive-type = <1>;
487			};
488			als_irq_l {
489				nvidia,pins = "gpio_x3_aud_px3";
490				nvidia,function = "gmi";
491				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
492				nvidia,tristate = <TEGRA_PIN_ENABLE>;
493				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
494			};
495			codec_irq_l {
496				nvidia,pins = "ph4";
497				nvidia,function = "gmi";
498				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
499				nvidia,tristate = <TEGRA_PIN_DISABLE>;
500				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
501			};
502			lcd_bl_en {
503				nvidia,pins = "ph2";
504				nvidia,function = "gmi";
505				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
506				nvidia,tristate = <TEGRA_PIN_DISABLE>;
507				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
508			};
509			touch_irq_l {
510				nvidia,pins = "gpio_w3_aud_pw3";
511				nvidia,function = "spi6";
512				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
513				nvidia,tristate = <TEGRA_PIN_ENABLE>;
514				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
515			};
516			tpm_davint_l {
517				nvidia,pins = "ph6";
518				nvidia,function = "gmi";
519				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
520				nvidia,tristate = <TEGRA_PIN_ENABLE>;
521				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
522			};
523			ts_irq_l {
524				nvidia,pins = "pk2";
525				nvidia,function = "gmi";
526				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
527				nvidia,tristate = <TEGRA_PIN_ENABLE>;
528				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
529			};
530			ts_reset_l {
531				nvidia,pins = "pk4";
532				nvidia,function = "gmi";
533				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
534				nvidia,tristate = <TEGRA_PIN_DISABLE>;
535				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
536			};
537			ts_shdn_l {
538				nvidia,pins = "pk1";
539				nvidia,function = "gmi";
540				nvidia,pull = <TEGRA_PIN_PULL_UP>;
541				nvidia,tristate = <TEGRA_PIN_DISABLE>;
542				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
543			};
544			ph7 {
545				nvidia,pins = "ph7";
546				nvidia,function = "gmi";
547				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
548				nvidia,tristate = <TEGRA_PIN_DISABLE>;
549				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
550			};
551			kb_col0_ap {
552				nvidia,pins = "kb_col0_pq0";
553				nvidia,function = "rsvd4";
554				nvidia,pull = <TEGRA_PIN_PULL_UP>;
555				nvidia,tristate = <TEGRA_PIN_DISABLE>;
556				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
557			};
558			lid_open {
559				nvidia,pins = "kb_row4_pr4";
560				nvidia,function = "rsvd3";
561				nvidia,pull = <TEGRA_PIN_PULL_UP>;
562				nvidia,tristate = <TEGRA_PIN_DISABLE>;
563				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
564			};
565			en_vdd_sd {
566				nvidia,pins = "kb_row0_pr0";
567				nvidia,function = "rsvd4";
568				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
569				nvidia,tristate = <TEGRA_PIN_DISABLE>;
570				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
571			};
572			ac_ok {
573				nvidia,pins = "pj0";
574				nvidia,function = "gmi";
575				nvidia,pull = <TEGRA_PIN_PULL_UP>;
576				nvidia,tristate = <TEGRA_PIN_ENABLE>;
577				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
578			};
579			sensor_irq_l {
580				nvidia,pins = "pi6";
581				nvidia,function = "gmi";
582				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
583				nvidia,tristate = <TEGRA_PIN_DISABLE>;
584				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
585			};
586			wifi_en {
587				nvidia,pins = "gpio_x7_aud_px7";
588				nvidia,function = "rsvd4";
589				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
590				nvidia,tristate = <TEGRA_PIN_DISABLE>;
591				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
592			};
593			wifi_rst_l {
594				nvidia,pins = "clk2_req_pcc5";
595				nvidia,function = "dap";
596				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
597				nvidia,tristate = <TEGRA_PIN_DISABLE>;
598				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
599			};
600			hp_det_l {
601				nvidia,pins = "ulpi_data1_po2";
602				nvidia,function = "spi3";
603				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
604				nvidia,tristate = <TEGRA_PIN_DISABLE>;
605				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
606			};
607		};
608	};
609
610	serial@70006000 {
611		status = "okay";
612	};
613
614	pwm@7000a000 {
615		status = "okay";
616	};
617
618	i2c@7000c000 {
619		status = "okay";
620		clock-frequency = <100000>;
621
622		acodec: audio-codec@10 {
623			compatible = "maxim,max98090";
624			reg = <0x10>;
625			interrupt-parent = <&gpio>;
626			interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_FALLING>;
627		};
628	};
629
630	i2c@7000c400 {
631		status = "okay";
632		clock-frequency = <100000>;
633
634		trackpad@4b {
635			compatible = "atmel,maxtouch";
636			reg = <0x4b>;
637			interrupt-parent = <&gpio>;
638			interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_LOW>;
639			linux,gpio-keymap = <0 0 0 BTN_LEFT>;
640		};
641	};
642
643	i2c@7000c500 {
644		status = "okay";
645		clock-frequency = <100000>;
646	};
647
648	hdmi_ddc: i2c@7000c700 {
649		status = "okay";
650		clock-frequency = <100000>;
651	};
652
653	i2c@7000d000 {
654		status = "okay";
655		clock-frequency = <400000>;
656
657		pmic: pmic@40 {
658			compatible = "ams,as3722";
659			reg = <0x40>;
660			interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
661
662			ams,system-power-controller;
663
664			#interrupt-cells = <2>;
665			interrupt-controller;
666
667			gpio-controller;
668			#gpio-cells = <2>;
669
670			pinctrl-names = "default";
671			pinctrl-0 = <&as3722_default>;
672
673			as3722_default: pinmux {
674				gpio0 {
675					pins = "gpio0";
676					function = "gpio";
677					bias-pull-down;
678				};
679
680				gpio1_2_4_7 {
681					pins = "gpio1", "gpio2", "gpio4", "gpio7";
682					function = "gpio";
683					bias-pull-up;
684				};
685
686				gpio3_6 {
687					pins = "gpio3", "gpio6";
688					bias-high-impedance;
689				};
690
691				gpio5 {
692					pins = "gpio5";
693					function = "clk32k-out";
694				};
695			};
696
697			regulators {
698				vsup-sd2-supply = <&vdd_5v0_sys>;
699				vsup-sd3-supply = <&vdd_5v0_sys>;
700				vsup-sd4-supply = <&vdd_5v0_sys>;
701				vsup-sd5-supply = <&vdd_5v0_sys>;
702				vin-ldo0-supply = <&vdd_1v35_lp0>;
703				vin-ldo1-6-supply = <&vdd_3v3_run>;
704				vin-ldo2-5-7-supply = <&vddio_1v8>;
705				vin-ldo3-4-supply = <&vdd_3v3_sys>;
706				vin-ldo9-10-supply = <&vdd_5v0_sys>;
707				vin-ldo11-supply = <&vdd_3v3_run>;
708
709				sd0 {
710					regulator-name = "+VDD_CPU_AP";
711					regulator-min-microvolt = <700000>;
712					regulator-max-microvolt = <1400000>;
713					regulator-min-microamp = <3500000>;
714					regulator-max-microamp = <3500000>;
715					regulator-always-on;
716					regulator-boot-on;
717					ams,ext-control = <2>;
718				};
719
720				sd1 {
721					regulator-name = "+VDD_CORE";
722					regulator-min-microvolt = <700000>;
723					regulator-max-microvolt = <1350000>;
724					regulator-min-microamp = <2500000>;
725					regulator-max-microamp = <2500000>;
726					regulator-always-on;
727					regulator-boot-on;
728					ams,ext-control = <1>;
729				};
730
731				vdd_1v35_lp0: sd2 {
732					regulator-name = "+1.35V_LP0(sd2)";
733					regulator-min-microvolt = <1350000>;
734					regulator-max-microvolt = <1350000>;
735					regulator-always-on;
736					regulator-boot-on;
737				};
738
739				sd3 {
740					regulator-name = "+1.35V_LP0(sd3)";
741					regulator-min-microvolt = <1350000>;
742					regulator-max-microvolt = <1350000>;
743					regulator-always-on;
744					regulator-boot-on;
745				};
746
747				vdd_1v05_run: sd4 {
748					regulator-name = "+1.05V_RUN";
749					regulator-min-microvolt = <1050000>;
750					regulator-max-microvolt = <1050000>;
751				};
752
753				vddio_1v8: sd5 {
754					regulator-name = "+1.8V_VDDIO";
755					regulator-min-microvolt = <1800000>;
756					regulator-max-microvolt = <1800000>;
757					regulator-boot-on;
758					regulator-always-on;
759				};
760
761				vdd_gpu: sd6 {
762					regulator-name = "+VDD_GPU_AP";
763					regulator-min-microvolt = <650000>;
764					regulator-max-microvolt = <1200000>;
765					regulator-min-microamp = <3500000>;
766					regulator-max-microamp = <3500000>;
767					regulator-boot-on;
768					regulator-always-on;
769				};
770
771				avdd_1v05_run: ldo0 {
772					regulator-name = "+1.05V_RUN_AVDD";
773					regulator-min-microvolt = <1050000>;
774					regulator-max-microvolt = <1050000>;
775					regulator-boot-on;
776					regulator-always-on;
777					ams,ext-control = <1>;
778				};
779
780				ldo1 {
781					regulator-name = "+1.8V_RUN_CAM";
782					regulator-min-microvolt = <1800000>;
783					regulator-max-microvolt = <1800000>;
784				};
785
786				ldo2 {
787					regulator-name = "+1.2V_GEN_AVDD";
788					regulator-min-microvolt = <1200000>;
789					regulator-max-microvolt = <1200000>;
790					regulator-boot-on;
791					regulator-always-on;
792				};
793
794				ldo3 {
795					regulator-name = "+1.00V_LP0_VDD_RTC";
796					regulator-min-microvolt = <1000000>;
797					regulator-max-microvolt = <1000000>;
798					regulator-boot-on;
799					regulator-always-on;
800					ams,enable-tracking;
801				};
802
803				vdd_run_cam: ldo4 {
804					regulator-name = "+3.3V_RUN_CAM";
805					regulator-min-microvolt = <2800000>;
806					regulator-max-microvolt = <2800000>;
807				};
808
809				ldo5 {
810					regulator-name = "+1.2V_RUN_CAM_FRONT";
811					regulator-min-microvolt = <1200000>;
812					regulator-max-microvolt = <1200000>;
813				};
814
815				vddio_sdmmc3: ldo6 {
816					regulator-name = "+VDDIO_SDMMC3";
817					regulator-min-microvolt = <1800000>;
818					regulator-max-microvolt = <3300000>;
819				};
820
821				ldo7 {
822					regulator-name = "+1.05V_RUN_CAM_REAR";
823					regulator-min-microvolt = <1050000>;
824					regulator-max-microvolt = <1050000>;
825				};
826
827				ldo9 {
828					regulator-name = "+2.8V_RUN_TOUCH";
829					regulator-min-microvolt = <2800000>;
830					regulator-max-microvolt = <2800000>;
831				};
832
833				ldo10 {
834					regulator-name = "+2.8V_RUN_CAM_AF";
835					regulator-min-microvolt = <2800000>;
836					regulator-max-microvolt = <2800000>;
837				};
838
839				ldo11 {
840					regulator-name = "+1.8V_RUN_VPP_FUSE";
841					regulator-min-microvolt = <1800000>;
842					regulator-max-microvolt = <1800000>;
843				};
844			};
845		};
846	};
847
848	spi@7000d400 {
849		status = "okay";
850
851		cros_ec: cros-ec@0 {
852			compatible = "google,cros-ec-spi";
853			spi-max-frequency = <4000000>;
854			interrupt-parent = <&gpio>;
855			interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
856			reg = <0>;
857
858			google,cros-ec-spi-msg-delay = <2000>;
859
860			i2c-tunnel {
861				compatible = "google,cros-ec-i2c-tunnel";
862				#address-cells = <1>;
863				#size-cells = <0>;
864
865				google,remote-bus = <0>;
866
867				charger: bq24735@9 {
868					compatible = "ti,bq24735";
869					reg = <0x9>;
870					interrupt-parent = <&gpio>;
871					interrupts = <TEGRA_GPIO(J, 0)
872							IRQ_TYPE_EDGE_BOTH>;
873					ti,ac-detect-gpios = <&gpio
874							TEGRA_GPIO(J, 0)
875							GPIO_ACTIVE_HIGH>;
876				};
877
878				battery: sbs-battery@b {
879					compatible = "sbs,sbs-battery";
880					reg = <0xb>;
881					sbs,i2c-retry-count = <2>;
882					sbs,poll-retry-count = <1>;
883				};
884			};
885		};
886	};
887
888	spi@7000da00 {
889		status = "okay";
890		spi-max-frequency = <25000000>;
891		spi-flash@0 {
892			compatible = "winbond,w25q32dw", "jedec,spi-nor";
893			reg = <0>;
894			spi-max-frequency = <20000000>;
895		};
896	};
897
898	pmc@7000e400 {
899		nvidia,invert-interrupt;
900		nvidia,suspend-mode = <1>;
901		nvidia,cpu-pwr-good-time = <500>;
902		nvidia,cpu-pwr-off-time = <300>;
903		nvidia,core-pwr-good-time = <641 3845>;
904		nvidia,core-pwr-off-time = <61036>;
905		nvidia,core-power-req-active-high;
906		nvidia,sys-clock-req-active-high;
907	};
908
909	hda@70030000 {
910		status = "okay";
911	};
912
913	usb@70090000 {
914		phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, /* 1st USB A */
915		       <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, /* Internal USB */
916		       <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, /* 2nd USB A */
917		       <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>, /* 1st USB A */
918		       <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>; /* 2nd USB A */
919		phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0", "usb3-1";
920
921		avddio-pex-supply = <&vdd_1v05_run>;
922		dvddio-pex-supply = <&vdd_1v05_run>;
923		avdd-usb-supply = <&vdd_3v3_lp0>;
924		avdd-pll-utmip-supply = <&vddio_1v8>;
925		avdd-pll-erefe-supply = <&avdd_1v05_run>;
926		avdd-usb-ss-pll-supply = <&vdd_1v05_run>;
927		hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
928		hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>;
929
930		status = "okay";
931	};
932
933	padctl@7009f000 {
934		avdd-pll-utmip-supply = <&vddio_1v8>;
935		avdd-pll-erefe-supply = <&avdd_1v05_run>;
936		avdd-pex-pll-supply = <&vdd_1v05_run>;
937		hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
938
939		pads {
940			usb2 {
941				status = "okay";
942
943				lanes {
944					usb2-0 {
945						nvidia,function = "xusb";
946						status = "okay";
947					};
948
949					usb2-1 {
950						nvidia,function = "xusb";
951						status = "okay";
952					};
953
954					usb2-2 {
955						nvidia,function = "xusb";
956						status = "okay";
957					};
958				};
959			};
960
961			pcie {
962				status = "okay";
963
964				lanes {
965					pcie-0 {
966						nvidia,function = "usb3-ss";
967						status = "okay";
968					};
969
970					pcie-1 {
971						nvidia,function = "usb3-ss";
972						status = "okay";
973					};
974				};
975			};
976		};
977
978		ports {
979			usb2-0 {
980				status = "okay";
981				mode = "otg";
982
983				vbus-supply = <&vdd_usb1_vbus>;
984			};
985
986			usb2-1 {
987				status = "okay";
988				mode = "host";
989
990				vbus-supply = <&vdd_run_cam>;
991			};
992
993			usb2-2 {
994				status = "okay";
995				mode = "host";
996
997				vbus-supply = <&vdd_usb3_vbus>;
998			};
999
1000			usb3-0 {
1001				nvidia,usb2-companion = <0>;
1002				status = "okay";
1003			};
1004
1005			usb3-1 {
1006				nvidia,usb2-companion = <2>;
1007				status = "okay";
1008			};
1009		};
1010	};
1011
1012	mmc@700b0400 {
1013		cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
1014		power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
1015		wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
1016		status = "okay";
1017		bus-width = <4>;
1018		vqmmc-supply = <&vddio_sdmmc3>;
1019	};
1020
1021	mmc@700b0600 {
1022		status = "okay";
1023		bus-width = <8>;
1024		non-removable;
1025	};
1026
1027	ahub@70300000 {
1028		i2s@70301100 {
1029			status = "okay";
1030		};
1031	};
1032
1033	usb@7d000000 {
1034		status = "okay";
1035	};
1036
1037	usb-phy@7d000000 {
1038		status = "okay";
1039		vbus-supply = <&vdd_usb1_vbus>;
1040	};
1041
1042	usb@7d004000 {
1043		status = "okay";
1044	};
1045
1046	usb-phy@7d004000 {
1047		status = "okay";
1048		vbus-supply = <&vdd_run_cam>;
1049	};
1050
1051	usb@7d008000 {
1052		status = "okay";
1053	};
1054
1055	usb-phy@7d008000 {
1056		status = "okay";
1057		vbus-supply = <&vdd_usb3_vbus>;
1058	};
1059
1060	backlight: backlight {
1061		compatible = "pwm-backlight";
1062
1063		enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1064		power-supply = <&vdd_led>;
1065		pwms = <&pwm 1 1000000>;
1066
1067		brightness-levels = <0 4 8 16 32 64 128 255>;
1068		default-brightness-level = <6>;
1069	};
1070
1071	clk32k_in: clock@0 {
1072		compatible = "fixed-clock";
1073		clock-frequency = <32768>;
1074		#clock-cells = <0>;
1075	};
1076
1077	gpio-keys {
1078		compatible = "gpio-keys";
1079
1080		power {
1081			label = "Power";
1082			gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1083			linux,code = <KEY_POWER>;
1084			debounce-interval = <10>;
1085			wakeup-source;
1086		};
1087	};
1088
1089	vdd_mux: regulator@0 {
1090		compatible = "regulator-fixed";
1091		regulator-name = "+VDD_MUX";
1092		regulator-min-microvolt = <12000000>;
1093		regulator-max-microvolt = <12000000>;
1094		regulator-always-on;
1095		regulator-boot-on;
1096	};
1097
1098	vdd_5v0_sys: regulator@1 {
1099		compatible = "regulator-fixed";
1100		regulator-name = "+5V_SYS";
1101		regulator-min-microvolt = <5000000>;
1102		regulator-max-microvolt = <5000000>;
1103		regulator-always-on;
1104		regulator-boot-on;
1105		vin-supply = <&vdd_mux>;
1106	};
1107
1108	vdd_3v3_sys: regulator@2 {
1109		compatible = "regulator-fixed";
1110		regulator-name = "+3.3V_SYS";
1111		regulator-min-microvolt = <3300000>;
1112		regulator-max-microvolt = <3300000>;
1113		regulator-always-on;
1114		regulator-boot-on;
1115		vin-supply = <&vdd_mux>;
1116	};
1117
1118	vdd_3v3_run: regulator@3 {
1119		compatible = "regulator-fixed";
1120		regulator-name = "+3.3V_RUN";
1121		regulator-min-microvolt = <3300000>;
1122		regulator-max-microvolt = <3300000>;
1123		regulator-always-on;
1124		regulator-boot-on;
1125		gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
1126		enable-active-high;
1127		vin-supply = <&vdd_3v3_sys>;
1128	};
1129
1130	vdd_3v3_hdmi: regulator@4 {
1131		compatible = "regulator-fixed";
1132		regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
1133		regulator-min-microvolt = <3300000>;
1134		regulator-max-microvolt = <3300000>;
1135		vin-supply = <&vdd_3v3_run>;
1136	};
1137
1138	vdd_led: regulator@5 {
1139		compatible = "regulator-fixed";
1140		regulator-name = "+VDD_LED";
1141		regulator-min-microvolt = <3300000>;
1142		regulator-max-microvolt = <3300000>;
1143		gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
1144		enable-active-high;
1145		vin-supply = <&vdd_mux>;
1146	};
1147
1148	vdd_5v0_ts: regulator@6 {
1149		compatible = "regulator-fixed";
1150		regulator-name = "+5V_VDD_TS_SW";
1151		regulator-min-microvolt = <5000000>;
1152		regulator-max-microvolt = <5000000>;
1153		regulator-boot-on;
1154		gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
1155		enable-active-high;
1156		vin-supply = <&vdd_5v0_sys>;
1157	};
1158
1159	vdd_usb1_vbus: regulator@7 {
1160		compatible = "regulator-fixed";
1161		regulator-name = "+5V_USB_HS";
1162		regulator-min-microvolt = <5000000>;
1163		regulator-max-microvolt = <5000000>;
1164		gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1165		enable-active-high;
1166		gpio-open-drain;
1167		vin-supply = <&vdd_5v0_sys>;
1168	};
1169
1170	vdd_usb3_vbus: regulator@8 {
1171		compatible = "regulator-fixed";
1172		regulator-name = "+5V_USB_SS";
1173		regulator-min-microvolt = <5000000>;
1174		regulator-max-microvolt = <5000000>;
1175		gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
1176		enable-active-high;
1177		gpio-open-drain;
1178		vin-supply = <&vdd_5v0_sys>;
1179	};
1180
1181	vdd_3v3_panel: regulator@9 {
1182		compatible = "regulator-fixed";
1183		regulator-name = "+3.3V_PANEL";
1184		regulator-min-microvolt = <3300000>;
1185		regulator-max-microvolt = <3300000>;
1186		gpio = <&pmic 4 GPIO_ACTIVE_HIGH>;
1187		enable-active-high;
1188		vin-supply = <&vdd_3v3_run>;
1189	};
1190
1191	vdd_3v3_lp0: regulator@10 {
1192		compatible = "regulator-fixed";
1193		regulator-name = "+3.3V_LP0";
1194		regulator-min-microvolt = <3300000>;
1195		regulator-max-microvolt = <3300000>;
1196		/*
1197		 * TODO: find a way to wire this up with the USB EHCI
1198		 * controllers so that it can be enabled on demand.
1199		 */
1200		regulator-always-on;
1201		gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
1202		enable-active-high;
1203		vin-supply = <&vdd_3v3_sys>;
1204	};
1205
1206	vdd_hdmi_pll: regulator@11 {
1207		compatible = "regulator-fixed";
1208		regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
1209		regulator-min-microvolt = <1050000>;
1210		regulator-max-microvolt = <1050000>;
1211		gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1212		vin-supply = <&vdd_1v05_run>;
1213	};
1214
1215	vdd_5v0_hdmi: regulator@12 {
1216		compatible = "regulator-fixed";
1217		regulator-name = "+5V_HDMI_CON";
1218		regulator-min-microvolt = <5000000>;
1219		regulator-max-microvolt = <5000000>;
1220		gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1221		enable-active-high;
1222		vin-supply = <&vdd_5v0_sys>;
1223	};
1224
1225	sound {
1226		compatible = "nvidia,tegra-audio-max98090-venice2",
1227			     "nvidia,tegra-audio-max98090";
1228		nvidia,model = "NVIDIA Tegra Venice2";
1229
1230		nvidia,audio-routing =
1231			"Headphones", "HPR",
1232			"Headphones", "HPL",
1233			"Speakers", "SPKR",
1234			"Speakers", "SPKL",
1235			"Mic Jack", "MICBIAS",
1236			"IN34", "Mic Jack";
1237
1238		nvidia,i2s-controller = <&tegra_i2s1>;
1239		nvidia,audio-codec = <&acodec>;
1240
1241		clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
1242			 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
1243			 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1244		clock-names = "pll_a", "pll_a_out0", "mclk";
1245
1246		assigned-clocks = <&tegra_car TEGRA124_CLK_EXTERN1>,
1247				  <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1248
1249		assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
1250					 <&tegra_car TEGRA124_CLK_EXTERN1>;
1251	};
1252};
1253
1254#include "cros-ec-keyboard.dtsi"
1255