1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar@mentor.com> 4 * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel@mentor.com> 5 */ 6 7/dts-v1/; 8#include <dt-bindings/input/linux-event-codes.h> 9#include <dt-bindings/pwm/pwm.h> 10#include "rk3399.dtsi" 11#include "rk3399-opp.dtsi" 12 13/ { 14 chosen { 15 stdout-path = "serial2:1500000n8"; 16 }; 17 18 clkin_gmac: external-gmac-clock { 19 compatible = "fixed-clock"; 20 clock-frequency = <125000000>; 21 clock-output-names = "clkin_gmac"; 22 #clock-cells = <0>; 23 }; 24 25 sdio_pwrseq: sdio-pwrseq { 26 compatible = "mmc-pwrseq-simple"; 27 clocks = <&rk808 1>; 28 clock-names = "ext_clock"; 29 pinctrl-names = "default"; 30 pinctrl-0 = <&wifi_enable_h>; 31 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; 32 }; 33 34 vcc12v_dcin: dc-12v { 35 compatible = "regulator-fixed"; 36 regulator-name = "vcc12v_dcin"; 37 regulator-always-on; 38 regulator-boot-on; 39 regulator-min-microvolt = <12000000>; 40 regulator-max-microvolt = <12000000>; 41 }; 42 43 vcc5v0_sys: vcc-sys { 44 compatible = "regulator-fixed"; 45 regulator-name = "vcc5v0_sys"; 46 regulator-always-on; 47 regulator-boot-on; 48 regulator-min-microvolt = <5000000>; 49 regulator-max-microvolt = <5000000>; 50 vin-supply = <&vcc12v_dcin>; 51 }; 52 53 vcc_0v9: vcc-0v9 { 54 compatible = "regulator-fixed"; 55 regulator-name = "vcc_0v9"; 56 regulator-always-on; 57 regulator-boot-on; 58 regulator-min-microvolt = <900000>; 59 regulator-max-microvolt = <900000>; 60 vin-supply = <&vcc3v3_sys>; 61 }; 62 63 vcc3v3_pcie: vcc3v3-pcie-regulator { 64 compatible = "regulator-fixed"; 65 enable-active-high; 66 gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; 67 pinctrl-names = "default"; 68 pinctrl-0 = <&pcie_pwr_en>; 69 regulator-name = "vcc3v3_pcie"; 70 regulator-always-on; 71 regulator-boot-on; 72 vin-supply = <&vcc5v0_sys>; 73 }; 74 75 vcc3v3_sys: vcc3v3-sys { 76 compatible = "regulator-fixed"; 77 regulator-name = "vcc3v3_sys"; 78 regulator-always-on; 79 regulator-boot-on; 80 regulator-min-microvolt = <3300000>; 81 regulator-max-microvolt = <3300000>; 82 vin-supply = <&vcc5v0_sys>; 83 }; 84 85 vcc5v0_host: vcc5v0-host-regulator { 86 compatible = "regulator-fixed"; 87 enable-active-high; 88 gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; 89 pinctrl-names = "default"; 90 pinctrl-0 = <&vcc5v0_host_en>; 91 regulator-name = "vcc5v0_host"; 92 regulator-always-on; 93 vin-supply = <&vcc5v0_sys>; 94 }; 95 96 vcc5v0_typec: vcc5v0-typec-regulator { 97 compatible = "regulator-fixed"; 98 enable-active-high; 99 gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; 100 pinctrl-names = "default"; 101 pinctrl-0 = <&vcc5v0_typec_en>; 102 regulator-name = "vcc5v0_typec"; 103 regulator-always-on; 104 vin-supply = <&vcc5v0_sys>; 105 }; 106 107 vcc_lan: vcc3v3-phy-regulator { 108 compatible = "regulator-fixed"; 109 regulator-name = "vcc_lan"; 110 regulator-always-on; 111 regulator-boot-on; 112 regulator-min-microvolt = <3300000>; 113 regulator-max-microvolt = <3300000>; 114 115 regulator-state-mem { 116 regulator-off-in-suspend; 117 }; 118 }; 119 120 vdd_log: vdd-log { 121 compatible = "pwm-regulator"; 122 pwms = <&pwm2 0 25000 1>; 123 regulator-name = "vdd_log"; 124 regulator-always-on; 125 regulator-boot-on; 126 regulator-min-microvolt = <800000>; 127 regulator-max-microvolt = <1400000>; 128 vin-supply = <&vcc5v0_sys>; 129 }; 130}; 131 132&cpu_l0 { 133 cpu-supply = <&vdd_cpu_l>; 134}; 135 136&cpu_l1 { 137 cpu-supply = <&vdd_cpu_l>; 138}; 139 140&cpu_l2 { 141 cpu-supply = <&vdd_cpu_l>; 142}; 143 144&cpu_l3 { 145 cpu-supply = <&vdd_cpu_l>; 146}; 147 148&cpu_b0 { 149 cpu-supply = <&vdd_cpu_b>; 150}; 151 152&cpu_b1 { 153 cpu-supply = <&vdd_cpu_b>; 154}; 155 156&emmc_phy { 157 status = "okay"; 158}; 159 160&gmac { 161 assigned-clocks = <&cru SCLK_RMII_SRC>; 162 assigned-clock-parents = <&clkin_gmac>; 163 clock_in_out = "input"; 164 phy-supply = <&vcc_lan>; 165 phy-mode = "rgmii"; 166 pinctrl-names = "default"; 167 pinctrl-0 = <&rgmii_pins>; 168 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 169 snps,reset-active-low; 170 snps,reset-delays-us = <0 10000 50000>; 171 tx_delay = <0x28>; 172 rx_delay = <0x11>; 173 status = "okay"; 174}; 175 176&gpu { 177 mali-supply = <&vdd_gpu>; 178 status = "okay"; 179}; 180 181&hdmi { 182 ddc-i2c-bus = <&i2c3>; 183 pinctrl-names = "default"; 184 pinctrl-0 = <&hdmi_cec>; 185 status = "okay"; 186}; 187 188&hdmi_sound { 189 status = "okay"; 190}; 191 192&i2c0 { 193 clock-frequency = <400000>; 194 i2c-scl-rising-time-ns = <168>; 195 i2c-scl-falling-time-ns = <4>; 196 status = "okay"; 197 198 rk808: pmic@1b { 199 compatible = "rockchip,rk808"; 200 reg = <0x1b>; 201 interrupt-parent = <&gpio1>; 202 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 203 #clock-cells = <1>; 204 clock-output-names = "xin32k", "rk808-clkout2"; 205 pinctrl-names = "default"; 206 pinctrl-0 = <&pmic_int_l>; 207 rockchip,system-power-controller; 208 wakeup-source; 209 210 vcc1-supply = <&vcc5v0_sys>; 211 vcc2-supply = <&vcc5v0_sys>; 212 vcc3-supply = <&vcc5v0_sys>; 213 vcc4-supply = <&vcc5v0_sys>; 214 vcc6-supply = <&vcc5v0_sys>; 215 vcc7-supply = <&vcc5v0_sys>; 216 vcc8-supply = <&vcc3v3_sys>; 217 vcc9-supply = <&vcc5v0_sys>; 218 vcc10-supply = <&vcc5v0_sys>; 219 vcc11-supply = <&vcc5v0_sys>; 220 vcc12-supply = <&vcc3v3_sys>; 221 vddio-supply = <&vcc_1v8>; 222 223 regulators { 224 vdd_center: DCDC_REG1 { 225 regulator-name = "vdd_center"; 226 regulator-always-on; 227 regulator-boot-on; 228 regulator-min-microvolt = <750000>; 229 regulator-max-microvolt = <1350000>; 230 regulator-ramp-delay = <6001>; 231 regulator-state-mem { 232 regulator-off-in-suspend; 233 }; 234 }; 235 236 vdd_cpu_l: DCDC_REG2 { 237 regulator-name = "vdd_cpu_l"; 238 regulator-always-on; 239 regulator-boot-on; 240 regulator-min-microvolt = <750000>; 241 regulator-max-microvolt = <1350000>; 242 regulator-ramp-delay = <6001>; 243 regulator-state-mem { 244 regulator-off-in-suspend; 245 }; 246 }; 247 248 vcc_ddr: DCDC_REG3 { 249 regulator-name = "vcc_ddr"; 250 regulator-always-on; 251 regulator-boot-on; 252 regulator-state-mem { 253 regulator-on-in-suspend; 254 }; 255 }; 256 257 vcc_1v8: DCDC_REG4 { 258 regulator-name = "vcc_1v8"; 259 regulator-always-on; 260 regulator-boot-on; 261 regulator-min-microvolt = <1800000>; 262 regulator-max-microvolt = <1800000>; 263 regulator-state-mem { 264 regulator-on-in-suspend; 265 regulator-suspend-microvolt = <1800000>; 266 }; 267 }; 268 269 vcc1v8_codec: LDO_REG1 { 270 regulator-name = "vcc1v8_codec"; 271 regulator-always-on; 272 regulator-boot-on; 273 regulator-min-microvolt = <1800000>; 274 regulator-max-microvolt = <1800000>; 275 regulator-state-mem { 276 regulator-off-in-suspend; 277 }; 278 }; 279 280 vcc1v8_hdmi: LDO_REG2 { 281 regulator-name = "vcc1v8_hdmi"; 282 regulator-always-on; 283 regulator-boot-on; 284 regulator-min-microvolt = <1800000>; 285 regulator-max-microvolt = <1800000>; 286 regulator-state-mem { 287 regulator-off-in-suspend; 288 }; 289 }; 290 291 vcca_1v8: LDO_REG3 { 292 regulator-name = "vcca_1v8"; 293 regulator-always-on; 294 regulator-boot-on; 295 regulator-min-microvolt = <1800000>; 296 regulator-max-microvolt = <1800000>; 297 regulator-state-mem { 298 regulator-on-in-suspend; 299 regulator-suspend-microvolt = <1800000>; 300 }; 301 }; 302 303 vcc_sdio: LDO_REG4 { 304 regulator-name = "vcc_sdio"; 305 regulator-always-on; 306 regulator-boot-on; 307 regulator-min-microvolt = <3000000>; 308 regulator-max-microvolt = <3000000>; 309 regulator-state-mem { 310 regulator-on-in-suspend; 311 regulator-suspend-microvolt = <3000000>; 312 }; 313 }; 314 315 vcca3v0_codec: LDO_REG5 { 316 regulator-name = "vcca3v0_codec"; 317 regulator-always-on; 318 regulator-boot-on; 319 regulator-min-microvolt = <3000000>; 320 regulator-max-microvolt = <3000000>; 321 regulator-state-mem { 322 regulator-off-in-suspend; 323 }; 324 }; 325 326 vcc_1v5: LDO_REG6 { 327 regulator-name = "vcc_1v5"; 328 regulator-always-on; 329 regulator-boot-on; 330 regulator-min-microvolt = <1500000>; 331 regulator-max-microvolt = <1500000>; 332 regulator-state-mem { 333 regulator-on-in-suspend; 334 regulator-suspend-microvolt = <1500000>; 335 }; 336 }; 337 338 vcc0v9_hdmi: LDO_REG7 { 339 regulator-name = "vcc0v9_hdmi"; 340 regulator-always-on; 341 regulator-boot-on; 342 regulator-min-microvolt = <900000>; 343 regulator-max-microvolt = <900000>; 344 regulator-state-mem { 345 regulator-off-in-suspend; 346 }; 347 }; 348 349 vcc_3v0: LDO_REG8 { 350 regulator-name = "vcc_3v0"; 351 regulator-always-on; 352 regulator-boot-on; 353 regulator-min-microvolt = <3000000>; 354 regulator-max-microvolt = <3000000>; 355 regulator-state-mem { 356 regulator-on-in-suspend; 357 regulator-suspend-microvolt = <3000000>; 358 }; 359 }; 360 361 vcc_cam: SWITCH_REG1 { 362 regulator-name = "vcc_cam"; 363 regulator-always-on; 364 regulator-boot-on; 365 regulator-min-microvolt = <3300000>; 366 regulator-max-microvolt = <3300000>; 367 regulator-state-mem { 368 regulator-off-in-suspend; 369 }; 370 }; 371 372 vcc_mipi: SWITCH_REG2 { 373 regulator-name = "vcc_mipi"; 374 regulator-always-on; 375 regulator-boot-on; 376 regulator-min-microvolt = <3300000>; 377 regulator-max-microvolt = <3300000>; 378 regulator-state-mem { 379 regulator-off-in-suspend; 380 }; 381 }; 382 }; 383 }; 384 385 vdd_cpu_b: regulator@40 { 386 compatible = "silergy,syr827"; 387 reg = <0x40>; 388 fcs,suspend-voltage-selector = <1>; 389 pinctrl-names = "default"; 390 pinctrl-0 = <&vsel1_pin>; 391 regulator-name = "vdd_cpu_b"; 392 regulator-min-microvolt = <712500>; 393 regulator-max-microvolt = <1500000>; 394 regulator-ramp-delay = <1000>; 395 regulator-always-on; 396 regulator-boot-on; 397 vin-supply = <&vcc5v0_sys>; 398 399 regulator-state-mem { 400 regulator-off-in-suspend; 401 }; 402 }; 403 404 vdd_gpu: regulator@41 { 405 compatible = "silergy,syr828"; 406 reg = <0x41>; 407 fcs,suspend-voltage-selector = <1>; 408 pinctrl-names = "default"; 409 pinctrl-0 = <&vsel2_pin>; 410 regulator-name = "vdd_gpu"; 411 regulator-min-microvolt = <712500>; 412 regulator-max-microvolt = <1500000>; 413 regulator-ramp-delay = <1000>; 414 regulator-always-on; 415 regulator-boot-on; 416 vin-supply = <&vcc5v0_sys>; 417 418 regulator-state-mem { 419 regulator-off-in-suspend; 420 }; 421 }; 422}; 423 424&i2c1 { 425 i2c-scl-rising-time-ns = <300>; 426 i2c-scl-falling-time-ns = <15>; 427 status = "okay"; 428}; 429 430&i2c3 { 431 i2c-scl-rising-time-ns = <450>; 432 i2c-scl-falling-time-ns = <15>; 433 status = "okay"; 434}; 435 436&i2c4 { 437 i2c-scl-rising-time-ns = <600>; 438 i2c-scl-falling-time-ns = <20>; 439 status = "okay"; 440}; 441 442&i2s0 { 443 rockchip,playback-channels = <8>; 444 rockchip,capture-channels = <8>; 445 status = "okay"; 446}; 447 448&i2s1 { 449 rockchip,playback-channels = <2>; 450 rockchip,capture-channels = <2>; 451}; 452 453&i2s2 { 454 status = "okay"; 455}; 456 457&io_domains { 458 status = "okay"; 459 460 bt656-supply = <&vcc_3v0>; 461 audio-supply = <&vcc1v8_codec>; 462 sdmmc-supply = <&vcc_sdio>; 463 gpio1830-supply = <&vcc_3v0>; 464}; 465 466&pmu_io_domains { 467 status = "okay"; 468 469 pmu1830-supply = <&vcc_3v0>; 470}; 471 472&pcie_phy { 473 status = "okay"; 474}; 475 476&pcie0 { 477 ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; 478 max-link-speed = <2>; 479 num-lanes = <4>; 480 pinctrl-0 = <&pcie_clkreqnb_cpm>; 481 pinctrl-names = "default"; 482 vpcie0v9-supply = <&vcc_0v9>; 483 vpcie1v8-supply = <&vcc_1v8>; 484 vpcie3v3-supply = <&vcc3v3_pcie>; 485 status = "okay"; 486}; 487 488&pinctrl { 489 bt { 490 bt_enable_h: bt-enable-h { 491 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 492 }; 493 494 bt_host_wake_l: bt-host-wake-l { 495 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 496 }; 497 498 bt_wake_l: bt-wake-l { 499 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 500 }; 501 }; 502 503 pcie { 504 pcie_pwr_en: pcie-pwr-en { 505 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 506 }; 507 }; 508 509 sdio0 { 510 sdio0_bus4: sdio0-bus4 { 511 rockchip,pins = <2 RK_PC4 1 &pcfg_pull_up_20ma>, 512 <2 RK_PC5 1 &pcfg_pull_up_20ma>, 513 <2 RK_PC6 1 &pcfg_pull_up_20ma>, 514 <2 RK_PC7 1 &pcfg_pull_up_20ma>; 515 }; 516 517 sdio0_cmd: sdio0-cmd { 518 rockchip,pins = <2 RK_PD0 1 &pcfg_pull_up_20ma>; 519 }; 520 521 sdio0_clk: sdio0-clk { 522 rockchip,pins = <2 RK_PD1 1 &pcfg_pull_none_20ma>; 523 }; 524 }; 525 526 pmic { 527 pmic_int_l: pmic-int-l { 528 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 529 }; 530 531 vsel1_pin: vsel1-pin { 532 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 533 }; 534 535 vsel2_pin: vsel2-pin { 536 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 537 }; 538 }; 539 540 usb-typec { 541 vcc5v0_typec_en: vcc5v0-typec-en { 542 rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 543 }; 544 }; 545 546 usb2 { 547 vcc5v0_host_en: vcc5v0-host-en { 548 rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 549 }; 550 }; 551 552 wifi { 553 wifi_enable_h: wifi-enable-h { 554 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 555 }; 556 557 wifi_host_wake_l: wifi-host-wake-l { 558 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 559 }; 560 }; 561}; 562 563&pwm2 { 564 status = "okay"; 565}; 566 567&saradc { 568 status = "okay"; 569 570 vref-supply = <&vcc_1v8>; 571}; 572 573&sdio0 { 574 #address-cells = <1>; 575 #size-cells = <0>; 576 bus-width = <4>; 577 clock-frequency = <50000000>; 578 cap-sdio-irq; 579 cap-sd-highspeed; 580 keep-power-in-suspend; 581 mmc-pwrseq = <&sdio_pwrseq>; 582 non-removable; 583 pinctrl-names = "default"; 584 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 585 sd-uhs-sdr104; 586}; 587 588&sdmmc { 589 bus-width = <4>; 590 cap-mmc-highspeed; 591 cap-sd-highspeed; 592 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; 593 disable-wp; 594 max-frequency = <150000000>; 595 pinctrl-names = "default"; 596 pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>; 597 status = "okay"; 598}; 599 600&sdhci { 601 bus-width = <8>; 602 mmc-hs400-1_8v; 603 mmc-hs400-enhanced-strobe; 604 non-removable; 605 status = "okay"; 606}; 607 608&tcphy0 { 609 status = "okay"; 610}; 611 612&tcphy1 { 613 status = "okay"; 614}; 615 616&tsadc { 617 status = "okay"; 618 619 /* tshut mode 0:CRU 1:GPIO */ 620 rockchip,hw-tshut-mode = <1>; 621 /* tshut polarity 0:LOW 1:HIGH */ 622 rockchip,hw-tshut-polarity = <1>; 623}; 624 625&u2phy0 { 626 status = "okay"; 627 628 u2phy0_otg: otg-port { 629 status = "okay"; 630 }; 631 632 u2phy0_host: host-port { 633 phy-supply = <&vcc5v0_host>; 634 status = "okay"; 635 }; 636}; 637 638&u2phy1 { 639 status = "okay"; 640 641 u2phy1_otg: otg-port { 642 status = "okay"; 643 }; 644 645 u2phy1_host: host-port { 646 phy-supply = <&vcc5v0_host>; 647 status = "okay"; 648 }; 649}; 650 651&uart0 { 652 pinctrl-names = "default"; 653 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; 654}; 655 656&uart2 { 657 status = "okay"; 658}; 659 660&usb_host0_ehci { 661 status = "okay"; 662}; 663 664&usb_host0_ohci { 665 status = "okay"; 666}; 667 668&usb_host1_ehci { 669 status = "okay"; 670}; 671 672&usb_host1_ohci { 673 status = "okay"; 674}; 675 676&usbdrd3_0 { 677 status = "okay"; 678}; 679 680&usbdrd_dwc3_0 { 681 status = "okay"; 682 dr_mode = "otg"; 683}; 684 685&usbdrd3_1 { 686 status = "okay"; 687}; 688 689&usbdrd_dwc3_1 { 690 status = "okay"; 691 dr_mode = "host"; 692}; 693 694&vopb { 695 status = "okay"; 696}; 697 698&vopb_mmu { 699 status = "okay"; 700}; 701 702&vopl { 703 status = "okay"; 704}; 705 706&vopl_mmu { 707 status = "okay"; 708}; 709