1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * OMAP hardware spinlock driver
4 *
5 * Copyright (C) 2010-2015 Texas Instruments Incorporated - http://www.ti.com
6 *
7 * Contact: Simon Que <sque@ti.com>
8 * Hari Kanigeri <h-kanigeri2@ti.com>
9 * Ohad Ben-Cohen <ohad@wizery.com>
10 */
11
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/device.h>
15 #include <linux/delay.h>
16 #include <linux/io.h>
17 #include <linux/bitops.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/slab.h>
20 #include <linux/spinlock.h>
21 #include <linux/hwspinlock.h>
22 #include <linux/of.h>
23 #include <linux/platform_device.h>
24
25 #include "hwspinlock_internal.h"
26
27 /* Spinlock register offsets */
28 #define SYSSTATUS_OFFSET 0x0014
29 #define LOCK_BASE_OFFSET 0x0800
30
31 #define SPINLOCK_NUMLOCKS_BIT_OFFSET (24)
32
33 /* Possible values of SPINLOCK_LOCK_REG */
34 #define SPINLOCK_NOTTAKEN (0) /* free */
35 #define SPINLOCK_TAKEN (1) /* locked */
36
omap_hwspinlock_trylock(struct hwspinlock * lock)37 static int omap_hwspinlock_trylock(struct hwspinlock *lock)
38 {
39 void __iomem *lock_addr = lock->priv;
40
41 /* attempt to acquire the lock by reading its value */
42 return (SPINLOCK_NOTTAKEN == readl(lock_addr));
43 }
44
omap_hwspinlock_unlock(struct hwspinlock * lock)45 static void omap_hwspinlock_unlock(struct hwspinlock *lock)
46 {
47 void __iomem *lock_addr = lock->priv;
48
49 /* release the lock by writing 0 to it */
50 writel(SPINLOCK_NOTTAKEN, lock_addr);
51 }
52
53 /*
54 * relax the OMAP interconnect while spinning on it.
55 *
56 * The specs recommended that the retry delay time will be
57 * just over half of the time that a requester would be
58 * expected to hold the lock.
59 *
60 * The number below is taken from an hardware specs example,
61 * obviously it is somewhat arbitrary.
62 */
omap_hwspinlock_relax(struct hwspinlock * lock)63 static void omap_hwspinlock_relax(struct hwspinlock *lock)
64 {
65 ndelay(50);
66 }
67
68 static const struct hwspinlock_ops omap_hwspinlock_ops = {
69 .trylock = omap_hwspinlock_trylock,
70 .unlock = omap_hwspinlock_unlock,
71 .relax = omap_hwspinlock_relax,
72 };
73
omap_hwspinlock_probe(struct platform_device * pdev)74 static int omap_hwspinlock_probe(struct platform_device *pdev)
75 {
76 struct device_node *node = pdev->dev.of_node;
77 struct hwspinlock_device *bank;
78 struct hwspinlock *hwlock;
79 void __iomem *io_base;
80 int num_locks, i, ret;
81 /* Only a single hwspinlock block device is supported */
82 int base_id = 0;
83
84 if (!node)
85 return -ENODEV;
86
87 io_base = devm_platform_ioremap_resource(pdev, 0);
88 if (IS_ERR(io_base))
89 return PTR_ERR(io_base);
90
91 /*
92 * make sure the module is enabled and clocked before reading
93 * the module SYSSTATUS register
94 */
95 pm_runtime_enable(&pdev->dev);
96 ret = pm_runtime_get_sync(&pdev->dev);
97 if (ret < 0) {
98 pm_runtime_put_noidle(&pdev->dev);
99 goto runtime_err;
100 }
101
102 /* Determine number of locks */
103 i = readl(io_base + SYSSTATUS_OFFSET);
104 i >>= SPINLOCK_NUMLOCKS_BIT_OFFSET;
105
106 /*
107 * runtime PM will make sure the clock of this module is
108 * enabled again iff at least one lock is requested
109 */
110 ret = pm_runtime_put(&pdev->dev);
111 if (ret < 0)
112 goto runtime_err;
113
114 /* one of the four lsb's must be set, and nothing else */
115 if (hweight_long(i & 0xf) != 1 || i > 8) {
116 ret = -EINVAL;
117 goto runtime_err;
118 }
119
120 num_locks = i * 32; /* actual number of locks in this device */
121
122 bank = devm_kzalloc(&pdev->dev, struct_size(bank, lock, num_locks),
123 GFP_KERNEL);
124 if (!bank) {
125 ret = -ENOMEM;
126 goto runtime_err;
127 }
128
129 platform_set_drvdata(pdev, bank);
130
131 for (i = 0, hwlock = &bank->lock[0]; i < num_locks; i++, hwlock++)
132 hwlock->priv = io_base + LOCK_BASE_OFFSET + sizeof(u32) * i;
133
134 ret = hwspin_lock_register(bank, &pdev->dev, &omap_hwspinlock_ops,
135 base_id, num_locks);
136 if (ret)
137 goto runtime_err;
138
139 dev_dbg(&pdev->dev, "Registered %d locks with HwSpinlock core\n",
140 num_locks);
141
142 return 0;
143
144 runtime_err:
145 pm_runtime_disable(&pdev->dev);
146 return ret;
147 }
148
omap_hwspinlock_remove(struct platform_device * pdev)149 static int omap_hwspinlock_remove(struct platform_device *pdev)
150 {
151 struct hwspinlock_device *bank = platform_get_drvdata(pdev);
152 int ret;
153
154 ret = hwspin_lock_unregister(bank);
155 if (ret) {
156 dev_err(&pdev->dev, "%s failed: %d\n", __func__, ret);
157 return ret;
158 }
159
160 pm_runtime_disable(&pdev->dev);
161
162 return 0;
163 }
164
165 static const struct of_device_id omap_hwspinlock_of_match[] = {
166 { .compatible = "ti,omap4-hwspinlock", },
167 { .compatible = "ti,am654-hwspinlock", },
168 { /* end */ },
169 };
170 MODULE_DEVICE_TABLE(of, omap_hwspinlock_of_match);
171
172 static struct platform_driver omap_hwspinlock_driver = {
173 .probe = omap_hwspinlock_probe,
174 .remove = omap_hwspinlock_remove,
175 .driver = {
176 .name = "omap_hwspinlock",
177 .of_match_table = of_match_ptr(omap_hwspinlock_of_match),
178 },
179 };
180
omap_hwspinlock_init(void)181 static int __init omap_hwspinlock_init(void)
182 {
183 return platform_driver_register(&omap_hwspinlock_driver);
184 }
185 /* board init code might need to reserve hwspinlocks for predefined purposes */
186 postcore_initcall(omap_hwspinlock_init);
187
omap_hwspinlock_exit(void)188 static void __exit omap_hwspinlock_exit(void)
189 {
190 platform_driver_unregister(&omap_hwspinlock_driver);
191 }
192 module_exit(omap_hwspinlock_exit);
193
194 MODULE_LICENSE("GPL v2");
195 MODULE_DESCRIPTION("Hardware spinlock driver for OMAP");
196 MODULE_AUTHOR("Simon Que <sque@ti.com>");
197 MODULE_AUTHOR("Hari Kanigeri <h-kanigeri2@ti.com>");
198 MODULE_AUTHOR("Ohad Ben-Cohen <ohad@wizery.com>");
199