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1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * 8250_lpss.c - Driver for UART on Intel Braswell and various other Intel SoCs
4  *
5  * Copyright (C) 2016 Intel Corporation
6  * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
7  */
8 
9 #include <linux/bitops.h>
10 #include <linux/module.h>
11 #include <linux/pci.h>
12 #include <linux/rational.h>
13 
14 #include <linux/dmaengine.h>
15 #include <linux/dma/dw.h>
16 
17 #include "8250_dwlib.h"
18 
19 #define PCI_DEVICE_ID_INTEL_QRK_UARTx	0x0936
20 
21 #define PCI_DEVICE_ID_INTEL_BYT_UART1	0x0f0a
22 #define PCI_DEVICE_ID_INTEL_BYT_UART2	0x0f0c
23 
24 #define PCI_DEVICE_ID_INTEL_BSW_UART1	0x228a
25 #define PCI_DEVICE_ID_INTEL_BSW_UART2	0x228c
26 
27 #define PCI_DEVICE_ID_INTEL_EHL_UART0	0x4b96
28 #define PCI_DEVICE_ID_INTEL_EHL_UART1	0x4b97
29 #define PCI_DEVICE_ID_INTEL_EHL_UART2	0x4b98
30 #define PCI_DEVICE_ID_INTEL_EHL_UART3	0x4b99
31 #define PCI_DEVICE_ID_INTEL_EHL_UART4	0x4b9a
32 #define PCI_DEVICE_ID_INTEL_EHL_UART5	0x4b9b
33 
34 #define PCI_DEVICE_ID_INTEL_BDW_UART1	0x9ce3
35 #define PCI_DEVICE_ID_INTEL_BDW_UART2	0x9ce4
36 
37 /* Intel LPSS specific registers */
38 
39 #define BYT_PRV_CLK			0x800
40 #define BYT_PRV_CLK_EN			BIT(0)
41 #define BYT_PRV_CLK_M_VAL_SHIFT		1
42 #define BYT_PRV_CLK_N_VAL_SHIFT		16
43 #define BYT_PRV_CLK_UPDATE		BIT(31)
44 
45 #define BYT_TX_OVF_INT			0x820
46 #define BYT_TX_OVF_INT_MASK		BIT(1)
47 
48 struct lpss8250;
49 
50 struct lpss8250_board {
51 	unsigned long freq;
52 	unsigned int base_baud;
53 	int (*setup)(struct lpss8250 *, struct uart_port *p);
54 	void (*exit)(struct lpss8250 *);
55 };
56 
57 struct lpss8250 {
58 	struct dw8250_port_data data;
59 	struct lpss8250_board *board;
60 
61 	/* DMA parameters */
62 	struct dw_dma_chip dma_chip;
63 	struct dw_dma_slave dma_param;
64 	u8 dma_maxburst;
65 };
66 
to_lpss8250(struct dw8250_port_data * data)67 static inline struct lpss8250 *to_lpss8250(struct dw8250_port_data *data)
68 {
69 	return container_of(data, struct lpss8250, data);
70 }
71 
byt_set_termios(struct uart_port * p,struct ktermios * termios,struct ktermios * old)72 static void byt_set_termios(struct uart_port *p, struct ktermios *termios,
73 			    struct ktermios *old)
74 {
75 	unsigned int baud = tty_termios_baud_rate(termios);
76 	struct lpss8250 *lpss = to_lpss8250(p->private_data);
77 	unsigned long fref = lpss->board->freq, fuart = baud * 16;
78 	unsigned long w = BIT(15) - 1;
79 	unsigned long m, n;
80 	u32 reg;
81 
82 	/* Gracefully handle the B0 case: fall back to B9600 */
83 	fuart = fuart ? fuart : 9600 * 16;
84 
85 	/* Get Fuart closer to Fref */
86 	fuart *= rounddown_pow_of_two(fref / fuart);
87 
88 	/*
89 	 * For baud rates 0.5M, 1M, 1.5M, 2M, 2.5M, 3M, 3.5M and 4M the
90 	 * dividers must be adjusted.
91 	 *
92 	 * uartclk = (m / n) * 100 MHz, where m <= n
93 	 */
94 	rational_best_approximation(fuart, fref, w, w, &m, &n);
95 	p->uartclk = fuart;
96 
97 	/* Reset the clock */
98 	reg = (m << BYT_PRV_CLK_M_VAL_SHIFT) | (n << BYT_PRV_CLK_N_VAL_SHIFT);
99 	writel(reg, p->membase + BYT_PRV_CLK);
100 	reg |= BYT_PRV_CLK_EN | BYT_PRV_CLK_UPDATE;
101 	writel(reg, p->membase + BYT_PRV_CLK);
102 
103 	p->status &= ~UPSTAT_AUTOCTS;
104 	if (termios->c_cflag & CRTSCTS)
105 		p->status |= UPSTAT_AUTOCTS;
106 
107 	serial8250_do_set_termios(p, termios, old);
108 }
109 
byt_get_mctrl(struct uart_port * port)110 static unsigned int byt_get_mctrl(struct uart_port *port)
111 {
112 	unsigned int ret = serial8250_do_get_mctrl(port);
113 
114 	/* Force DCD and DSR signals to permanently be reported as active */
115 	ret |= TIOCM_CAR | TIOCM_DSR;
116 
117 	return ret;
118 }
119 
byt_serial_setup(struct lpss8250 * lpss,struct uart_port * port)120 static int byt_serial_setup(struct lpss8250 *lpss, struct uart_port *port)
121 {
122 	struct dw_dma_slave *param = &lpss->dma_param;
123 	struct pci_dev *pdev = to_pci_dev(port->dev);
124 	struct pci_dev *dma_dev;
125 
126 	switch (pdev->device) {
127 	case PCI_DEVICE_ID_INTEL_BYT_UART1:
128 	case PCI_DEVICE_ID_INTEL_BSW_UART1:
129 	case PCI_DEVICE_ID_INTEL_BDW_UART1:
130 		param->src_id = 3;
131 		param->dst_id = 2;
132 		break;
133 	case PCI_DEVICE_ID_INTEL_BYT_UART2:
134 	case PCI_DEVICE_ID_INTEL_BSW_UART2:
135 	case PCI_DEVICE_ID_INTEL_BDW_UART2:
136 		param->src_id = 5;
137 		param->dst_id = 4;
138 		break;
139 	default:
140 		return -EINVAL;
141 	}
142 
143 	dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(PCI_SLOT(pdev->devfn), 0));
144 
145 	param->dma_dev = &dma_dev->dev;
146 	param->m_master = 0;
147 	param->p_master = 1;
148 
149 	lpss->dma_maxburst = 16;
150 
151 	port->set_termios = byt_set_termios;
152 	port->get_mctrl = byt_get_mctrl;
153 
154 	/* Disable TX counter interrupts */
155 	writel(BYT_TX_OVF_INT_MASK, port->membase + BYT_TX_OVF_INT);
156 
157 	return 0;
158 }
159 
byt_serial_exit(struct lpss8250 * lpss)160 static void byt_serial_exit(struct lpss8250 *lpss)
161 {
162 	struct dw_dma_slave *param = &lpss->dma_param;
163 
164 	/* Paired with pci_get_slot() in the byt_serial_setup() above */
165 	put_device(param->dma_dev);
166 }
167 
ehl_serial_setup(struct lpss8250 * lpss,struct uart_port * port)168 static int ehl_serial_setup(struct lpss8250 *lpss, struct uart_port *port)
169 {
170 	return 0;
171 }
172 
ehl_serial_exit(struct lpss8250 * lpss)173 static void ehl_serial_exit(struct lpss8250 *lpss)
174 {
175 	struct uart_8250_port *up = serial8250_get_port(lpss->data.line);
176 
177 	up->dma = NULL;
178 }
179 
180 #ifdef CONFIG_SERIAL_8250_DMA
181 static const struct dw_dma_platform_data qrk_serial_dma_pdata = {
182 	.nr_channels = 2,
183 	.chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
184 	.chan_priority = CHAN_PRIORITY_ASCENDING,
185 	.block_size = 4095,
186 	.nr_masters = 1,
187 	.data_width = {4},
188 	.multi_block = {0},
189 };
190 
qrk_serial_setup_dma(struct lpss8250 * lpss,struct uart_port * port)191 static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port)
192 {
193 	struct uart_8250_dma *dma = &lpss->data.dma;
194 	struct dw_dma_chip *chip = &lpss->dma_chip;
195 	struct dw_dma_slave *param = &lpss->dma_param;
196 	struct pci_dev *pdev = to_pci_dev(port->dev);
197 	int ret;
198 
199 	chip->pdata = &qrk_serial_dma_pdata;
200 	chip->dev = &pdev->dev;
201 	chip->id = pdev->devfn;
202 	chip->irq = pci_irq_vector(pdev, 0);
203 	chip->regs = pci_ioremap_bar(pdev, 1);
204 	if (!chip->regs)
205 		return;
206 
207 	/* Falling back to PIO mode if DMA probing fails */
208 	ret = dw_dma_probe(chip);
209 	if (ret)
210 		return;
211 
212 	pci_try_set_mwi(pdev);
213 
214 	/* Special DMA address for UART */
215 	dma->rx_dma_addr = 0xfffff000;
216 	dma->tx_dma_addr = 0xfffff000;
217 
218 	param->dma_dev = &pdev->dev;
219 	param->src_id = 0;
220 	param->dst_id = 1;
221 	param->hs_polarity = true;
222 
223 	lpss->dma_maxburst = 8;
224 }
225 
qrk_serial_exit_dma(struct lpss8250 * lpss)226 static void qrk_serial_exit_dma(struct lpss8250 *lpss)
227 {
228 	struct dw_dma_chip *chip = &lpss->dma_chip;
229 	struct dw_dma_slave *param = &lpss->dma_param;
230 
231 	if (!param->dma_dev)
232 		return;
233 
234 	dw_dma_remove(chip);
235 
236 	pci_iounmap(to_pci_dev(chip->dev), chip->regs);
237 }
238 #else	/* CONFIG_SERIAL_8250_DMA */
qrk_serial_setup_dma(struct lpss8250 * lpss,struct uart_port * port)239 static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port) {}
qrk_serial_exit_dma(struct lpss8250 * lpss)240 static void qrk_serial_exit_dma(struct lpss8250 *lpss) {}
241 #endif	/* !CONFIG_SERIAL_8250_DMA */
242 
qrk_serial_setup(struct lpss8250 * lpss,struct uart_port * port)243 static int qrk_serial_setup(struct lpss8250 *lpss, struct uart_port *port)
244 {
245 	qrk_serial_setup_dma(lpss, port);
246 	return 0;
247 }
248 
qrk_serial_exit(struct lpss8250 * lpss)249 static void qrk_serial_exit(struct lpss8250 *lpss)
250 {
251 	qrk_serial_exit_dma(lpss);
252 }
253 
lpss8250_dma_filter(struct dma_chan * chan,void * param)254 static bool lpss8250_dma_filter(struct dma_chan *chan, void *param)
255 {
256 	struct dw_dma_slave *dws = param;
257 
258 	if (dws->dma_dev != chan->device->dev)
259 		return false;
260 
261 	chan->private = dws;
262 	return true;
263 }
264 
lpss8250_dma_setup(struct lpss8250 * lpss,struct uart_8250_port * port)265 static int lpss8250_dma_setup(struct lpss8250 *lpss, struct uart_8250_port *port)
266 {
267 	struct uart_8250_dma *dma = &lpss->data.dma;
268 	struct dw_dma_slave *rx_param, *tx_param;
269 	struct device *dev = port->port.dev;
270 
271 	if (!lpss->dma_param.dma_dev) {
272 		dma = port->dma;
273 		if (dma)
274 			goto out_configuration_only;
275 
276 		return 0;
277 	}
278 
279 	rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
280 	if (!rx_param)
281 		return -ENOMEM;
282 
283 	tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
284 	if (!tx_param)
285 		return -ENOMEM;
286 
287 	*rx_param = lpss->dma_param;
288 	*tx_param = lpss->dma_param;
289 
290 	dma->fn = lpss8250_dma_filter;
291 	dma->rx_param = rx_param;
292 	dma->tx_param = tx_param;
293 
294 	port->dma = dma;
295 
296 out_configuration_only:
297 	dma->rxconf.src_maxburst = lpss->dma_maxburst;
298 	dma->txconf.dst_maxburst = lpss->dma_maxburst;
299 
300 	return 0;
301 }
302 
lpss8250_probe(struct pci_dev * pdev,const struct pci_device_id * id)303 static int lpss8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
304 {
305 	struct uart_8250_port uart;
306 	struct lpss8250 *lpss;
307 	int ret;
308 
309 	ret = pcim_enable_device(pdev);
310 	if (ret)
311 		return ret;
312 
313 	pci_set_master(pdev);
314 
315 	lpss = devm_kzalloc(&pdev->dev, sizeof(*lpss), GFP_KERNEL);
316 	if (!lpss)
317 		return -ENOMEM;
318 
319 	ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
320 	if (ret < 0)
321 		return ret;
322 
323 	lpss->board = (struct lpss8250_board *)id->driver_data;
324 
325 	memset(&uart, 0, sizeof(struct uart_8250_port));
326 
327 	uart.port.dev = &pdev->dev;
328 	uart.port.irq = pci_irq_vector(pdev, 0);
329 	uart.port.private_data = &lpss->data;
330 	uart.port.type = PORT_16550A;
331 	uart.port.iotype = UPIO_MEM;
332 	uart.port.regshift = 2;
333 	uart.port.uartclk = lpss->board->base_baud * 16;
334 	uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
335 	uart.capabilities = UART_CAP_FIFO | UART_CAP_AFE;
336 	uart.port.mapbase = pci_resource_start(pdev, 0);
337 	uart.port.membase = pcim_iomap(pdev, 0, 0);
338 	if (!uart.port.membase)
339 		return -ENOMEM;
340 
341 	ret = lpss->board->setup(lpss, &uart.port);
342 	if (ret)
343 		return ret;
344 
345 	dw8250_setup_port(&uart.port);
346 
347 	ret = lpss8250_dma_setup(lpss, &uart);
348 	if (ret)
349 		goto err_exit;
350 
351 	ret = serial8250_register_8250_port(&uart);
352 	if (ret < 0)
353 		goto err_exit;
354 
355 	lpss->data.line = ret;
356 
357 	pci_set_drvdata(pdev, lpss);
358 	return 0;
359 
360 err_exit:
361 	lpss->board->exit(lpss);
362 	pci_free_irq_vectors(pdev);
363 	return ret;
364 }
365 
lpss8250_remove(struct pci_dev * pdev)366 static void lpss8250_remove(struct pci_dev *pdev)
367 {
368 	struct lpss8250 *lpss = pci_get_drvdata(pdev);
369 
370 	serial8250_unregister_port(lpss->data.line);
371 
372 	lpss->board->exit(lpss);
373 	pci_free_irq_vectors(pdev);
374 }
375 
376 static const struct lpss8250_board byt_board = {
377 	.freq = 100000000,
378 	.base_baud = 2764800,
379 	.setup = byt_serial_setup,
380 	.exit = byt_serial_exit,
381 };
382 
383 static const struct lpss8250_board ehl_board = {
384 	.freq = 200000000,
385 	.base_baud = 12500000,
386 	.setup = ehl_serial_setup,
387 	.exit = ehl_serial_exit,
388 };
389 
390 static const struct lpss8250_board qrk_board = {
391 	.freq = 44236800,
392 	.base_baud = 2764800,
393 	.setup = qrk_serial_setup,
394 	.exit = qrk_serial_exit,
395 };
396 
397 static const struct pci_device_id pci_ids[] = {
398 	{ PCI_DEVICE_DATA(INTEL, QRK_UARTx, &qrk_board) },
399 	{ PCI_DEVICE_DATA(INTEL, EHL_UART0, &ehl_board) },
400 	{ PCI_DEVICE_DATA(INTEL, EHL_UART1, &ehl_board) },
401 	{ PCI_DEVICE_DATA(INTEL, EHL_UART2, &ehl_board) },
402 	{ PCI_DEVICE_DATA(INTEL, EHL_UART3, &ehl_board) },
403 	{ PCI_DEVICE_DATA(INTEL, EHL_UART4, &ehl_board) },
404 	{ PCI_DEVICE_DATA(INTEL, EHL_UART5, &ehl_board) },
405 	{ PCI_DEVICE_DATA(INTEL, BYT_UART1, &byt_board) },
406 	{ PCI_DEVICE_DATA(INTEL, BYT_UART2, &byt_board) },
407 	{ PCI_DEVICE_DATA(INTEL, BSW_UART1, &byt_board) },
408 	{ PCI_DEVICE_DATA(INTEL, BSW_UART2, &byt_board) },
409 	{ PCI_DEVICE_DATA(INTEL, BDW_UART1, &byt_board) },
410 	{ PCI_DEVICE_DATA(INTEL, BDW_UART2, &byt_board) },
411 	{ }
412 };
413 MODULE_DEVICE_TABLE(pci, pci_ids);
414 
415 static struct pci_driver lpss8250_pci_driver = {
416 	.name           = "8250_lpss",
417 	.id_table       = pci_ids,
418 	.probe          = lpss8250_probe,
419 	.remove         = lpss8250_remove,
420 };
421 
422 module_pci_driver(lpss8250_pci_driver);
423 
424 MODULE_AUTHOR("Intel Corporation");
425 MODULE_LICENSE("GPL v2");
426 MODULE_DESCRIPTION("Intel LPSS UART driver");
427