1 // SPDX-License-Identifier: GPL-2.0-only
2 /* sound/soc/rockchip/rk_spdif.c
3 *
4 * ALSA SoC Audio Layer - Rockchip I2S Controller driver
5 *
6 * Copyright (c) 2014 Rockchip Electronics Co. Ltd.
7 * Author: Jianqun <jay.xu@rock-chips.com>
8 * Copyright (c) 2015 Collabora Ltd.
9 * Author: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
10 */
11
12 #include <linux/module.h>
13 #include <linux/delay.h>
14 #include <linux/of_gpio.h>
15 #include <linux/clk.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/mfd/syscon.h>
18 #include <linux/regmap.h>
19 #include <sound/pcm_params.h>
20 #include <sound/dmaengine_pcm.h>
21
22 #include "rockchip_spdif.h"
23
24 enum rk_spdif_type {
25 RK_SPDIF_RK3066,
26 RK_SPDIF_RK3188,
27 RK_SPDIF_RK3288,
28 RK_SPDIF_RK3366,
29 };
30
31 #define RK3288_GRF_SOC_CON2 0x24c
32
33 struct rk_spdif_dev {
34 struct device *dev;
35
36 struct clk *mclk;
37 struct clk *hclk;
38
39 struct snd_dmaengine_dai_dma_data playback_dma_data;
40
41 struct regmap *regmap;
42 };
43
44 static const struct of_device_id rk_spdif_match[] = {
45 { .compatible = "rockchip,rk3066-spdif",
46 .data = (void *)RK_SPDIF_RK3066 },
47 { .compatible = "rockchip,rk3188-spdif",
48 .data = (void *)RK_SPDIF_RK3188 },
49 { .compatible = "rockchip,rk3228-spdif",
50 .data = (void *)RK_SPDIF_RK3366 },
51 { .compatible = "rockchip,rk3288-spdif",
52 .data = (void *)RK_SPDIF_RK3288 },
53 { .compatible = "rockchip,rk3328-spdif",
54 .data = (void *)RK_SPDIF_RK3366 },
55 { .compatible = "rockchip,rk3366-spdif",
56 .data = (void *)RK_SPDIF_RK3366 },
57 { .compatible = "rockchip,rk3368-spdif",
58 .data = (void *)RK_SPDIF_RK3366 },
59 { .compatible = "rockchip,rk3399-spdif",
60 .data = (void *)RK_SPDIF_RK3366 },
61 {},
62 };
63 MODULE_DEVICE_TABLE(of, rk_spdif_match);
64
rk_spdif_runtime_suspend(struct device * dev)65 static int __maybe_unused rk_spdif_runtime_suspend(struct device *dev)
66 {
67 struct rk_spdif_dev *spdif = dev_get_drvdata(dev);
68
69 regcache_cache_only(spdif->regmap, true);
70 clk_disable_unprepare(spdif->mclk);
71 clk_disable_unprepare(spdif->hclk);
72
73 return 0;
74 }
75
rk_spdif_runtime_resume(struct device * dev)76 static int __maybe_unused rk_spdif_runtime_resume(struct device *dev)
77 {
78 struct rk_spdif_dev *spdif = dev_get_drvdata(dev);
79 int ret;
80
81 ret = clk_prepare_enable(spdif->mclk);
82 if (ret) {
83 dev_err(spdif->dev, "mclk clock enable failed %d\n", ret);
84 return ret;
85 }
86
87 ret = clk_prepare_enable(spdif->hclk);
88 if (ret) {
89 clk_disable_unprepare(spdif->mclk);
90 dev_err(spdif->dev, "hclk clock enable failed %d\n", ret);
91 return ret;
92 }
93
94 regcache_cache_only(spdif->regmap, false);
95 regcache_mark_dirty(spdif->regmap);
96
97 ret = regcache_sync(spdif->regmap);
98 if (ret) {
99 clk_disable_unprepare(spdif->mclk);
100 clk_disable_unprepare(spdif->hclk);
101 }
102
103 return ret;
104 }
105
rk_spdif_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)106 static int rk_spdif_hw_params(struct snd_pcm_substream *substream,
107 struct snd_pcm_hw_params *params,
108 struct snd_soc_dai *dai)
109 {
110 struct rk_spdif_dev *spdif = snd_soc_dai_get_drvdata(dai);
111 unsigned int val = SPDIF_CFGR_HALFWORD_ENABLE;
112 int srate, mclk;
113 int ret;
114
115 srate = params_rate(params);
116 mclk = srate * 128;
117
118 switch (params_format(params)) {
119 case SNDRV_PCM_FORMAT_S16_LE:
120 val |= SPDIF_CFGR_VDW_16;
121 break;
122 case SNDRV_PCM_FORMAT_S20_3LE:
123 val |= SPDIF_CFGR_VDW_20;
124 break;
125 case SNDRV_PCM_FORMAT_S24_LE:
126 val |= SPDIF_CFGR_VDW_24;
127 break;
128 default:
129 return -EINVAL;
130 }
131
132 /* Set clock and calculate divider */
133 ret = clk_set_rate(spdif->mclk, mclk);
134 if (ret != 0) {
135 dev_err(spdif->dev, "Failed to set module clock rate: %d\n",
136 ret);
137 return ret;
138 }
139
140 ret = regmap_update_bits(spdif->regmap, SPDIF_CFGR,
141 SPDIF_CFGR_CLK_DIV_MASK | SPDIF_CFGR_HALFWORD_ENABLE |
142 SDPIF_CFGR_VDW_MASK,
143 val);
144
145 return ret;
146 }
147
rk_spdif_trigger(struct snd_pcm_substream * substream,int cmd,struct snd_soc_dai * dai)148 static int rk_spdif_trigger(struct snd_pcm_substream *substream,
149 int cmd, struct snd_soc_dai *dai)
150 {
151 struct rk_spdif_dev *spdif = snd_soc_dai_get_drvdata(dai);
152 int ret;
153
154 switch (cmd) {
155 case SNDRV_PCM_TRIGGER_START:
156 case SNDRV_PCM_TRIGGER_RESUME:
157 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
158 ret = regmap_update_bits(spdif->regmap, SPDIF_DMACR,
159 SPDIF_DMACR_TDE_ENABLE |
160 SPDIF_DMACR_TDL_MASK,
161 SPDIF_DMACR_TDE_ENABLE |
162 SPDIF_DMACR_TDL(16));
163
164 if (ret != 0)
165 return ret;
166
167 ret = regmap_update_bits(spdif->regmap, SPDIF_XFER,
168 SPDIF_XFER_TXS_START,
169 SPDIF_XFER_TXS_START);
170 break;
171 case SNDRV_PCM_TRIGGER_SUSPEND:
172 case SNDRV_PCM_TRIGGER_STOP:
173 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
174 ret = regmap_update_bits(spdif->regmap, SPDIF_DMACR,
175 SPDIF_DMACR_TDE_ENABLE,
176 SPDIF_DMACR_TDE_DISABLE);
177
178 if (ret != 0)
179 return ret;
180
181 ret = regmap_update_bits(spdif->regmap, SPDIF_XFER,
182 SPDIF_XFER_TXS_START,
183 SPDIF_XFER_TXS_STOP);
184 break;
185 default:
186 ret = -EINVAL;
187 break;
188 }
189
190 return ret;
191 }
192
rk_spdif_dai_probe(struct snd_soc_dai * dai)193 static int rk_spdif_dai_probe(struct snd_soc_dai *dai)
194 {
195 struct rk_spdif_dev *spdif = snd_soc_dai_get_drvdata(dai);
196
197 dai->playback_dma_data = &spdif->playback_dma_data;
198
199 return 0;
200 }
201
202 static const struct snd_soc_dai_ops rk_spdif_dai_ops = {
203 .hw_params = rk_spdif_hw_params,
204 .trigger = rk_spdif_trigger,
205 };
206
207 static struct snd_soc_dai_driver rk_spdif_dai = {
208 .probe = rk_spdif_dai_probe,
209 .playback = {
210 .stream_name = "Playback",
211 .channels_min = 2,
212 .channels_max = 2,
213 .rates = (SNDRV_PCM_RATE_32000 |
214 SNDRV_PCM_RATE_44100 |
215 SNDRV_PCM_RATE_48000 |
216 SNDRV_PCM_RATE_96000 |
217 SNDRV_PCM_RATE_192000),
218 .formats = (SNDRV_PCM_FMTBIT_S16_LE |
219 SNDRV_PCM_FMTBIT_S20_3LE |
220 SNDRV_PCM_FMTBIT_S24_LE),
221 },
222 .ops = &rk_spdif_dai_ops,
223 };
224
225 static const struct snd_soc_component_driver rk_spdif_component = {
226 .name = "rockchip-spdif",
227 };
228
rk_spdif_wr_reg(struct device * dev,unsigned int reg)229 static bool rk_spdif_wr_reg(struct device *dev, unsigned int reg)
230 {
231 switch (reg) {
232 case SPDIF_CFGR:
233 case SPDIF_DMACR:
234 case SPDIF_INTCR:
235 case SPDIF_XFER:
236 case SPDIF_SMPDR:
237 return true;
238 default:
239 return false;
240 }
241 }
242
rk_spdif_rd_reg(struct device * dev,unsigned int reg)243 static bool rk_spdif_rd_reg(struct device *dev, unsigned int reg)
244 {
245 switch (reg) {
246 case SPDIF_CFGR:
247 case SPDIF_SDBLR:
248 case SPDIF_INTCR:
249 case SPDIF_INTSR:
250 case SPDIF_XFER:
251 return true;
252 default:
253 return false;
254 }
255 }
256
rk_spdif_volatile_reg(struct device * dev,unsigned int reg)257 static bool rk_spdif_volatile_reg(struct device *dev, unsigned int reg)
258 {
259 switch (reg) {
260 case SPDIF_INTSR:
261 case SPDIF_SDBLR:
262 return true;
263 default:
264 return false;
265 }
266 }
267
268 static const struct regmap_config rk_spdif_regmap_config = {
269 .reg_bits = 32,
270 .reg_stride = 4,
271 .val_bits = 32,
272 .max_register = SPDIF_SMPDR,
273 .writeable_reg = rk_spdif_wr_reg,
274 .readable_reg = rk_spdif_rd_reg,
275 .volatile_reg = rk_spdif_volatile_reg,
276 .cache_type = REGCACHE_FLAT,
277 };
278
rk_spdif_probe(struct platform_device * pdev)279 static int rk_spdif_probe(struct platform_device *pdev)
280 {
281 struct device_node *np = pdev->dev.of_node;
282 struct rk_spdif_dev *spdif;
283 const struct of_device_id *match;
284 struct resource *res;
285 void __iomem *regs;
286 int ret;
287
288 match = of_match_node(rk_spdif_match, np);
289 if (match->data == (void *)RK_SPDIF_RK3288) {
290 struct regmap *grf;
291
292 grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
293 if (IS_ERR(grf)) {
294 dev_err(&pdev->dev,
295 "rockchip_spdif missing 'rockchip,grf' \n");
296 return PTR_ERR(grf);
297 }
298
299 /* Select the 8 channel SPDIF solution on RK3288 as
300 * the 2 channel one does not appear to work
301 */
302 regmap_write(grf, RK3288_GRF_SOC_CON2, BIT(1) << 16);
303 }
304
305 spdif = devm_kzalloc(&pdev->dev, sizeof(*spdif), GFP_KERNEL);
306 if (!spdif)
307 return -ENOMEM;
308
309 spdif->hclk = devm_clk_get(&pdev->dev, "hclk");
310 if (IS_ERR(spdif->hclk))
311 return PTR_ERR(spdif->hclk);
312
313 spdif->mclk = devm_clk_get(&pdev->dev, "mclk");
314 if (IS_ERR(spdif->mclk))
315 return PTR_ERR(spdif->mclk);
316
317 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
318 regs = devm_ioremap_resource(&pdev->dev, res);
319 if (IS_ERR(regs))
320 return PTR_ERR(regs);
321
322 spdif->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "hclk", regs,
323 &rk_spdif_regmap_config);
324 if (IS_ERR(spdif->regmap))
325 return PTR_ERR(spdif->regmap);
326
327 spdif->playback_dma_data.addr = res->start + SPDIF_SMPDR;
328 spdif->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
329 spdif->playback_dma_data.maxburst = 4;
330
331 spdif->dev = &pdev->dev;
332 dev_set_drvdata(&pdev->dev, spdif);
333
334 pm_runtime_enable(&pdev->dev);
335 if (!pm_runtime_enabled(&pdev->dev)) {
336 ret = rk_spdif_runtime_resume(&pdev->dev);
337 if (ret)
338 goto err_pm_runtime;
339 }
340
341 ret = devm_snd_soc_register_component(&pdev->dev,
342 &rk_spdif_component,
343 &rk_spdif_dai, 1);
344 if (ret) {
345 dev_err(&pdev->dev, "Could not register DAI\n");
346 goto err_pm_suspend;
347 }
348
349 ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
350 if (ret) {
351 dev_err(&pdev->dev, "Could not register PCM\n");
352 goto err_pm_suspend;
353 }
354
355 return 0;
356
357 err_pm_suspend:
358 if (!pm_runtime_status_suspended(&pdev->dev))
359 rk_spdif_runtime_suspend(&pdev->dev);
360 err_pm_runtime:
361 pm_runtime_disable(&pdev->dev);
362
363 return ret;
364 }
365
rk_spdif_remove(struct platform_device * pdev)366 static int rk_spdif_remove(struct platform_device *pdev)
367 {
368 pm_runtime_disable(&pdev->dev);
369 if (!pm_runtime_status_suspended(&pdev->dev))
370 rk_spdif_runtime_suspend(&pdev->dev);
371
372 return 0;
373 }
374
375 static const struct dev_pm_ops rk_spdif_pm_ops = {
376 SET_RUNTIME_PM_OPS(rk_spdif_runtime_suspend, rk_spdif_runtime_resume,
377 NULL)
378 };
379
380 static struct platform_driver rk_spdif_driver = {
381 .probe = rk_spdif_probe,
382 .remove = rk_spdif_remove,
383 .driver = {
384 .name = "rockchip-spdif",
385 .of_match_table = of_match_ptr(rk_spdif_match),
386 .pm = &rk_spdif_pm_ops,
387 },
388 };
389 module_platform_driver(rk_spdif_driver);
390
391 MODULE_ALIAS("platform:rockchip-spdif");
392 MODULE_DESCRIPTION("ROCKCHIP SPDIF transceiver Interface");
393 MODULE_AUTHOR("Sjoerd Simons <sjoerd.simons@collabora.co.uk>");
394 MODULE_LICENSE("GPL v2");
395