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1 /*
2  * Copyright 2016 Google Inc.
3  *
4  * Use of this source code is governed by a BSD-style license that can be
5  * found in the LICENSE file.
6  */
7 
8 #include "include/core/SkStream.h"
9 #include "include/core/SkString.h"
10 #include "include/private/SkOnce.h"
11 #include "src/core/SkCpu.h"
12 
13 #if defined(SK_CPU_X86)
14     #if defined(SK_BUILD_FOR_WIN)
15         #include <intrin.h>
cpuid(uint32_t abcd[4])16         static void cpuid (uint32_t abcd[4]) { __cpuid  ((int*)abcd, 1);    }
cpuid7(uint32_t abcd[4])17         static void cpuid7(uint32_t abcd[4]) { __cpuidex((int*)abcd, 7, 0); }
xgetbv(uint32_t xcr)18         static uint64_t xgetbv(uint32_t xcr) {
19         #if defined(_MSC_VER)
20             return _xgetbv(xcr);
21         #else
22             uint32_t eax, edx;
23 
24             __asm__ volatile (
25                 "xgetbv" : "=a"(eax), "=d"(edx) : "c"(xcr));
26             return (static_cast<uint64_t>(edx) << 32) | eax;
27         #endif // defined(_MSC_VER)
28         }
29     #else
30         #include <cpuid.h>
31         #if !defined(__cpuid_count)  // Old Mac Clang doesn't have this defined.
32             #define  __cpuid_count(eax, ecx, a, b, c, d) \
33                 __asm__("cpuid" : "=a"(a), "=b"(b), "=c"(c), "=d"(d) : "0"(eax), "2"(ecx))
34         #endif
cpuid(uint32_t abcd[4])35         static void cpuid (uint32_t abcd[4]) { __get_cpuid(1, abcd+0, abcd+1, abcd+2, abcd+3); }
cpuid7(uint32_t abcd[4])36         static void cpuid7(uint32_t abcd[4]) {
37             __cpuid_count(7, 0, abcd[0], abcd[1], abcd[2], abcd[3]);
38         }
xgetbv(uint32_t xcr)39         static uint64_t xgetbv(uint32_t xcr) {
40             uint32_t eax, edx;
41             __asm__ __volatile__ ( "xgetbv" : "=a"(eax), "=d"(edx) : "c"(xcr));
42             return (uint64_t)(edx) << 32 | eax;
43         }
44     #endif
45 
read_cpu_features()46     static uint32_t read_cpu_features() {
47         uint32_t features = 0;
48         uint32_t abcd[4] = {0,0,0,0};
49 
50         // You might want to refer to http://www.sandpile.org/x86/cpuid.htm
51 
52         cpuid(abcd);
53         if (abcd[3] & (1<<25)) { features |= SkCpu:: SSE1; }
54         if (abcd[3] & (1<<26)) { features |= SkCpu:: SSE2; }
55         if (abcd[2] & (1<< 0)) { features |= SkCpu:: SSE3; }
56         if (abcd[2] & (1<< 9)) { features |= SkCpu::SSSE3; }
57         if (abcd[2] & (1<<19)) { features |= SkCpu::SSE41; }
58         if (abcd[2] & (1<<20)) { features |= SkCpu::SSE42; }
59 
60         if ((abcd[2] & (3<<26)) == (3<<26)         // XSAVE + OSXSAVE
61              && (xgetbv(0) & (3<<1)) == (3<<1)) {  // XMM and YMM state enabled.
62             if (abcd[2] & (1<<28)) { features |= SkCpu:: AVX; }
63             if (abcd[2] & (1<<29)) { features |= SkCpu::F16C; }
64             if (abcd[2] & (1<<12)) { features |= SkCpu:: FMA; }
65 
66             cpuid7(abcd);
67             if (abcd[1] & (1<<5)) { features |= SkCpu::AVX2; }
68             if (abcd[1] & (1<<3)) { features |= SkCpu::BMI1; }
69             if (abcd[1] & (1<<8)) { features |= SkCpu::BMI2; }
70 
71             if ((xgetbv(0) & (7<<5)) == (7<<5)) {  // All ZMM state bits enabled too.
72                 if (abcd[1] & (1<<16)) { features |= SkCpu::AVX512F; }
73                 if (abcd[1] & (1<<17)) { features |= SkCpu::AVX512DQ; }
74                 if (abcd[1] & (1<<21)) { features |= SkCpu::AVX512IFMA; }
75                 if (abcd[1] & (1<<26)) { features |= SkCpu::AVX512PF; }
76                 if (abcd[1] & (1<<27)) { features |= SkCpu::AVX512ER; }
77                 if (abcd[1] & (1<<28)) { features |= SkCpu::AVX512CD; }
78                 if (abcd[1] & (1<<30)) { features |= SkCpu::AVX512BW; }
79                 if (abcd[1] & (1<<31)) { features |= SkCpu::AVX512VL; }
80             }
81         }
82         return features;
83     }
84 
85 #elif defined(SK_CPU_ARM64) && __has_include(<sys/auxv.h>)
86     #include <sys/auxv.h>
87 
read_cpu_features()88     static uint32_t read_cpu_features() {
89         const uint32_t kHWCAP_CRC32   = (1<< 7),
90                        kHWCAP_ASIMDHP = (1<<10);
91 
92         uint32_t features = 0;
93         uint32_t hwcaps = getauxval(AT_HWCAP);
94         if (hwcaps & kHWCAP_CRC32  ) { features |= SkCpu::CRC32; }
95         if (hwcaps & kHWCAP_ASIMDHP) { features |= SkCpu::ASIMDHP; }
96 
97         // The Samsung Mongoose 3 core sets the ASIMDHP bit but doesn't support it.
98         for (int core = 0; features & SkCpu::ASIMDHP; core++) {
99             // These /sys files contain the core's MIDR_EL1 register, the source of
100             // CPU {implementer, variant, part, revision} you'd see in /proc/cpuinfo.
101             SkString path =
102                 SkStringPrintf("/sys/devices/system/cpu/cpu%d/regs/identification/midr_el1", core);
103 
104             // Can't use SkData::MakeFromFileName() here, I think because /sys can't be mmap()'d.
105             SkFILEStream midr_el1(path.c_str());
106             if (!midr_el1.isValid()) {
107                 // This is our ordinary exit path.
108                 // If we ask for MIDR_EL1 from a core that doesn't exist, we've checked all cores.
109                 if (core == 0) {
110                     // On the other hand, if we can't read MIDR_EL1 from any core, assume the worst.
111                     features &= ~(SkCpu::ASIMDHP);
112                 }
113                 break;
114             }
115 
116             const char kMongoose3[] = "0x00000000531f0020";  // 53 == Samsung.
117             char buf[SK_ARRAY_COUNT(kMongoose3) - 1];  // No need for the terminating \0.
118 
119             if (SK_ARRAY_COUNT(buf) != midr_el1.read(buf, SK_ARRAY_COUNT(buf))
120                           || 0 == memcmp(kMongoose3, buf, SK_ARRAY_COUNT(buf))) {
121                 features &= ~(SkCpu::ASIMDHP);
122             }
123         }
124         return features;
125     }
126 
127 #elif defined(SK_CPU_ARM32) && __has_include(<sys/auxv.h>) && \
128     (!defined(__ANDROID_API__) || __ANDROID_API__ >= 18)
129     // sys/auxv.h will always be present in the Android NDK due to unified
130     //headers, but getauxval is only defined for API >= 18.
131     #include <sys/auxv.h>
132 
read_cpu_features()133     static uint32_t read_cpu_features() {
134         const uint32_t kHWCAP_NEON  = (1<<12);
135         const uint32_t kHWCAP_VFPv4 = (1<<16);
136 
137         uint32_t features = 0;
138         uint32_t hwcaps = getauxval(AT_HWCAP);
139         if (hwcaps & kHWCAP_NEON ) {
140             features |= SkCpu::NEON;
141             if (hwcaps & kHWCAP_VFPv4) { features |= SkCpu::NEON_FMA|SkCpu::VFP_FP16; }
142         }
143         return features;
144     }
145 
146 #elif defined(SK_CPU_ARM32) && __has_include(<cpu-features.h>)
147     #include <cpu-features.h>
148 
read_cpu_features()149     static uint32_t read_cpu_features() {
150         uint32_t features = 0;
151         uint64_t cpu_features = android_getCpuFeatures();
152         if (cpu_features & ANDROID_CPU_ARM_FEATURE_NEON)     { features |= SkCpu::NEON; }
153         if (cpu_features & ANDROID_CPU_ARM_FEATURE_NEON_FMA) { features |= SkCpu::NEON_FMA; }
154         if (cpu_features & ANDROID_CPU_ARM_FEATURE_VFP_FP16) { features |= SkCpu::VFP_FP16; }
155         return features;
156     }
157 
158 #else
read_cpu_features()159     static uint32_t read_cpu_features() {
160         return 0;
161     }
162 
163 #endif
164 
165 uint32_t SkCpu::gCachedFeatures = 0;
166 
CacheRuntimeFeatures()167 void SkCpu::CacheRuntimeFeatures() {
168     static SkOnce once;
169     once([] { gCachedFeatures = read_cpu_features(); });
170 }
171