1 /* 2 * Copyright © 2020 Valve Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 */ 24 #include "helpers.h" 25 #include "test_isel-spirv.h" 26 27 #include <llvm/Config/llvm-config.h> 28 29 using namespace aco; 30 31 BEGIN_TEST(isel.interp.simple) 32 QoShaderModuleCreateInfo vs = qoShaderModuleCreateInfoGLSL(VERTEX, 33 layout(location = 0) in vec4 in_color; 34 layout(location = 0) out vec4 out_color; 35 void main() { 36 out_color = in_color; 37 } 38 ); 39 QoShaderModuleCreateInfo fs = qoShaderModuleCreateInfoGLSL(FRAGMENT, 40 layout(location = 0) in vec4 in_color; 41 layout(location = 0) out vec4 out_color; 42 void main() { 43 //>> v1: %a_tmp = v_interp_p1_f32 %bx, %pm:m0 attr0.w 44 //! v1: %a = v_interp_p2_f32 %by, %pm:m0, (kill)%a_tmp attr0.w 45 //! v1: %r_tmp = v_interp_p1_f32 %bx, %pm:m0 attr0.x 46 //! v1: %r = v_interp_p2_f32 %by, %pm:m0, (kill)%r_tmp attr0.x 47 //! v1: %g_tmp = v_interp_p1_f32 %bx, %pm:m0 attr0.y 48 //! v1: %g = v_interp_p2_f32 %by, %pm:m0, (kill)%g_tmp attr0.y 49 //! v1: %b_tmp = v_interp_p1_f32 (kill)%bx, %pm:m0 attr0.z 50 //! v1: %b = v_interp_p2_f32 (kill)%by, (kill)%pm:m0, (kill)%b_tmp attr0.z 51 //! exp (kill)%r, (kill)%g, (kill)%b, (kill)%a mrt0 52 out_color = in_color; 53 } 54 ); 55 56 PipelineBuilder pbld(get_vk_device(GFX9)); 57 pbld.add_vsfs(vs, fs); 58 pbld.print_ir(VK_SHADER_STAGE_FRAGMENT_BIT, "ACO IR"); 59 END_TEST 60 61 BEGIN_TEST(isel.compute.simple) 62 for (unsigned i = GFX7; i <= GFX8; i++) { 63 if (!set_variant((amd_gfx_level)i)) 64 continue; 65 66 QoShaderModuleCreateInfo cs = qoShaderModuleCreateInfoGLSL(COMPUTE, 67 layout(local_size_x=1) in; 68 layout(binding=0) buffer Buf { 69 uint res; 70 }; 71 void main() { 72 //>> v1: %data = p_parallelcopy 42 73 //buffer_store_dword %_, v1: undef, 0, %data disable_wqm storage:buffer semantics: scope:invocation 74 res = 42; 75 } 76 ); 77 78 PipelineBuilder pbld(get_vk_device((amd_gfx_level)i)); 79 pbld.add_cs(cs); 80 pbld.print_ir(VK_SHADER_STAGE_COMPUTE_BIT, "ACO IR", true); 81 } 82 END_TEST 83 84 BEGIN_TEST(isel.gs.no_outputs) 85 for (unsigned i = GFX8; i <= GFX10; i++) { 86 if (!set_variant((amd_gfx_level)i)) 87 continue; 88 89 QoShaderModuleCreateInfo vs = qoShaderModuleCreateInfoGLSL(VERTEX, 90 void main() {} 91 ); 92 93 QoShaderModuleCreateInfo gs = qoShaderModuleCreateInfoGLSL(GEOMETRY, 94 layout(points) in; 95 layout(points, max_vertices = 1) out; 96 97 void main() { 98 EmitVertex(); 99 EndPrimitive(); 100 } 101 ); 102 103 PipelineBuilder pbld(get_vk_device((amd_gfx_level)i)); 104 pbld.add_stage(VK_SHADER_STAGE_VERTEX_BIT, vs); 105 pbld.add_stage(VK_SHADER_STAGE_GEOMETRY_BIT, gs); 106 pbld.create_pipeline(); 107 108 //! success 109 fprintf(output, "success\n"); 110 } 111 END_TEST 112 113 BEGIN_TEST(isel.gs.no_verts) 114 for (unsigned i = GFX8; i <= GFX10; i++) { 115 if (!set_variant((amd_gfx_level)i)) 116 continue; 117 118 QoShaderModuleCreateInfo vs = qoShaderModuleCreateInfoGLSL(VERTEX, 119 void main() {} 120 ); 121 122 QoShaderModuleCreateInfo gs = qoShaderModuleCreateInfoGLSL(GEOMETRY, 123 layout(points) in; 124 layout(points, max_vertices = 0) out; 125 126 void main() {} 127 ); 128 129 PipelineBuilder pbld(get_vk_device((amd_gfx_level)i)); 130 pbld.add_stage(VK_SHADER_STAGE_VERTEX_BIT, vs); 131 pbld.add_stage(VK_SHADER_STAGE_GEOMETRY_BIT, gs); 132 pbld.create_pipeline(); 133 134 //! success 135 fprintf(output, "success\n"); 136 } 137 END_TEST 138 139 BEGIN_TEST(isel.sparse.clause) 140 for (unsigned i = GFX10_3; i <= GFX10_3; i++) { 141 if (!set_variant((amd_gfx_level)i)) 142 continue; 143 144 QoShaderModuleCreateInfo cs = qoShaderModuleCreateInfoGLSL(COMPUTE, 145 QO_EXTENSION GL_ARB_sparse_texture2 : require 146 layout(local_size_x=1) in; 147 layout(binding=0) uniform sampler2D tex; 148 layout(binding=1) buffer Buf { 149 vec4 res[4]; 150 uint code[4]; 151 }; 152 void main() { 153 //! llvm_version: #llvm_ver 154 //; if llvm_ver >= 12: 155 //; funcs['sample_res'] = lambda _: 'v[#_:#_]' 156 //; funcs['sample_coords'] = lambda _: '[v#_, v#_, v#_]' 157 //; else: 158 //; funcs['sample_res'] = lambda _: 'v#_' 159 //; funcs['sample_coords'] = lambda _: '[v#_, v#_, v#_, v#_]' 160 //>> v5: (noCSE)%zero0 = p_create_vector 0, 0, 0, 0, 0 161 //>> v5: %_ = image_sample_lz_o %_, %_, (kill)%zero0, (kill)%_, %_, %_ dmask:xyzw 2d tfe storage: semantics: scope:invocation 162 //>> v5: (noCSE)%zero1 = p_create_vector 0, 0, 0, 0, 0 163 //>> v5: %_ = image_sample_lz_o %_, %_, (kill)%zero1, (kill)%_, %_, %_ dmask:xyzw 2d tfe storage: semantics: scope:invocation 164 //>> v5: (noCSE)%zero2 = p_create_vector 0, 0, 0, 0, 0 165 //>> v5: %_ = image_sample_lz_o %_, %_, (kill)%zero2, (kill)%_, %_, %_ dmask:xyzw 2d tfe storage: semantics: scope:invocation 166 //>> v5: (noCSE)%zero3 = p_create_vector 0, 0, 0, 0, 0 167 //>> v5: %_ = image_sample_lz_o (kill)%_, (kill)%_, (kill)%zero3, (kill)%_, (kill)%_, (kill)%_ dmask:xyzw 2d tfe storage: semantics: scope:invocation 168 //>> s_clause 0x3 169 //! image_sample_lz_o @sample_res, @sample_coords, @s256(img), @s128(samp) dmask:0xf dim:SQ_RSRC_IMG_2D tfe 170 //! image_sample_lz_o @sample_res, @sample_coords, @s256(img), @s128(samp) dmask:0xf dim:SQ_RSRC_IMG_2D tfe 171 //! image_sample_lz_o @sample_res, @sample_coords, @s256(img), @s128(samp) dmask:0xf dim:SQ_RSRC_IMG_2D tfe 172 //! image_sample_lz_o @sample_res, @sample_coords, @s256(img), @s128(samp) dmask:0xf dim:SQ_RSRC_IMG_2D tfe 173 code[0] = sparseTextureOffsetARB(tex, vec2(0.5), ivec2(1, 0), res[0]); 174 code[1] = sparseTextureOffsetARB(tex, vec2(0.5), ivec2(2, 0), res[1]); 175 code[2] = sparseTextureOffsetARB(tex, vec2(0.5), ivec2(3, 0), res[2]); 176 code[3] = sparseTextureOffsetARB(tex, vec2(0.5), ivec2(4, 0), res[3]); 177 } 178 ); 179 180 fprintf(output, "llvm_version: %u\n", LLVM_VERSION_MAJOR); 181 182 PipelineBuilder pbld(get_vk_device((amd_gfx_level)i)); 183 pbld.add_cs(cs); 184 pbld.print_ir(VK_SHADER_STAGE_COMPUTE_BIT, "ACO IR", true); 185 pbld.print_ir(VK_SHADER_STAGE_COMPUTE_BIT, "Assembly", true); 186 } 187 END_TEST 188