1gpu_id: 420 2cmd: X/23360: fence=1029603 3cmd: glxgears/23375: fence=1029604 4############################################################ 5cmdstream: 414 dwords 6t0 write RBBM_PERFCTR_CTL (0170) 7 RBBM_PERFCTR_CTL: 0x1 8108ce000: 0000: 00000170 00000001 9t0 write GRAS_DEBUG_ECO_CONTROL (0c81) 10 GRAS_DEBUG_ECO_CONTROL: 0 11108ce008: 0000: 00000c81 00000000 12t0 write SP_MODE_CONTROL (0ec3) 13 SP_MODE_CONTROL: 0x6 14108ce010: 0000: 00000ec3 00000006 15t0 write TPL1_TP_MODE_CONTROL (0f03) 16 TPL1_TP_MODE_CONTROL: 0x3a 17108ce018: 0000: 00000f03 0000003a 18t0 write UNKNOWN_0D01 (0d01) 19 UNKNOWN_0D01: 0x1 20108ce020: 0000: 00000d01 00000001 21t0 write UNKNOWN_0E42 (0e42) 22 UNKNOWN_0E42: 0 23108ce028: 0000: 00000e42 00000000 24t0 write UCHE_CACHE_WAYS_VFD (0e8c) 25 UCHE_CACHE_WAYS_VFD: 0x7 26108ce030: 0000: 00000e8c 00000007 27t0 write UCHE_CACHE_MODE_CONTROL (0e80) 28 UCHE_CACHE_MODE_CONTROL: 0 29108ce038: 0000: 00000e80 00000000 30t0 write UCHE_INVALIDATE0 (0e8a) 31 UCHE_INVALIDATE0: 0 32 UCHE_INVALIDATE1: 0x12 33108ce040: 0000: 00010e8a 00000000 00000012 34t0 write HLSQ_MODE_CONTROL (0e05) 35 HLSQ_MODE_CONTROL: 0 36108ce04c: 0000: 00000e05 00000000 37t0 write UNKNOWN_0CC5 (0cc5) 38 UNKNOWN_0CC5: 0x6 39108ce054: 0000: 00000cc5 00000006 40t0 write UNKNOWN_0CC6 (0cc6) 41 UNKNOWN_0CC6: 0 42108ce05c: 0000: 00000cc6 00000000 43t0 write UNKNOWN_0EC2 (0ec2) 44 UNKNOWN_0EC2: 0x40000 45108ce064: 0000: 00000ec2 00040000 46t0 write UNKNOWN_2001 (2001) 47 UNKNOWN_2001: 0 48108ce06c: 0000: 00002001 00000000 49t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 50108ce074: 0000: c0003b00 00001000 51t0 write UNKNOWN_20EF (20ef) 52 UNKNOWN_20EF: 0 53108ce07c: 0000: 000020ef 00000000 54t0 write RB_BLEND_RED (20f0) 55 RB_BLEND_RED: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 } 56 RB_BLEND_RED_F32: 0.000000 57 RB_BLEND_GREEN: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 } 58 RB_BLEND_GREEN_F32: 0.007813 59108ce084: 0000: 000320f0 00000000 00000000 00000000 3c0000ff 60t0 write UNKNOWN_2152 (2152) 61 UNKNOWN_2152: 0 62108ce098: 0000: 00002152 00000000 63t0 write UNKNOWN_2153 (2153) 64 UNKNOWN_2153: 0 65108ce0a0: 0000: 00002153 00000000 66t0 write UNKNOWN_2154 (2154) 67 UNKNOWN_2154: 0 68108ce0a8: 0000: 00002154 00000000 69t0 write UNKNOWN_2155 (2155) 70 UNKNOWN_2155: 0 71108ce0b0: 0000: 00002155 00000000 72t0 write UNKNOWN_2156 (2156) 73 UNKNOWN_2156: 0 74108ce0b8: 0000: 00002156 00000000 75t0 write UNKNOWN_2157 (2157) 76 UNKNOWN_2157: 0 77108ce0c0: 0000: 00002157 00000000 78t0 write UNKNOWN_21C3 (21c3) 79 UNKNOWN_21C3: 0x1d 80108ce0c8: 0000: 000021c3 0000001d 81t0 write PC_GS_PARAM (21e5) 82 PC_GS_PARAM: { MAX_VERTICES = 0 | INVOCATIONS = 0 | PRIMTYPE = PC_DRAW_POINTS } 83108ce0d0: 0000: 000021e5 00000000 84t0 write UNKNOWN_21E6 (21e6) 85 UNKNOWN_21E6: 0x1 86108ce0d8: 0000: 000021e6 00000001 87t0 write PC_HS_PARAM (21e7) 88 PC_HS_PARAM: { VERTICES_OUT = 0 | SPACING = EQUAL_SPACING } 89108ce0e0: 0000: 000021e7 00000000 90t0 write UNKNOWN_22D7 (22d7) 91 UNKNOWN_22D7: 0 92108ce0e8: 0000: 000022d7 00000000 93t0 write TPL1_TP_TEX_OFFSET (2380) 94 TPL1_TP_TEX_OFFSET: 0 95108ce0f0: 0000: 00002380 00000000 96t0 write TPL1_TP_TEX_COUNT (2381) 97 TPL1_TP_TEX_COUNT: { VS = 16 | HS = 0 | DS = 0 | GS = 0 } 98108ce0f8: 0000: 00002381 00000010 99t0 write TPL1_TP_FS_TEX_COUNT (23a0) 100 TPL1_TP_FS_TEX_COUNT: { FS = 16 | CS = 0 } 101108ce100: 0000: 000023a0 00000010 102t3 opcode: CP_SET_DRAW_STATE (43) (3 dwords) 103 { COUNT = 0 | DISABLE_ALL_GROUPS | GROUP_ID = 0 } 104 { ADDR_LO = 0 } 105108ce108: 0000: c0014300 00040000 00000000 106t0 write SP_VS_PVT_MEM_PARAM (22e2) 107 SP_VS_PVT_MEM_PARAM: 0x8000001 108 SP_VS_PVT_MEM_ADDR: 0x10cd7000 109108ce114: 0000: 000122e2 08000001 10cd7000 110t0 write SP_FS_PVT_MEM_PARAM (22ec) 111 SP_FS_PVT_MEM_PARAM: 0x8000001 112 SP_FS_PVT_MEM_ADDR: 0x10cd9000 113108ce120: 0000: 000122ec 08000001 10cd9000 114t0 write GRAS_SC_CONTROL (207b) 115 GRAS_SC_CONTROL: { RENDER_MODE = RB_RENDERING_PASS | MSAA_SAMPLES = 0 | MSAA_DISABLE | RASTER_MODE = 0 } 116108ce12c: 0000: 0000207b 00000800 117t0 write RB_MSAA_CONTROL (20a2) 118 RB_MSAA_CONTROL: { DISABLE | SAMPLES = 0 } 119108ce134: 0000: 000020a2 00001000 120t0 write GRAS_CL_GB_CLIP_ADJ (2004) 121 GRAS_CL_GB_CLIP_ADJ: { HORZ = 0 | VERT = 0 } 122108ce13c: 0000: 00002004 00000000 123t0 write RB_ALPHA_CONTROL (20f8) 124 RB_ALPHA_CONTROL: { ALPHA_REF = 0 | ALPHA_TEST_FUNC = FUNC_ALWAYS } 125108ce144: 0000: 000020f8 00000e00 126t0 write RB_FS_OUTPUT (20f9) 127 RB_FS_OUTPUT: { ENABLE_BLEND = 0 | SAMPLE_MASK = 0xffff } 128108ce14c: 0000: 000020f9 ffff0000 129t0 write GRAS_ALPHA_CONTROL (2073) 130 GRAS_ALPHA_CONTROL: { 0 } 131108ce154: 0000: 00002073 00000000 132t0 write VSC_BIN_SIZE (0c00) 133 VSC_BIN_SIZE: { WIDTH = 320 | HEIGHT = 320 } 134108ce15c: 0000: 00000c00 0000014a 135t0 write VSC_SIZE_ADDRESS (0c01) 136 VSC_SIZE_ADDRESS: 0x10cdb000 137108ce164: 0000: 00000c01 10cdb000 138t0 write VSC_PIPE_CONFIG[0].REG (0c08) 139 VSC_PIPE_CONFIG[0].REG: { X = 0 | Y = 0 | W = 1 | H = 1 } 140 VSC_PIPE_CONFIG[0x1].REG: { X = 0 | Y = 0 | W = 0 | H = 0 } 141 VSC_PIPE_CONFIG[0x2].REG: { X = 0 | Y = 0 | W = 0 | H = 0 } 142 VSC_PIPE_CONFIG[0x3].REG: { X = 0 | Y = 0 | W = 0 | H = 0 } 143 VSC_PIPE_CONFIG[0x4].REG: { X = 0 | Y = 0 | W = 0 | H = 0 } 144 VSC_PIPE_CONFIG[0x5].REG: { X = 0 | Y = 0 | W = 0 | H = 0 } 145 VSC_PIPE_CONFIG[0x6].REG: { X = 0 | Y = 0 | W = 0 | H = 0 } 146 VSC_PIPE_CONFIG[0x7].REG: { X = 0 | Y = 0 | W = 0 | H = 0 } 147108ce16c: 0000: 00070c08 01100000 00000000 00000000 00000000 00000000 00000000 00000000 148* 149t0 write VSC_PIPE_DATA_ADDRESS[0].REG (0c10) 150 VSC_PIPE_DATA_ADDRESS[0].REG: 0x10cdc000 151 VSC_PIPE_DATA_ADDRESS[0x1].REG: 0x10d1c000 152 VSC_PIPE_DATA_ADDRESS[0x2].REG: 0x10d5c000 153 VSC_PIPE_DATA_ADDRESS[0x3].REG: 0x10d9c000 154 VSC_PIPE_DATA_ADDRESS[0x4].REG: 0x10ddc000 155 VSC_PIPE_DATA_ADDRESS[0x5].REG: 0x10e1c000 156 VSC_PIPE_DATA_ADDRESS[0x6].REG: 0x10e5c000 157 VSC_PIPE_DATA_ADDRESS[0x7].REG: 0x10e9c000 158108ce190: 0000: 00070c10 10cdc000 10d1c000 10d5c000 10d9c000 10ddc000 10e1c000 10e5c000 159108ce1b0: 0020: 10e9c000 160t0 write VSC_PIPE_DATA_LENGTH[0].REG (0c18) 161 VSC_PIPE_DATA_LENGTH[0].REG: 0x3ffe0 162 VSC_PIPE_DATA_LENGTH[0x1].REG: 0x3ffe0 163 VSC_PIPE_DATA_LENGTH[0x2].REG: 0x3ffe0 164 VSC_PIPE_DATA_LENGTH[0x3].REG: 0x3ffe0 165 VSC_PIPE_DATA_LENGTH[0x4].REG: 0x3ffe0 166 VSC_PIPE_DATA_LENGTH[0x5].REG: 0x3ffe0 167 VSC_PIPE_DATA_LENGTH[0x6].REG: 0x3ffe0 168 VSC_PIPE_DATA_LENGTH[0x7].REG: 0x3ffe0 169108ce1b4: 0000: 00070c18 0003ffe0 0003ffe0 0003ffe0 0003ffe0 0003ffe0 0003ffe0 0003ffe0 170108ce1d4: 0020: 0003ffe0 171t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 172108ce1d8: 0000: c0002600 00000000 173t0 write RB_FRAME_BUFFER_DIMENSION (0ce0) 174 RB_FRAME_BUFFER_DIMENSION: { WIDTH = 300 | HEIGHT = 300 } 175108ce1e0: 0000: 00000ce0 012c012c 176t0 write RB_MODE_CONTROL (20a0) 177 RB_MODE_CONTROL: { WIDTH = 320 | HEIGHT = 320 | ENABLE_GMEM } 178108ce1e8: 0000: 000020a0 00010a0a 179t0 write RB_DEPTH_INFO (2103) 180 RB_DEPTH_INFO: { DEPTH_FORMAT = DEPTH4_24_8 | DEPTH_BASE = 0x64000 } 181 RB_DEPTH_PITCH: 1280 182 RB_DEPTH_PITCH2: 1280 183108ce1f0: 0000: 00022103 00064002 00000028 00000028 184t0 write RB_STENCIL_INFO (2108) 185 RB_STENCIL_INFO: { STENCIL_BASE = 0 } 186 RB_STENCIL_PITCH: 0 187108ce200: 0000: 00012108 00000000 00000000 188t0 write GRAS_DEPTH_CONTROL (2077) 189 GRAS_DEPTH_CONTROL: { FORMAT = DEPTH4_24_8 } 190108ce20c: 0000: 00002077 00000002 191t0 write PC_VSTREAM_CONTROL (21c2) 192 PC_VSTREAM_CONTROL: { SIZE = 0 | N = 0 } 193108ce214: 0000: 000021c2 00000000 194t3 opcode: (null) (4c) (4 dwords) 195108ce21c: 0000: c0024c00 00000000 00000000 012b012b 196t0 write RB_MRT[0].BUF_INFO (20a5) 197 RB_MRT[0].BUF_INFO: { COLOR_FORMAT = RB4_R8G8B8A8_UNORM | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WXYZ | COLOR_BUF_PITCH = 1280 } 198 RB_MRT[0].BASE: 0 199 RB_MRT[0].CONTROL3: { STRIDE = 1280 } 200108ce22c: 0000: 000220a5 0014089a 00000000 00002800 201t0 write RB_MRT[0x1].BUF_INFO (20aa) 202 RB_MRT[0x1].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 } 203 RB_MRT[0x1].BASE: 0 204 RB_MRT[0x1].CONTROL3: { STRIDE = 0 } 205108ce23c: 0000: 000220aa 00000080 00000000 00000000 206t0 write RB_MRT[0x2].BUF_INFO (20af) 207 RB_MRT[0x2].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 } 208 RB_MRT[0x2].BASE: 0 209 RB_MRT[0x2].CONTROL3: { STRIDE = 0 } 210108ce24c: 0000: 000220af 00000080 00000000 00000000 211t0 write RB_MRT[0x3].BUF_INFO (20b4) 212 RB_MRT[0x3].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 } 213 RB_MRT[0x3].BASE: 0 214 RB_MRT[0x3].CONTROL3: { STRIDE = 0 } 215108ce25c: 0000: 000220b4 00000080 00000000 00000000 216t0 write RB_MRT[0x4].BUF_INFO (20b9) 217 RB_MRT[0x4].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 } 218 RB_MRT[0x4].BASE: 0 219 RB_MRT[0x4].CONTROL3: { STRIDE = 0 } 220108ce26c: 0000: 000220b9 00000080 00000000 00000000 221t0 write RB_MRT[0x5].BUF_INFO (20be) 222 RB_MRT[0x5].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 } 223 RB_MRT[0x5].BASE: 0 224 RB_MRT[0x5].CONTROL3: { STRIDE = 0 } 225108ce27c: 0000: 000220be 00000080 00000000 00000000 226t0 write RB_MRT[0x6].BUF_INFO (20c3) 227 RB_MRT[0x6].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 } 228 RB_MRT[0x6].BASE: 0 229 RB_MRT[0x6].CONTROL3: { STRIDE = 0 } 230108ce28c: 0000: 000220c3 00000080 00000000 00000000 231t0 write RB_MRT[0x7].BUF_INFO (20c8) 232 RB_MRT[0x7].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 } 233 RB_MRT[0x7].BASE: 0 234 RB_MRT[0x7].CONTROL3: { STRIDE = 0 } 235108ce29c: 0000: 000220c8 00000080 00000000 00000000 236t0 write RB_BIN_OFFSET (210d) 237 RB_BIN_OFFSET: { X = 0 | Y = 0 } 238108ce2ac: 0000: 0000210d 00000000 239t0 write GRAS_SC_SCREEN_SCISSOR_TL (207c) 240 GRAS_SC_SCREEN_SCISSOR_TL: { X = 0 | Y = 0 } 241 GRAS_SC_SCREEN_SCISSOR_BR: { X = 299 | Y = 299 } 242108ce2b4: 0000: 0001207c 00000000 012b012b 243t0 write RB_RENDER_CONTROL (20a1) 244 RB_RENDER_CONTROL: { 0x8 } 245108ce2c0: 0000: 000020a1 00000008 246t0 write CP_SCRATCH[0x6].REG (057e) 247 CP_SCRATCH[0x6].REG: 0x73 248 :0,0,115,0 249108ce2c8: 0000: 0000057e 00000073 250t3 opcode: CP_INDIRECT_BUFFER (3f) (3 dwords) 251 ibaddr:109ce000 252 ibsize:00000f2e 253t0 write CP_SCRATCH[0x5].REG (057d) 254 CP_SCRATCH[0x5].REG: 0x1 255 :0,1,115,0 256109ce000: 0000: 0000057d 00000001 257t0 write RB_RENDER_COMPONENTS (20fb) 258 RB_RENDER_COMPONENTS: { RT0 = 0xf | RT1 = 0 | RT2 = 0 | RT3 = 0 | RT4 = 0 | RT5 = 0 | RT6 = 0 | RT7 = 0 } 259109ce008: 0000: 000020fb 0000000f 260t0 write RB_ALPHA_CONTROL (20f8) 261 RB_ALPHA_CONTROL: { ALPHA_REF = 0 | ALPHA_TEST_FUNC = FUNC_NEVER } 262109ce010: 0000: 000020f8 00000000 263t0 write RB_STENCIL_CONTROL (2106) 264 RB_STENCIL_CONTROL: { FUNC = FUNC_NEVER | FAIL = STENCIL_KEEP | ZPASS = STENCIL_KEEP | ZFAIL = STENCIL_KEEP | FUNC_BF = FUNC_NEVER | FAIL_BF = STENCIL_KEEP | ZPASS_BF = STENCIL_KEEP | ZFAIL_BF = STENCIL_KEEP } 265 RB_STENCIL_CONTROL2: { 0 } 266109ce018: 0000: 00012106 00000000 00000000 267t0 write RB_STENCILREFMASK (210b) 268 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 269 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 270109ce024: 0000: 0001210b 00000000 00000000 271t0 write RB_DEPTH_CONTROL (2101) 272 RB_DEPTH_CONTROL: { Z_TEST_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_ALWAYS | Z_READ_ENABLE } 273109ce030: 0000: 00002101 80000076 274t0 write GRAS_ALPHA_CONTROL (2073) 275 GRAS_ALPHA_CONTROL: { 0 } 276109ce038: 0000: 00002073 00000000 277t0 write GRAS_SU_MODE_CONTROL (2078) 278 GRAS_SU_MODE_CONTROL: { FRONT_CW | LINEHALFWIDTH = 0.000000 | RENDERING_PASS } 279109ce040: 0000: 00002078 00100004 280t0 write GRAS_SU_POINT_MINMAX (2070) 281 GRAS_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 282 GRAS_SU_POINT_SIZE: 0.000000 283109ce048: 0000: 00012070 00000000 00000000 284t0 write GRAS_SU_POLY_OFFSET_SCALE (2074) 285 GRAS_SU_POLY_OFFSET_SCALE: 0.000000 286 GRAS_SU_POLY_OFFSET_OFFSET: 0.000000 287 GRAS_SU_POLY_OFFSET_CLAMP: 0.000000 288109ce054: 0000: 00022074 00000000 00000000 00000000 289t0 write GRAS_CL_CLIP_CNTL (2000) 290 GRAS_CL_CLIP_CNTL: { 0x80000 } 291109ce064: 0000: 00002000 00080000 292t0 write PC_PRIM_VTX_CNTL (21c4) 293 PC_PRIM_VTX_CNTL: { VAROUT = 0 | PROVOKING_VTX_LAST } 294 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 295109ce06c: 0000: 000121c4 02000000 00000012 296t0 write GRAS_SC_WINDOW_SCISSOR_BR (209c) 297 GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 } 298 GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 299109ce078: 0000: 0001209c 012b012b 00000000 300t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 301109ce084: 0000: c0002600 00000000 302t0 write GRAS_CL_VPORT_XOFFSET_0 (2008) 303 GRAS_CL_VPORT_XOFFSET_0: 150.000000 304 GRAS_CL_VPORT_XSCALE_0: 150.000000 305 GRAS_CL_VPORT_YOFFSET_0: 150.000000 306 GRAS_CL_VPORT_YSCALE_0: -150.000000 307 GRAS_CL_VPORT_ZOFFSET_0: 0.000000 308 GRAS_CL_VPORT_ZSCALE_0: 1.000000 309109ce08c: 0000: 00052008 43160000 43160000 43160000 c3160000 00000000 3f800000 310t0 write RB_VPORT_Z_CLAMP[0].MIN (2120) 311 RB_VPORT_Z_CLAMP[0].MIN: 0 312 RB_VPORT_Z_CLAMP[0].MAX: 0xffffff 313109ce0a8: 0000: 00012120 00000000 00ffffff 314t0 write HLSQ_UPDATE_CONTROL (23db) 315 HLSQ_UPDATE_CONTROL: 0x3 316109ce0b4: 0000: 000023db 00000003 317t0 write HLSQ_CONTROL_0_REG (23c0) 318 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE } 319 HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x } 320 HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x } 321 HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x } 322 HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 } 323109ce0bc: 0000: 000423c0 28000250 fcfc0100 fff3f3f0 fcfcfcfc 00fcfcfc 324t0 write HLSQ_VS_CONTROL_REG (23c5) 325 HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 1 } 326 HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 } 327 HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 328 HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 329 HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 330109ce0d4: 0000: 000423c5 01000042 017e423e 007e4200 007e4200 007e4200 331t0 write SP_SP_CTRL_REG (22c0) 332 SP_SP_CTRL_REG: { 0x140010 } 333109ce0ec: 0000: 000022c0 00140010 334t0 write SP_INSTR_CACHE_CTRL (22c1) 335 SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f } 336109ce0f4: 0000: 000022c1 000005ff 337t0 write SP_VS_LENGTH_REG (22e5) 338 SP_VS_LENGTH_REG: 1 339109ce0fc: 0000: 000022e5 00000001 340t0 write SP_VS_CTRL_REG0 (22c4) 341 SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE } 342 SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 4 } 343 SP_VS_PARAM_REG: { POSREGID = r0.x | PSIZEREGID = r63.x | TOTALVSOUTVAR = 0 } 344109ce104: 0000: 000222c4 00200400 04000042 0000fc00 345t0 write SP_VS_OBJ_OFFSET_REG (22e0) 346 SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 347 SP_VS_OBJ_START: 0x1073c000 348109ce114: 0000: 000122e0 00000000 1073c000 349t0 write SP_FS_LENGTH_REG (22ef) 350 SP_FS_LENGTH_REG: 1 351109ce120: 0000: 000022ef 00000001 352t0 write SP_FS_CTRL_REG0 (22e8) 353 SP_FS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE } 354 SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | 0x80000000 } 355109ce128: 0000: 000122e8 00340400 8000003e 356t0 write SP_FS_OBJ_OFFSET_REG (22ea) 357 SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 358 SP_FS_OBJ_START: 0x1073b000 359109ce134: 0000: 000122ea 7e420000 1073b000 360t0 write SP_HS_OBJ_OFFSET_REG (230d) 361 SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 362109ce140: 0000: 0000230d 7e420000 363t0 write SP_DS_OBJ_OFFSET_REG (2334) 364 SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 365109ce148: 0000: 00002334 7e420000 366t0 write SP_GS_OBJ_OFFSET_REG (235b) 367 SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 368109ce150: 0000: 0000235b 7e420000 369t0 write GRAS_CNTL (2003) 370 GRAS_CNTL: { 0 } 371109ce158: 0000: 00002003 00000000 372t0 write RB_RENDER_CONTROL2 (20a3) 373 RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 } 374109ce160: 0000: 000020a3 00000000 375t0 write RB_FS_OUTPUT_REG (2100) 376 RB_FS_OUTPUT_REG: { MRT = 1 } 377109ce168: 0000: 00002100 00000001 378t0 write SP_FS_OUTPUT_REG (22f0) 379 SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x } 380109ce170: 0000: 000022f0 0000fc01 381t0 write SP_FS_MRT[0].REG (22f1) 382 SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM } 383 SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 } 384 SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 } 385 SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 } 386 SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 } 387 SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 } 388 SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 } 389 SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 } 390109ce178: 0000: 000722f1 0001a000 00000000 00000000 00000000 00000000 00000000 00000000 391* 392t0 write VPC_ATTR (2140) 393 VPC_ATTR: { TOTALATTR = 0 | THRDASSIGN = 1 | 0x40000000 } 394 VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 0 | NUMNONPOSVSVAR = 0 } 395109ce19c: 0000: 00012140 40001000 00000000 396t0 write VPC_VARYING_INTERP[0].MODE (2142) 397 VPC_VARYING_INTERP[0].MODE: 0 398 VPC_VARYING_INTERP[0x1].MODE: 0 399 VPC_VARYING_INTERP[0x2].MODE: 0 400 VPC_VARYING_INTERP[0x3].MODE: 0 401 VPC_VARYING_INTERP[0x4].MODE: 0 402 VPC_VARYING_INTERP[0x5].MODE: 0 403 VPC_VARYING_INTERP[0x6].MODE: 0 404 VPC_VARYING_INTERP[0x7].MODE: 0 405109ce1a8: 0000: 00072142 00000000 00000000 00000000 00000000 00000000 00000000 00000000 406* 407t0 write VPC_VARYING_PS_REPL[0].MODE (214a) 408 VPC_VARYING_PS_REPL[0].MODE: 0 409 VPC_VARYING_PS_REPL[0x1].MODE: 0 410 VPC_VARYING_PS_REPL[0x2].MODE: 0 411 VPC_VARYING_PS_REPL[0x3].MODE: 0 412 VPC_VARYING_PS_REPL[0x4].MODE: 0 413 VPC_VARYING_PS_REPL[0x5].MODE: 0 414 VPC_VARYING_PS_REPL[0x6].MODE: 0 415 VPC_VARYING_PS_REPL[0x7].MODE: 0 416109ce1cc: 0000: 0007214a 00000000 00000000 00000000 00000000 00000000 00000000 00000000 417* 418t3 opcode: CP_LOAD_STATE4 (30) (35 dwords) 419 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 1 } 420 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 421 :0:0000:0000[03000000x_00000000x] end 422 :0:0001:0001[00000000x_00000000x] nop 423 :0:0002:0002[00000000x_00000000x] nop 424 :0:0003:0003[00000000x_00000000x] nop 425 :0:0004:0004[00000000x_00000000x] nop 426 Stats: 427 - shaderdb: 5 instr, 4 nops, 1 non-nops, 0 mov, 0 cov 428 - shaderdb: 0 last-baryf, 0 half, 0 full, 0 constlen 429 - shaderdb: 5 cat0, 0 cat1, 0 cat2, 0 cat3, 0 cat4, 0 cat5, 0 cat6, 0 cat7 430 - shaderdb: 0 sstall, 0 (ss), 0 (sy) 431109ce1f0: 0000: c0213000 00600000 00000000 00000000 03000000 00000000 00000000 00000000 432* 433t3 opcode: CP_LOAD_STATE4 (30) (35 dwords) 434 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 1 } 435 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 436 :1:0000:0000[20244000x_00000000x] mov.f32f32 r0.x, c0.x 437 :1:0001:0001[20244001x_00000001x] mov.f32f32 r0.y, c0.y 438 :1:0002:0002[20244002x_00000002x] mov.f32f32 r0.z, c0.z 439 :1:0003:0003[20244003x_00000003x] mov.f32f32 r0.w, c0.w 440 :0:0004:0004[03000000x_00000000x] end 441 :0:0005:0005[00000000x_00000000x] nop 442 :0:0006:0006[00000000x_00000000x] nop 443 :0:0007:0007[00000000x_00000000x] nop 444 :0:0008:0008[00000000x_00000000x] nop 445 Stats: 446 - shaderdb: 9 instr, 4 nops, 5 non-nops, 4 mov, 0 cov 447 - shaderdb: 0 last-baryf, 0 half, 1 full, 1 constlen 448 - shaderdb: 5 cat0, 4 cat1, 0 cat2, 0 cat3, 0 cat4, 0 cat5, 0 cat6, 0 cat7 449 - shaderdb: 0 sstall, 0 (ss), 0 (sy) 450109ce27c: 0000: c0213000 00700000 00000000 00000000 20244000 00000001 20244001 00000002 451109ce29c: 0020: 20244002 00000003 20244003 00000000 03000000 00000000 00000000 00000000 452* 453t3 opcode: CP_LOAD_STATE4 (30) (19 dwords) 454 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 4 } 455 { STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 } 456109ce314: 0.000000 0.000000 0.000000 0.000000 -nan -nan 0.000000 0.000000 457109ce334: 0.000000 0.000000 0.000000 0.000000 0.000000 0.000000 0.000000 0.000000 458109ce314: 0000: 00000000 00000000 00000000 00000000 ffffffff ffffffff 00000405 00000000 459109ce334: 0020: 00000000 00000000 02070000 00000000 00000000 00000000 00000000 00000000 460109ce308: 0000: c0113000 01300000 00000001 00000000 00000000 00000000 00000000 ffffffff 461109ce328: 0020: ffffffff 00000405 00000000 00000000 00000000 02070000 00000000 00000000 462* 463t0 write RB_MRT[0].CONTROL (20a4) 464 RB_MRT[0].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf } 465109ce354: 0000: 000020a4 0f000c00 466t0 write RB_MRT[0].BLEND_CONTROL (20a8) 467 RB_MRT[0].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 468109ce35c: 0000: 000020a8 00000000 469t0 write RB_MRT[0x1].CONTROL (20a9) 470 RB_MRT[0x1].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 } 471109ce364: 0000: 000020a9 00000c00 472t0 write RB_MRT[0x1].BLEND_CONTROL (20ad) 473 RB_MRT[0x1].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 474109ce36c: 0000: 000020ad 00000000 475t0 write RB_MRT[0x2].CONTROL (20ae) 476 RB_MRT[0x2].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 } 477109ce374: 0000: 000020ae 00000c00 478t0 write RB_MRT[0x2].BLEND_CONTROL (20b2) 479 RB_MRT[0x2].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 480109ce37c: 0000: 000020b2 00000000 481t0 write RB_MRT[0x3].CONTROL (20b3) 482 RB_MRT[0x3].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 } 483109ce384: 0000: 000020b3 00000c00 484t0 write RB_MRT[0x3].BLEND_CONTROL (20b7) 485 RB_MRT[0x3].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 486109ce38c: 0000: 000020b7 00000000 487t0 write RB_MRT[0x4].CONTROL (20b8) 488 RB_MRT[0x4].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 } 489109ce394: 0000: 000020b8 00000c00 490t0 write RB_MRT[0x4].BLEND_CONTROL (20bc) 491 RB_MRT[0x4].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 492109ce39c: 0000: 000020bc 00000000 493t0 write RB_MRT[0x5].CONTROL (20bd) 494 RB_MRT[0x5].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 } 495109ce3a4: 0000: 000020bd 00000c00 496t0 write RB_MRT[0x5].BLEND_CONTROL (20c1) 497 RB_MRT[0x5].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 498109ce3ac: 0000: 000020c1 00000000 499t0 write RB_MRT[0x6].CONTROL (20c2) 500 RB_MRT[0x6].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 } 501109ce3b4: 0000: 000020c2 00000c00 502t0 write RB_MRT[0x6].BLEND_CONTROL (20c6) 503 RB_MRT[0x6].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 504109ce3bc: 0000: 000020c6 00000000 505t0 write RB_MRT[0x7].CONTROL (20c7) 506 RB_MRT[0x7].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 } 507109ce3c4: 0000: 000020c7 00000c00 508t0 write RB_MRT[0x7].BLEND_CONTROL (20cb) 509 RB_MRT[0x7].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 510109ce3cc: 0000: 000020cb 00000000 511t0 write RB_FS_OUTPUT (20f9) 512 RB_FS_OUTPUT: { ENABLE_BLEND = 0 | INDEPENDENT_BLEND | SAMPLE_MASK = 0xffff } 513109ce3d4: 0000: 000020f9 ffff0100 514t0 write RB_BLEND_RED (20f0) 515 RB_BLEND_RED: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 } 516 RB_BLEND_RED_F32: 0.000000 517 RB_BLEND_GREEN: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 } 518 RB_BLEND_GREEN_F32: 0.000000 519 RB_BLEND_BLUE: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 } 520 RB_BLEND_BLUE_F32: 0.000000 521 RB_BLEND_ALPHA: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 } 522 RB_BLEND_ALPHA_F32: 0.000000 523109ce3dc: 0000: 000720f0 00000000 00000000 00000000 00000000 00000000 00000000 00000000 524* 525t0 write VFD_FETCH[0].INSTR_0 (220a) 526 VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 12 } 527 VFD_FETCH[0].INSTR_1: 0x1074a000 528 VFD_FETCH[0].INSTR_2: { SIZE = 0x1000 } 529 VFD_FETCH[0].INSTR_3: { STEPRATE = 1 } 530109ce400: 0000: 0003220a 0000060b 1074a000 00001000 00000001 531t0 write VFD_DECODE[0].INSTR (228a) 532 VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.x | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID } 533109ce414: 0000: 0000228a 2c0000df 534t0 write VFD_CONTROL_0 (2200) 535 VFD_CONTROL_0: { TOTALATTRTOVS = 4 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 1 | STRMFETCHINSTRCNT = 1 | 0xa0000 } 536 VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x } 537 VFD_CONTROL_2: 0 538 VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x } 539 VFD_CONTROL_4: 0 540109ce41c: 0000: 00042200 041a0004 fcfc0081 00000000 0000fc00 00000000 541t0 write UCHE_INVALIDATE0 (0e8a) 542 UCHE_INVALIDATE0: 0 543 UCHE_INVALIDATE1: 0x12 544109ce434: 0000: 00010e8a 00000000 00000012 545t0 write VFD_INDEX_OFFSET (2208) 546 VFD_INDEX_OFFSET: 0 547 UNKNOWN_2209: 0 548109ce440: 0000: 00012208 00000000 00000000 549t0 write PC_RESTART_INDEX (21c6) 550 PC_RESTART_INDEX: 0xffffffff 551109ce44c: 0000: 000021c6 ffffffff 552t0 write CP_SCRATCH[0x7].REG (057f) 553 CP_SCRATCH[0x7].REG: 0x2 554 :0,1,115,2 555109ce454: 0000: 0000057f 00000002 556t3 opcode: CP_DRAW_INDX_OFFSET (38) (4 dwords) 557 { PRIM_TYPE = DI_PT_RECTLIST | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_32_BIT | PATCH_TYPE = TESS_QUADS } 558 { NUM_INSTANCES = 1 } 559 { NUM_INDICES = 2 } 560 draw[0] register values 561!+ 00000001 RBBM_PERFCTR_CTL: 0x1 562!+ 00000001 CP_SCRATCH[0x5].REG: 0x1 563 :0,1,115,2 564!+ 00000073 CP_SCRATCH[0x6].REG: 0x73 565 :0,1,115,2 566!+ 00000002 CP_SCRATCH[0x7].REG: 0x2 567 :0,1,115,2 568!+ 0000014a VSC_BIN_SIZE: { WIDTH = 320 | HEIGHT = 320 } 569!+ 10cdb000 VSC_SIZE_ADDRESS: 0x10cdb000 570!+ 01100000 VSC_PIPE_CONFIG[0].REG: { X = 0 | Y = 0 | W = 1 | H = 1 } 571 + 00000000 VSC_PIPE_CONFIG[0x1].REG: { X = 0 | Y = 0 | W = 0 | H = 0 } 572 + 00000000 VSC_PIPE_CONFIG[0x2].REG: { X = 0 | Y = 0 | W = 0 | H = 0 } 573 + 00000000 VSC_PIPE_CONFIG[0x3].REG: { X = 0 | Y = 0 | W = 0 | H = 0 } 574 + 00000000 VSC_PIPE_CONFIG[0x4].REG: { X = 0 | Y = 0 | W = 0 | H = 0 } 575 + 00000000 VSC_PIPE_CONFIG[0x5].REG: { X = 0 | Y = 0 | W = 0 | H = 0 } 576 + 00000000 VSC_PIPE_CONFIG[0x6].REG: { X = 0 | Y = 0 | W = 0 | H = 0 } 577 + 00000000 VSC_PIPE_CONFIG[0x7].REG: { X = 0 | Y = 0 | W = 0 | H = 0 } 578!+ 10cdc000 VSC_PIPE_DATA_ADDRESS[0].REG: 0x10cdc000 579!+ 10d1c000 VSC_PIPE_DATA_ADDRESS[0x1].REG: 0x10d1c000 580!+ 10d5c000 VSC_PIPE_DATA_ADDRESS[0x2].REG: 0x10d5c000 581!+ 10d9c000 VSC_PIPE_DATA_ADDRESS[0x3].REG: 0x10d9c000 582!+ 10ddc000 VSC_PIPE_DATA_ADDRESS[0x4].REG: 0x10ddc000 583!+ 10e1c000 VSC_PIPE_DATA_ADDRESS[0x5].REG: 0x10e1c000 584!+ 10e5c000 VSC_PIPE_DATA_ADDRESS[0x6].REG: 0x10e5c000 585!+ 10e9c000 VSC_PIPE_DATA_ADDRESS[0x7].REG: 0x10e9c000 586!+ 0003ffe0 VSC_PIPE_DATA_LENGTH[0].REG: 0x3ffe0 587!+ 0003ffe0 VSC_PIPE_DATA_LENGTH[0x1].REG: 0x3ffe0 588!+ 0003ffe0 VSC_PIPE_DATA_LENGTH[0x2].REG: 0x3ffe0 589!+ 0003ffe0 VSC_PIPE_DATA_LENGTH[0x3].REG: 0x3ffe0 590!+ 0003ffe0 VSC_PIPE_DATA_LENGTH[0x4].REG: 0x3ffe0 591!+ 0003ffe0 VSC_PIPE_DATA_LENGTH[0x5].REG: 0x3ffe0 592!+ 0003ffe0 VSC_PIPE_DATA_LENGTH[0x6].REG: 0x3ffe0 593!+ 0003ffe0 VSC_PIPE_DATA_LENGTH[0x7].REG: 0x3ffe0 594 + 00000000 GRAS_DEBUG_ECO_CONTROL: 0 595!+ 00000006 UNKNOWN_0CC5: 0x6 596 + 00000000 UNKNOWN_0CC6: 0 597!+ 012c012c RB_FRAME_BUFFER_DIMENSION: { WIDTH = 300 | HEIGHT = 300 } 598!+ 00000001 UNKNOWN_0D01: 0x1 599 + 00000000 HLSQ_MODE_CONTROL: 0 600 + 00000000 UNKNOWN_0E42: 0 601 + 00000000 UCHE_CACHE_MODE_CONTROL: 0 602 + 00000000 UCHE_INVALIDATE0: 0 603!+ 00000012 UCHE_INVALIDATE1: 0x12 604!+ 00000007 UCHE_CACHE_WAYS_VFD: 0x7 605!+ 00040000 UNKNOWN_0EC2: 0x40000 606!+ 00000006 SP_MODE_CONTROL: 0x6 607!+ 0000003a TPL1_TP_MODE_CONTROL: 0x3a 608!+ 00080000 GRAS_CL_CLIP_CNTL: { 0x80000 } 609 + 00000000 UNKNOWN_2001: 0 610 + 00000000 GRAS_CNTL: { 0 } 611 + 00000000 GRAS_CL_GB_CLIP_ADJ: { HORZ = 0 | VERT = 0 } 612!+ 43160000 GRAS_CL_VPORT_XOFFSET_0: 150.000000 613!+ 43160000 GRAS_CL_VPORT_XSCALE_0: 150.000000 614!+ 43160000 GRAS_CL_VPORT_YOFFSET_0: 150.000000 615!+ c3160000 GRAS_CL_VPORT_YSCALE_0: -150.000000 616 + 00000000 GRAS_CL_VPORT_ZOFFSET_0: 0.000000 617!+ 3f800000 GRAS_CL_VPORT_ZSCALE_0: 1.000000 618 + 00000000 GRAS_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 619 + 00000000 GRAS_SU_POINT_SIZE: 0.000000 620 + 00000000 GRAS_ALPHA_CONTROL: { 0 } 621 + 00000000 GRAS_SU_POLY_OFFSET_SCALE: 0.000000 622 + 00000000 GRAS_SU_POLY_OFFSET_OFFSET: 0.000000 623 + 00000000 GRAS_SU_POLY_OFFSET_CLAMP: 0.000000 624!+ 00000002 GRAS_DEPTH_CONTROL: { FORMAT = DEPTH4_24_8 } 625!+ 00100004 GRAS_SU_MODE_CONTROL: { FRONT_CW | LINEHALFWIDTH = 0.000000 | RENDERING_PASS } 626!+ 00000800 GRAS_SC_CONTROL: { RENDER_MODE = RB_RENDERING_PASS | MSAA_SAMPLES = 0 | MSAA_DISABLE | RASTER_MODE = 0 } 627 + 00000000 GRAS_SC_SCREEN_SCISSOR_TL: { X = 0 | Y = 0 } 628!+ 012b012b GRAS_SC_SCREEN_SCISSOR_BR: { X = 299 | Y = 299 } 629!+ 012b012b GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 } 630 + 00000000 GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 631!+ 00010a0a RB_MODE_CONTROL: { WIDTH = 320 | HEIGHT = 320 | ENABLE_GMEM } 632!+ 00000008 RB_RENDER_CONTROL: { 0x8 } 633!+ 00001000 RB_MSAA_CONTROL: { DISABLE | SAMPLES = 0 } 634 + 00000000 RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 } 635!+ 0f000c00 RB_MRT[0].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf } 636!+ 0014089a RB_MRT[0].BUF_INFO: { COLOR_FORMAT = RB4_R8G8B8A8_UNORM | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WXYZ | COLOR_BUF_PITCH = 1280 } 637 + 00000000 RB_MRT[0].BASE: 0 638!+ 00002800 RB_MRT[0].CONTROL3: { STRIDE = 1280 } 639 + 00000000 RB_MRT[0].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 640!+ 00000c00 RB_MRT[0x1].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 } 641!+ 00000080 RB_MRT[0x1].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 } 642 + 00000000 RB_MRT[0x1].BASE: 0 643 + 00000000 RB_MRT[0x1].CONTROL3: { STRIDE = 0 } 644 + 00000000 RB_MRT[0x1].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 645!+ 00000c00 RB_MRT[0x2].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 } 646!+ 00000080 RB_MRT[0x2].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 } 647 + 00000000 RB_MRT[0x2].BASE: 0 648 + 00000000 RB_MRT[0x2].CONTROL3: { STRIDE = 0 } 649 + 00000000 RB_MRT[0x2].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 650!+ 00000c00 RB_MRT[0x3].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 } 651!+ 00000080 RB_MRT[0x3].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 } 652 + 00000000 RB_MRT[0x3].BASE: 0 653 + 00000000 RB_MRT[0x3].CONTROL3: { STRIDE = 0 } 654 + 00000000 RB_MRT[0x3].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 655!+ 00000c00 RB_MRT[0x4].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 } 656!+ 00000080 RB_MRT[0x4].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 } 657 + 00000000 RB_MRT[0x4].BASE: 0 658 + 00000000 RB_MRT[0x4].CONTROL3: { STRIDE = 0 } 659 + 00000000 RB_MRT[0x4].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 660!+ 00000c00 RB_MRT[0x5].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 } 661!+ 00000080 RB_MRT[0x5].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 } 662 + 00000000 RB_MRT[0x5].BASE: 0 663 + 00000000 RB_MRT[0x5].CONTROL3: { STRIDE = 0 } 664 + 00000000 RB_MRT[0x5].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 665!+ 00000c00 RB_MRT[0x6].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 } 666!+ 00000080 RB_MRT[0x6].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 } 667 + 00000000 RB_MRT[0x6].BASE: 0 668 + 00000000 RB_MRT[0x6].CONTROL3: { STRIDE = 0 } 669 + 00000000 RB_MRT[0x6].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 670!+ 00000c00 RB_MRT[0x7].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 } 671!+ 00000080 RB_MRT[0x7].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 } 672 + 00000000 RB_MRT[0x7].BASE: 0 673 + 00000000 RB_MRT[0x7].CONTROL3: { STRIDE = 0 } 674 + 00000000 RB_MRT[0x7].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 675 + 00000000 UNKNOWN_20EF: 0 676 + 00000000 RB_BLEND_RED: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 } 677 + 00000000 RB_BLEND_RED_F32: 0.000000 678 + 00000000 RB_BLEND_GREEN: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 } 679 + 00000000 RB_BLEND_GREEN_F32: 0.000000 680 + 00000000 RB_BLEND_BLUE: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 } 681 + 00000000 RB_BLEND_BLUE_F32: 0.000000 682 + 00000000 RB_BLEND_ALPHA: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 } 683 + 00000000 RB_BLEND_ALPHA_F32: 0.000000 684 + 00000000 RB_ALPHA_CONTROL: { ALPHA_REF = 0 | ALPHA_TEST_FUNC = FUNC_NEVER } 685!+ ffff0100 RB_FS_OUTPUT: { ENABLE_BLEND = 0 | INDEPENDENT_BLEND | SAMPLE_MASK = 0xffff } 686!+ 0000000f RB_RENDER_COMPONENTS: { RT0 = 0xf | RT1 = 0 | RT2 = 0 | RT3 = 0 | RT4 = 0 | RT5 = 0 | RT6 = 0 | RT7 = 0 } 687!+ 00000001 RB_FS_OUTPUT_REG: { MRT = 1 } 688!+ 80000076 RB_DEPTH_CONTROL: { Z_TEST_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_ALWAYS | Z_READ_ENABLE } 689!+ 00064002 RB_DEPTH_INFO: { DEPTH_FORMAT = DEPTH4_24_8 | DEPTH_BASE = 0x64000 } 690!+ 00000028 RB_DEPTH_PITCH: 1280 691!+ 00000028 RB_DEPTH_PITCH2: 1280 692 + 00000000 RB_STENCIL_CONTROL: { FUNC = FUNC_NEVER | FAIL = STENCIL_KEEP | ZPASS = STENCIL_KEEP | ZFAIL = STENCIL_KEEP | FUNC_BF = FUNC_NEVER | FAIL_BF = STENCIL_KEEP | ZPASS_BF = STENCIL_KEEP | ZFAIL_BF = STENCIL_KEEP } 693 + 00000000 RB_STENCIL_CONTROL2: { 0 } 694 + 00000000 RB_STENCIL_INFO: { STENCIL_BASE = 0 } 695 + 00000000 RB_STENCIL_PITCH: 0 696 + 00000000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 697 + 00000000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 698 + 00000000 RB_BIN_OFFSET: { X = 0 | Y = 0 } 699 + 00000000 RB_VPORT_Z_CLAMP[0].MIN: 0 700!+ 00ffffff RB_VPORT_Z_CLAMP[0].MAX: 0xffffff 701!+ 40001000 VPC_ATTR: { TOTALATTR = 0 | THRDASSIGN = 1 | 0x40000000 } 702 + 00000000 VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 0 | NUMNONPOSVSVAR = 0 } 703 + 00000000 VPC_VARYING_INTERP[0].MODE: 0 704 + 00000000 VPC_VARYING_INTERP[0x1].MODE: 0 705 + 00000000 VPC_VARYING_INTERP[0x2].MODE: 0 706 + 00000000 VPC_VARYING_INTERP[0x3].MODE: 0 707 + 00000000 VPC_VARYING_INTERP[0x4].MODE: 0 708 + 00000000 VPC_VARYING_INTERP[0x5].MODE: 0 709 + 00000000 VPC_VARYING_INTERP[0x6].MODE: 0 710 + 00000000 VPC_VARYING_INTERP[0x7].MODE: 0 711 + 00000000 VPC_VARYING_PS_REPL[0].MODE: 0 712 + 00000000 VPC_VARYING_PS_REPL[0x1].MODE: 0 713 + 00000000 VPC_VARYING_PS_REPL[0x2].MODE: 0 714 + 00000000 VPC_VARYING_PS_REPL[0x3].MODE: 0 715 + 00000000 VPC_VARYING_PS_REPL[0x4].MODE: 0 716 + 00000000 VPC_VARYING_PS_REPL[0x5].MODE: 0 717 + 00000000 VPC_VARYING_PS_REPL[0x6].MODE: 0 718 + 00000000 VPC_VARYING_PS_REPL[0x7].MODE: 0 719 + 00000000 UNKNOWN_2152: 0 720 + 00000000 UNKNOWN_2153: 0 721 + 00000000 UNKNOWN_2154: 0 722 + 00000000 UNKNOWN_2155: 0 723 + 00000000 UNKNOWN_2156: 0 724 + 00000000 UNKNOWN_2157: 0 725 + 00000000 PC_VSTREAM_CONTROL: { SIZE = 0 | N = 0 } 726!+ 0000001d UNKNOWN_21C3: 0x1d 727!+ 02000000 PC_PRIM_VTX_CNTL: { VAROUT = 0 | PROVOKING_VTX_LAST } 728!+ 00000012 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 729!+ ffffffff PC_RESTART_INDEX: 0xffffffff 730 + 00000000 PC_GS_PARAM: { MAX_VERTICES = 0 | INVOCATIONS = 0 | PRIMTYPE = PC_DRAW_POINTS } 731!+ 00000001 UNKNOWN_21E6: 0x1 732 + 00000000 PC_HS_PARAM: { VERTICES_OUT = 0 | SPACING = EQUAL_SPACING } 733!+ 041a0004 VFD_CONTROL_0: { TOTALATTRTOVS = 4 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 1 | STRMFETCHINSTRCNT = 1 | 0xa0000 } 734!+ fcfc0081 VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x } 735 + 00000000 VFD_CONTROL_2: 0 736!+ 0000fc00 VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x } 737 + 00000000 VFD_CONTROL_4: 0 738 + 00000000 VFD_INDEX_OFFSET: 0 739 + 00000000 UNKNOWN_2209: 0 740!+ 0000060b VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 12 } 741!+ 1074a000 VFD_FETCH[0].INSTR_1: 0x1074a000 742!+ 00001000 VFD_FETCH[0].INSTR_2: { SIZE = 0x1000 } 743!+ 00000001 VFD_FETCH[0].INSTR_3: { STEPRATE = 1 } 744!+ 2c0000df VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.x | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID } 745!+ 00140010 SP_SP_CTRL_REG: { 0x140010 } 746!+ 000005ff SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f } 747!+ 00200400 SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE } 748!+ 04000042 SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 4 } 749!+ 0000fc00 SP_VS_PARAM_REG: { POSREGID = r0.x | PSIZEREGID = r63.x | TOTALVSOUTVAR = 0 } 750 + 00000000 UNKNOWN_22D7: 0 751 + 00000000 SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 752!+ 1073c000 SP_VS_OBJ_START: 0x1073c000 753!+ 08000001 SP_VS_PVT_MEM_PARAM: 0x8000001 754!+ 10cd7000 SP_VS_PVT_MEM_ADDR: 0x10cd7000 755!+ 00000001 SP_VS_LENGTH_REG: 1 756!+ 00340400 SP_FS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE } 757!+ 8000003e SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | 0x80000000 } 758!+ 7e420000 SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 759!+ 1073b000 SP_FS_OBJ_START: 0x1073b000 760!+ 08000001 SP_FS_PVT_MEM_PARAM: 0x8000001 761!+ 10cd9000 SP_FS_PVT_MEM_ADDR: 0x10cd9000 762!+ 00000001 SP_FS_LENGTH_REG: 1 763!+ 0000fc01 SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x } 764!+ 0001a000 SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM } 765 + 00000000 SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 } 766 + 00000000 SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 } 767 + 00000000 SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 } 768 + 00000000 SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 } 769 + 00000000 SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 } 770 + 00000000 SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 } 771 + 00000000 SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 } 772!+ 7e420000 SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 773!+ 7e420000 SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 774!+ 7e420000 SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 775 + 00000000 TPL1_TP_TEX_OFFSET: 0 776!+ 00000010 TPL1_TP_TEX_COUNT: { VS = 16 | HS = 0 | DS = 0 | GS = 0 } 777!+ 00000010 TPL1_TP_FS_TEX_COUNT: { FS = 16 | CS = 0 } 778!+ 28000250 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE } 779!+ fcfc0100 HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x } 780!+ fff3f3f0 HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x } 781!+ fcfcfcfc HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x } 782!+ 00fcfcfc HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 } 783!+ 01000042 HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 1 } 784!+ 017e423e HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 } 785!+ 007e4200 HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 786!+ 007e4200 HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 787!+ 007e4200 HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 788!+ 00000003 HLSQ_UPDATE_CONTROL: 0x3 789109ce45c: 0000: c0023800 00000888 00000001 00000002 790t0 write CP_SCRATCH[0x7].REG (057f) 791 CP_SCRATCH[0x7].REG: 0x3 792 :0,1,115,3 793109ce46c: 0000: 0000057f 00000003 794t0 write CP_SCRATCH[0x5].REG (057d) 795 CP_SCRATCH[0x5].REG: 0x7 796 :0,7,115,3 797109ce474: 0000: 0000057d 00000007 798t0 write RB_ALPHA_CONTROL (20f8) 799 RB_ALPHA_CONTROL: { ALPHA_REF = 0 | ALPHA_TEST_FUNC = FUNC_NEVER } 800109ce47c: 0000: 000020f8 00000000 801t0 write RB_STENCIL_CONTROL (2106) 802 RB_STENCIL_CONTROL: { FUNC = FUNC_NEVER | FAIL = STENCIL_KEEP | ZPASS = STENCIL_KEEP | ZFAIL = STENCIL_KEEP | FUNC_BF = FUNC_NEVER | FAIL_BF = STENCIL_KEEP | ZPASS_BF = STENCIL_KEEP | ZFAIL_BF = STENCIL_KEEP } 803 RB_STENCIL_CONTROL2: { 0 } 804109ce484: 0000: 00012106 00000000 00000000 805t0 write RB_STENCILREFMASK (210b) 806 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 807 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 808109ce490: 0000: 0001210b 00000000 00000000 809t0 write RB_DEPTH_CONTROL (2101) 810 RB_DEPTH_CONTROL: { Z_TEST_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_READ_ENABLE } 811109ce49c: 0000: 00002101 80000016 812t0 write GRAS_ALPHA_CONTROL (2073) 813 GRAS_ALPHA_CONTROL: { 0 } 814109ce4a4: 0000: 00002073 00000000 815t0 write GRAS_SU_MODE_CONTROL (2078) 816 GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS } 817109ce4ac: 0000: 00002078 00100012 818t0 write GRAS_SU_POINT_MINMAX (2070) 819 GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 } 820 GRAS_SU_POINT_SIZE: 1.000000 821109ce4b4: 0000: 00012070 00100010 00000010 822t0 write GRAS_SU_POLY_OFFSET_SCALE (2074) 823 GRAS_SU_POLY_OFFSET_SCALE: 0.000000 824 GRAS_SU_POLY_OFFSET_OFFSET: 0.000000 825 GRAS_SU_POLY_OFFSET_CLAMP: 0.000000 826109ce4c0: 0000: 00022074 00000000 00000000 00000000 827t0 write GRAS_CL_CLIP_CNTL (2000) 828 GRAS_CL_CLIP_CNTL: { 0x80000 } 829109ce4d0: 0000: 00002000 00080000 830t0 write PC_PRIM_VTX_CNTL (21c4) 831 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 832 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 833109ce4d8: 0000: 000121c4 02000001 00000012 834t0 write GRAS_SC_WINDOW_SCISSOR_BR (209c) 835 GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 } 836 GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 837109ce4e4: 0000: 0001209c 012b012b 00000000 838t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 839109ce4f0: 0000: c0002600 00000000 840t0 write GRAS_CL_VPORT_XOFFSET_0 (2008) 841 GRAS_CL_VPORT_XOFFSET_0: 150.000000 842 GRAS_CL_VPORT_XSCALE_0: 150.000000 843 GRAS_CL_VPORT_YOFFSET_0: 150.000000 844 GRAS_CL_VPORT_YSCALE_0: -150.000000 845 GRAS_CL_VPORT_ZOFFSET_0: 0.500000 846 GRAS_CL_VPORT_ZSCALE_0: 0.500000 847109ce4f8: 0000: 00052008 43160000 43160000 43160000 c3160000 3f000000 3f000000 848t0 write RB_VPORT_Z_CLAMP[0].MIN (2120) 849 RB_VPORT_Z_CLAMP[0].MIN: 0 850 RB_VPORT_Z_CLAMP[0].MAX: 0xffffff 851109ce514: 0000: 00012120 00000000 00ffffff 852t0 write HLSQ_UPDATE_CONTROL (23db) 853 HLSQ_UPDATE_CONTROL: 0x3 854109ce520: 0000: 000023db 00000003 855t0 write HLSQ_CONTROL_0_REG (23c0) 856 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE } 857 HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x } 858 HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x } 859 HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x } 860 HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 } 861109ce528: 0000: 000423c0 28000250 fcfc0100 fff3f3f0 fcfcfcfc 00fcfcfc 862t0 write HLSQ_VS_CONTROL_REG (23c5) 863 HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 } 864 HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 } 865 HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 866 HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 867 HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 868109ce540: 0000: 000423c5 04000042 017e423e 007e4200 007e4200 007e4200 869t0 write SP_SP_CTRL_REG (22c0) 870 SP_SP_CTRL_REG: { 0x140010 } 871109ce558: 0000: 000022c0 00140010 872t0 write SP_INSTR_CACHE_CTRL (22c1) 873 SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f } 874109ce560: 0000: 000022c1 000005ff 875t0 write SP_VS_LENGTH_REG (22e5) 876 SP_VS_LENGTH_REG: 4 877109ce568: 0000: 000022e5 00000004 878t0 write SP_VS_CTRL_REG0 (22c4) 879 SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 4 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE } 880 SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 4 } 881 SP_VS_PARAM_REG: { POSREGID = r1.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 } 882109ce570: 0000: 000222c4 00201000 04000042 0010fc06 883t0 write SP_VS_OUT[0].REG (22c7) 884 SP_VS_OUT[0].REG: { A_REGID = r2.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 } 885109ce580: 0000: 000022c7 00001e0a 886t0 write SP_VS_VPC_DST[0].REG (22d8) 887 SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 } 888109ce588: 0000: 000022d8 08080808 889t0 write SP_VS_OBJ_OFFSET_REG (22e0) 890 SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 891 SP_VS_OBJ_START: 0x10cd0000 892109ce590: 0000: 000122e0 00000000 10cd0000 893t0 write SP_FS_LENGTH_REG (22ef) 894 SP_FS_LENGTH_REG: 1 895109ce59c: 0000: 000022ef 00000001 896t0 write SP_FS_CTRL_REG0 (22e8) 897 SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE } 898 SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 } 899109ce5a4: 0000: 000122e8 00340402 8010003e 900t0 write SP_FS_OBJ_OFFSET_REG (22ea) 901 SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 902 SP_FS_OBJ_START: 0x10cd2000 903109ce5b0: 0000: 000122ea 7e420000 10cd2000 904t0 write SP_HS_OBJ_OFFSET_REG (230d) 905 SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 906109ce5bc: 0000: 0000230d 7e420000 907t0 write SP_DS_OBJ_OFFSET_REG (2334) 908 SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 909109ce5c4: 0000: 00002334 7e420000 910t0 write SP_GS_OBJ_OFFSET_REG (235b) 911 SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 912109ce5cc: 0000: 0000235b 7e420000 913t0 write GRAS_CNTL (2003) 914 GRAS_CNTL: { 0 } 915109ce5d4: 0000: 00002003 00000000 916t0 write RB_RENDER_CONTROL2 (20a3) 917 RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 } 918109ce5dc: 0000: 000020a3 00000000 919t0 write RB_FS_OUTPUT_REG (2100) 920 RB_FS_OUTPUT_REG: { MRT = 1 } 921109ce5e4: 0000: 00002100 00000001 922t0 write SP_FS_OUTPUT_REG (22f0) 923 SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x } 924109ce5ec: 0000: 000022f0 0000fc01 925t0 write SP_FS_MRT[0].REG (22f1) 926 SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM } 927 SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 } 928 SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 } 929 SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 } 930 SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 } 931 SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 } 932 SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 } 933 SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 } 934109ce5f4: 0000: 000722f1 0001a000 00000000 00000000 00000000 00000000 00000000 00000000 935* 936t0 write VPC_ATTR (2140) 937 VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 } 938 VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 } 939109ce618: 0000: 00012140 42001004 00040400 940t0 write VPC_VARYING_INTERP[0].MODE (2142) 941 VPC_VARYING_INTERP[0].MODE: 0x55 942 VPC_VARYING_INTERP[0x1].MODE: 0 943 VPC_VARYING_INTERP[0x2].MODE: 0 944 VPC_VARYING_INTERP[0x3].MODE: 0 945 VPC_VARYING_INTERP[0x4].MODE: 0 946 VPC_VARYING_INTERP[0x5].MODE: 0 947 VPC_VARYING_INTERP[0x6].MODE: 0 948 VPC_VARYING_INTERP[0x7].MODE: 0 949109ce624: 0000: 00072142 00000055 00000000 00000000 00000000 00000000 00000000 00000000 950* 951t0 write VPC_VARYING_PS_REPL[0].MODE (214a) 952 VPC_VARYING_PS_REPL[0].MODE: 0 953 VPC_VARYING_PS_REPL[0x1].MODE: 0 954 VPC_VARYING_PS_REPL[0x2].MODE: 0 955 VPC_VARYING_PS_REPL[0x3].MODE: 0 956 VPC_VARYING_PS_REPL[0x4].MODE: 0 957 VPC_VARYING_PS_REPL[0x5].MODE: 0 958 VPC_VARYING_PS_REPL[0x6].MODE: 0 959 VPC_VARYING_PS_REPL[0x7].MODE: 0 960109ce648: 0000: 0007214a 00000000 00000000 00000000 00000000 00000000 00000000 00000000 961* 962t3 opcode: CP_LOAD_STATE4 (30) (131 dwords) 963 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 4 } 964 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 965 :2:0000:0000[40700000x_10000002x] mul.f r0.x, r0.z, c0.x 966 :2:0001:0001[40700001x_10030002x] mul.f r0.y, r0.z, c0.w 967 :3:0002:0002[63818000x_00001004x] mad.f32 r0.x, c1.x, r0.w, r0.x 968 :3:0003:0003[63818001x_00011007x] mad.f32 r0.y, c1.w, r0.w, r0.y 969 :3:0004:0004[63820000x_00001008x] mad.f32 r0.x, c2.x, r1.x, r0.x 970 :3:0005:0005[63820001x_0001100bx] mad.f32 r0.y, c2.w, r1.x, r0.y 971 :3:0006:0006[63828006x_0000100cx] mad.f32 r1.z, c3.x, r1.y, r0.x 972 :2:0007:0007[40700000x_10010002x] mul.f r0.x, r0.z, c0.y 973 :3:0008:0008[63828009x_0001100fx] mad.f32 r2.y, c3.w, r1.y, r0.y 974 :3:0009:0009[63818000x_00001005x] mad.f32 r0.x, c1.y, r0.w, r0.x 975 :1:0010:0010[20244001x_00000010x] mov.f32f32 r0.y, c4.x 976 :3:0011:0011[63820000x_00001009x] mad.f32 r0.x, c2.y, r1.x, r0.x 977 :0:0012:0012[00000000x_00000000x] nop 978 :3:0013:0013[63828007x_0000100dx] mad.f32 r1.w, c3.y, r1.y, r0.x 979 :2:0014:0014[40700000x_10020002x] mul.f r0.x, r0.z, c0.z 980 :1:0015:0015[20244002x_00000015x] mov.f32f32 r0.z, c5.y 981 :3:0016:0016[63818000x_00001006x] mad.f32 r0.x, c1.z, r0.w, r0.x 982 :1:0017:0017[20244003x_00000016x] mov.f32f32 r0.w, c5.z 983 :3:0018:0018[63820000x_0000100ax] mad.f32 r0.x, c2.z, r1.x, r0.x 984 :1:0019:0019[20244004x_00000017x] mov.f32f32 r1.x, c5.w 985 :3:0020:0020[63828008x_0000100ex] mad.f32 r2.x, c3.z, r1.y, r0.x 986 :1:0021:0021[20244000x_00000011x] mov.f32f32 r0.x, c4.y 987 :2:0022:0022[40100002x_00021021x] add.f r0.z, c8.y, r0.z 988 :2:0023:0023[4050040dx_00041017x] (sat)max.f r3.y, c5.w, r1.x 989 :2:0024:0024[40100003x_00031022x] add.f r0.w, c8.z, r0.w 990 :2:0025:0025[40700000x_00001011x] mul.f r0.x, c4.y, r0.x 991 :0:0026:0026[00000000x_00000000x] nop 992 :3:0027:0027[63808000x_00001010x] mad.f32 r0.x, c4.x, r0.y, r0.x 993 :1:0028:0028[20244001x_00000012x] mov.f32f32 r0.y, c4.z 994 :0:0029:0029[00000200x_00000000x] (rpt2)nop 995 :3:0030:0032[63808000x_00001012x] mad.f32 r0.x, c4.z, r0.y, r0.x 996 :1:0031:0033[20244001x_00000014x] mov.f32f32 r0.y, c5.x 997 :0:0032:0034[00000200x_00000000x] (rpt2)nop 998 :2:0033:0037[40100001x_00011020x] add.f r0.y, c8.x, r0.y 999 :0:0034:0038[00000000x_00000000x] nop 1000 :4:0035:0039[80300000x_00000000x] rsq r0.x, r0.x 1001 :2:0036:0040[40701004x_00001011x] (ss)mul.f r1.x, c4.y, r0.x 1002 :0:0037:0041[00000200x_00000000x] (rpt2)nop 1003 :2:0038:0044[40700004x_10190004x] mul.f r1.x, r1.x, c6.y 1004 :2:0039:0045[40700005x_00001010x] mul.f r1.y, c4.x, r0.x 1005 :0:0040:0046[00000200x_00000000x] (rpt2)nop 1006 :3:0041:0049[63828004x_00041018x] mad.f32 r1.x, c6.x, r1.y, r1.x 1007 :2:0042:0050[40700000x_00001012x] mul.f r0.x, c4.z, r0.x 1008 :0:0043:0051[00000200x_00000000x] (rpt2)nop 1009 :3:0044:0054[63800000x_0004101ax] mad.f32 r0.x, c6.z, r0.x, r1.x 1010 :0:0045:0055[00000200x_00000000x] (rpt2)nop 1011 :2:0046:0058[40b00004x_00001034x] cmps.f.lt r1.x, c13.x, r0.x 1012 :2:0047:0059[40500000x_00001034x] max.f r0.x, c13.x, r0.x 1013 :0:0048:0060[00000100x_00000000x] (rpt1)nop 1014 :1:0049:0062[200c4004x_00000004x] cov.u32f32 r1.x, r1.x 1015 :3:0050:0063[63800001x_00011024x] mad.f32 r0.y, c9.x, r0.x, r0.y 1016 :3:0051:0064[63800002x_00021025x] mad.f32 r0.z, c9.y, r0.x, r0.z 1017 :3:0052:0065[63800000x_00031026x] mad.f32 r0.x, c9.z, r0.x, r0.w 1018 :3:0053:0066[6382040ax_00011028x] (sat)mad.f32 r2.z, c10.x, r1.x, r0.y 1019 :3:0054:0067[6382040bx_00021029x] (sat)mad.f32 r2.w, c10.y, r1.x, r0.z 1020 :3:0055:0068[6382040cx_0000102ax] (sat)mad.f32 r3.x, c10.z, r1.x, r0.x 1021 :0:0056:0069[03000000x_00000000x] end 1022 :0:0057:0070[00000000x_00000000x] nop 1023 :0:0058:0071[00000000x_00000000x] nop 1024 :0:0059:0072[00000000x_00000000x] nop 1025 :0:0060:0073[00000000x_00000000x] nop 1026 Stats: 1027 - shaderdb: 74 instr, 27 nops, 47 non-nops, 7 mov, 1 cov 1028 - shaderdb: 0 last-baryf, 0 half, 4 full, 13 constlen 1029 - shaderdb: 28 cat0, 8 cat1, 15 cat2, 22 cat3, 1 cat4, 0 cat5, 0 cat6, 0 cat7 1030 - shaderdb: 10 sstall, 1 (ss), 0 (sy) 1031109ce66c: 0000: c0813000 01200000 00000000 10000002 40700000 10030002 40700001 00001004 1032109ce68c: 0020: 63818000 00011007 63818001 00001008 63820000 0001100b 63820001 0000100c 1033109ce6ac: 0040: 63828006 10010002 40700000 0001100f 63828009 00001005 63818000 00000010 1034109ce6cc: 0060: 20244001 00001009 63820000 00000000 00000000 0000100d 63828007 10020002 1035109ce6ec: 0080: 40700000 00000015 20244002 00001006 63818000 00000016 20244003 0000100a 1036109ce70c: 00a0: 63820000 00000017 20244004 0000100e 63828008 00000011 20244000 00021021 1037109ce72c: 00c0: 40100002 00041017 4050040d 00031022 40100003 00001011 40700000 00000000 1038109ce74c: 00e0: 00000000 00001010 63808000 00000012 20244001 00000000 00000200 00001012 1039109ce76c: 0100: 63808000 00000014 20244001 00000000 00000200 00011020 40100001 00000000 1040109ce78c: 0120: 00000000 00000000 80300000 00001011 40701004 00000000 00000200 10190004 1041109ce7ac: 0140: 40700004 00001010 40700005 00000000 00000200 00041018 63828004 00001012 1042109ce7cc: 0160: 40700000 00000000 00000200 0004101a 63800000 00000000 00000200 00001034 1043109ce7ec: 0180: 40b00004 00001034 40500000 00000000 00000100 00000004 200c4004 00011024 1044109ce80c: 01a0: 63800001 00021025 63800002 00031026 63800000 00011028 6382040a 00021029 1045109ce82c: 01c0: 6382040b 0000102a 6382040c 00000000 03000000 00000000 00000000 00000000 1046* 1047t3 opcode: CP_LOAD_STATE4 (30) (35 dwords) 1048 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 1 } 1049 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 1050 :0:0000:0000[00000000x_00000000x] nop 1051 :6:0001:0001[c7c60000x_01c00000x] ldlv.u32 r0.x, l[0], 1 1052 :6:0002:0002[c7c60001x_01c00002x] ldlv.u32 r0.y, l[1], 1 1053 :6:0003:0003[c7c60002x_01c00004x] ldlv.u32 r0.z, l[2], 1 1054 :6:0004:0004[c7c60003x_01c00006x] ldlv.u32 r0.w, l[3], 1 1055 :2:0005:0005[473090fcx_00002000x] (ss)bary.f (ei)r63.x, 0, r0.x 1056 :0:0006:0006[03000000x_00000000x] end 1057 :0:0007:0007[00000000x_00000000x] nop 1058 :0:0008:0008[00000000x_00000000x] nop 1059 :0:0009:0009[00000000x_00000000x] nop 1060 :0:0010:0010[00000000x_00000000x] nop 1061 Stats: 1062 - shaderdb: 11 instr, 5 nops, 6 non-nops, 0 mov, 0 cov 1063 - shaderdb: 5 last-baryf, 0 half, 1 full, 0 constlen 1064 - shaderdb: 6 cat0, 0 cat1, 1 cat2, 0 cat3, 0 cat4, 0 cat5, 4 cat6, 0 cat7 1065 - shaderdb: 0 sstall, 1 (ss), 0 (sy) 1066109ce878: 0000: c0213000 00700000 00000000 00000000 00000000 01c00000 c7c60000 01c00002 1067109ce898: 0020: c7c60001 01c00004 c7c60002 01c00006 c7c60003 00002000 473090fc 00000000 1068109ce8b8: 0040: 03000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 1069* 1070t3 opcode: CP_LOAD_STATE4 (30) (51 dwords) 1071 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 } 1072 { STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 } 1073109ce910: 4.330127 0.855050 0.555273 0.469846 0.000000 4.698463 -0.404206 -0.342020 1074109ce930: 2.500000 -1.480991 -0.961761 -0.813798 -12.990380 -11.962078 35.506226 39.274502 1075109ce950: 0.000000 0.000000 1.000000 1.000000 0.160000 0.020000 0.000000 1.000000 1076109ce970: 0.039740 0.662886 0.747665 0.000000 1.000000 0.000000 0.000000 0.000000 1077109ce990: 0.000000 0.000000 0.000000 1.000000 0.800000 0.100000 0.000000 1.000000 1078109ce9b0: 0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 1.000000 1079109ce910: 0000: 408a9066 3f5ae494 3f0e265d 3ef08fb2 00000000 409659cf becef409 beaf1d43 1080109ce930: 0020: 40200000 bfbd9119 bf7635f5 bf50550b c14fd899 c13f64ac 420e0660 421d1917 1081109ce950: 0040: 00000000 00000000 3f800000 3f800000 3e23d70b 3ca3d70b 00000000 3f800000 1082109ce970: 0060: 3d22c66e 3f29b2e7 3f3f66f5 00000000 3f800000 00000000 00000000 00000000 1083109ce990: 0080: 00000000 00000000 00000000 3f800000 3f4ccccd 3dcccccd 00000000 3f800000 1084109ce9b0: 00a0: 00000000 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000 1085109ce904: 0000: c0313000 03200000 00000001 408a9066 3f5ae494 3f0e265d 3ef08fb2 00000000 1086109ce924: 0020: 409659cf becef409 beaf1d43 40200000 bfbd9119 bf7635f5 bf50550b c14fd899 1087109ce944: 0040: c13f64ac 420e0660 421d1917 00000000 00000000 3f800000 3f800000 3e23d70b 1088109ce964: 0060: 3ca3d70b 00000000 3f800000 3d22c66e 3f29b2e7 3f3f66f5 00000000 3f800000 1089109ce984: 0080: 00000000 00000000 00000000 00000000 00000000 00000000 3f800000 3f4ccccd 1090109ce9a4: 00a0: 3dcccccd 00000000 3f800000 00000000 00000000 00000000 3f800000 00000000 1091109ce9c4: 00c0: 00000000 00000000 3f800000 1092t3 opcode: CP_LOAD_STATE4 (30) (7 dwords) 1093 { DST_OFF = 13 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 1 } 1094 { STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 } 1095109ce9dc: 0.000000 -28026765312.000000 -28026765312.000000 -28026765312.000000 1096109ce9dc: 0000: 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0 1097109ce9d0: 0000: c0053000 0060000d 00000001 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0 1098t0 write RB_MRT[0].CONTROL (20a4) 1099 RB_MRT[0].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf } 1100109ce9ec: 0000: 000020a4 0f000c00 1101t0 write RB_MRT[0].BLEND_CONTROL (20a8) 1102 RB_MRT[0].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 1103109ce9f4: 0000: 000020a8 00000000 1104t0 write RB_MRT[0x1].CONTROL (20a9) 1105 RB_MRT[0x1].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf } 1106109ce9fc: 0000: 000020a9 0f000c00 1107t0 write RB_MRT[0x1].BLEND_CONTROL (20ad) 1108 RB_MRT[0x1].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 1109109cea04: 0000: 000020ad 00000000 1110t0 write RB_MRT[0x2].CONTROL (20ae) 1111 RB_MRT[0x2].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf } 1112109cea0c: 0000: 000020ae 0f000c00 1113t0 write RB_MRT[0x2].BLEND_CONTROL (20b2) 1114 RB_MRT[0x2].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 1115109cea14: 0000: 000020b2 00000000 1116t0 write RB_MRT[0x3].CONTROL (20b3) 1117 RB_MRT[0x3].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf } 1118109cea1c: 0000: 000020b3 0f000c00 1119t0 write RB_MRT[0x3].BLEND_CONTROL (20b7) 1120 RB_MRT[0x3].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 1121109cea24: 0000: 000020b7 00000000 1122t0 write RB_MRT[0x4].CONTROL (20b8) 1123 RB_MRT[0x4].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf } 1124109cea2c: 0000: 000020b8 0f000c00 1125t0 write RB_MRT[0x4].BLEND_CONTROL (20bc) 1126 RB_MRT[0x4].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 1127109cea34: 0000: 000020bc 00000000 1128t0 write RB_MRT[0x5].CONTROL (20bd) 1129 RB_MRT[0x5].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf } 1130109cea3c: 0000: 000020bd 0f000c00 1131t0 write RB_MRT[0x5].BLEND_CONTROL (20c1) 1132 RB_MRT[0x5].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 1133109cea44: 0000: 000020c1 00000000 1134t0 write RB_MRT[0x6].CONTROL (20c2) 1135 RB_MRT[0x6].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf } 1136109cea4c: 0000: 000020c2 0f000c00 1137t0 write RB_MRT[0x6].BLEND_CONTROL (20c6) 1138 RB_MRT[0x6].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 1139109cea54: 0000: 000020c6 00000000 1140t0 write RB_MRT[0x7].CONTROL (20c7) 1141 RB_MRT[0x7].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf } 1142109cea5c: 0000: 000020c7 0f000c00 1143t0 write RB_MRT[0x7].BLEND_CONTROL (20cb) 1144 RB_MRT[0x7].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 1145109cea64: 0000: 000020cb 00000000 1146t0 write RB_FS_OUTPUT (20f9) 1147 RB_FS_OUTPUT: { ENABLE_BLEND = 0 | SAMPLE_MASK = 0xffff } 1148109cea6c: 0000: 000020f9 ffff0000 1149t0 write VFD_FETCH[0].INSTR_0 (220a) 1150 VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 12 } 1151 VFD_FETCH[0].INSTR_1: 0x107cb000 1152 VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 } 1153 VFD_FETCH[0].INSTR_3: { STEPRATE = 1 } 1154109cea74: 0000: 0003220a 0000060b 107cb000 00100000 00000001 1155t0 write VFD_DECODE[0].INSTR (228a) 1156 VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID } 1157109cea88: 0000: 0000228a 2c0020df 1158t0 write VFD_CONTROL_0 (2200) 1159 VFD_CONTROL_0: { TOTALATTRTOVS = 4 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 1 | STRMFETCHINSTRCNT = 1 | 0xa0000 } 1160 VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x } 1161 VFD_CONTROL_2: 0 1162 VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x } 1163 VFD_CONTROL_4: 0 1164109cea90: 0000: 00042200 041a0004 fcfc0081 00000000 0000fc00 00000000 1165t0 write UCHE_INVALIDATE0 (0e8a) 1166 UCHE_INVALIDATE0: 0 1167 UCHE_INVALIDATE1: 0x12 1168109ceaa8: 0000: 00010e8a 00000000 00000012 1169t0 write VFD_INDEX_OFFSET (2208) 1170 VFD_INDEX_OFFSET: 0 1171 UNKNOWN_2209: 0 1172109ceab4: 0000: 00012208 00000000 00000000 1173t0 write PC_RESTART_INDEX (21c6) 1174 PC_RESTART_INDEX: 0xffffffff 1175109ceac0: 0000: 000021c6 ffffffff 1176t0 write CP_SCRATCH[0x7].REG (057f) 1177 CP_SCRATCH[0x7].REG: 0x8 1178 :0,7,115,8 1179109ceac8: 0000: 0000057f 00000008 1180t3 opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords) 1181 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS } 1182 { NUM_INSTANCES = 1 } 1183 { NUM_INDICES = 240 } 1184 { FIRST_INDX = 0 } 1185 { INDX_BASE = 0x10bd0000 } 1186 { INDX_SIZE = 480 } 1187 draw[1] register values 1188!+ 00000007 CP_SCRATCH[0x5].REG: 0x7 1189 :0,7,115,8 1190!+ 00000008 CP_SCRATCH[0x7].REG: 0x8 1191 :0,7,115,8 1192 + 00000000 UCHE_INVALIDATE0: 0 1193 + 00000012 UCHE_INVALIDATE1: 0x12 1194 + 00080000 GRAS_CL_CLIP_CNTL: { 0x80000 } 1195 + 00000000 GRAS_CNTL: { 0 } 1196 + 43160000 GRAS_CL_VPORT_XOFFSET_0: 150.000000 1197 + 43160000 GRAS_CL_VPORT_XSCALE_0: 150.000000 1198 + 43160000 GRAS_CL_VPORT_YOFFSET_0: 150.000000 1199 + c3160000 GRAS_CL_VPORT_YSCALE_0: -150.000000 1200!+ 3f000000 GRAS_CL_VPORT_ZOFFSET_0: 0.500000 1201!+ 3f000000 GRAS_CL_VPORT_ZSCALE_0: 0.500000 1202!+ 00100010 GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 } 1203!+ 00000010 GRAS_SU_POINT_SIZE: 1.000000 1204 + 00000000 GRAS_ALPHA_CONTROL: { 0 } 1205 + 00000000 GRAS_SU_POLY_OFFSET_SCALE: 0.000000 1206 + 00000000 GRAS_SU_POLY_OFFSET_OFFSET: 0.000000 1207 + 00000000 GRAS_SU_POLY_OFFSET_CLAMP: 0.000000 1208!+ 00100012 GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS } 1209 + 012b012b GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 } 1210 + 00000000 GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 1211 + 00000000 RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 } 1212 + 0f000c00 RB_MRT[0].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf } 1213 + 00000000 RB_MRT[0].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 1214!+ 0f000c00 RB_MRT[0x1].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf } 1215 + 00000000 RB_MRT[0x1].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 1216!+ 0f000c00 RB_MRT[0x2].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf } 1217 + 00000000 RB_MRT[0x2].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 1218!+ 0f000c00 RB_MRT[0x3].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf } 1219 + 00000000 RB_MRT[0x3].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 1220!+ 0f000c00 RB_MRT[0x4].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf } 1221 + 00000000 RB_MRT[0x4].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 1222!+ 0f000c00 RB_MRT[0x5].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf } 1223 + 00000000 RB_MRT[0x5].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 1224!+ 0f000c00 RB_MRT[0x6].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf } 1225 + 00000000 RB_MRT[0x6].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 1226!+ 0f000c00 RB_MRT[0x7].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf } 1227 + 00000000 RB_MRT[0x7].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO } 1228 + 00000000 RB_ALPHA_CONTROL: { ALPHA_REF = 0 | ALPHA_TEST_FUNC = FUNC_NEVER } 1229!+ ffff0000 RB_FS_OUTPUT: { ENABLE_BLEND = 0 | SAMPLE_MASK = 0xffff } 1230 + 00000001 RB_FS_OUTPUT_REG: { MRT = 1 } 1231!+ 80000016 RB_DEPTH_CONTROL: { Z_TEST_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_READ_ENABLE } 1232 + 00000000 RB_STENCIL_CONTROL: { FUNC = FUNC_NEVER | FAIL = STENCIL_KEEP | ZPASS = STENCIL_KEEP | ZFAIL = STENCIL_KEEP | FUNC_BF = FUNC_NEVER | FAIL_BF = STENCIL_KEEP | ZPASS_BF = STENCIL_KEEP | ZFAIL_BF = STENCIL_KEEP } 1233 + 00000000 RB_STENCIL_CONTROL2: { 0 } 1234 + 00000000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 1235 + 00000000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 1236 + 00000000 RB_VPORT_Z_CLAMP[0].MIN: 0 1237 + 00ffffff RB_VPORT_Z_CLAMP[0].MAX: 0xffffff 1238!+ 42001004 VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 } 1239!+ 00040400 VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 } 1240!+ 00000055 VPC_VARYING_INTERP[0].MODE: 0x55 1241 + 00000000 VPC_VARYING_INTERP[0x1].MODE: 0 1242 + 00000000 VPC_VARYING_INTERP[0x2].MODE: 0 1243 + 00000000 VPC_VARYING_INTERP[0x3].MODE: 0 1244 + 00000000 VPC_VARYING_INTERP[0x4].MODE: 0 1245 + 00000000 VPC_VARYING_INTERP[0x5].MODE: 0 1246 + 00000000 VPC_VARYING_INTERP[0x6].MODE: 0 1247 + 00000000 VPC_VARYING_INTERP[0x7].MODE: 0 1248 + 00000000 VPC_VARYING_PS_REPL[0].MODE: 0 1249 + 00000000 VPC_VARYING_PS_REPL[0x1].MODE: 0 1250 + 00000000 VPC_VARYING_PS_REPL[0x2].MODE: 0 1251 + 00000000 VPC_VARYING_PS_REPL[0x3].MODE: 0 1252 + 00000000 VPC_VARYING_PS_REPL[0x4].MODE: 0 1253 + 00000000 VPC_VARYING_PS_REPL[0x5].MODE: 0 1254 + 00000000 VPC_VARYING_PS_REPL[0x6].MODE: 0 1255 + 00000000 VPC_VARYING_PS_REPL[0x7].MODE: 0 1256!+ 02000001 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 1257 + 00000012 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 1258 + ffffffff PC_RESTART_INDEX: 0xffffffff 1259 + 041a0004 VFD_CONTROL_0: { TOTALATTRTOVS = 4 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 1 | STRMFETCHINSTRCNT = 1 | 0xa0000 } 1260 + fcfc0081 VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x } 1261 + 00000000 VFD_CONTROL_2: 0 1262 + 0000fc00 VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x } 1263 + 00000000 VFD_CONTROL_4: 0 1264 + 00000000 VFD_INDEX_OFFSET: 0 1265 + 00000000 UNKNOWN_2209: 0 1266 + 0000060b VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 12 } 1267!+ 107cb000 VFD_FETCH[0].INSTR_1: 0x107cb000 1268!+ 00100000 VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 } 1269 + 00000001 VFD_FETCH[0].INSTR_3: { STEPRATE = 1 } 1270!+ 2c0020df VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID } 1271 + 00140010 SP_SP_CTRL_REG: { 0x140010 } 1272 + 000005ff SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f } 1273!+ 00201000 SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 4 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE } 1274 + 04000042 SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 4 } 1275!+ 0010fc06 SP_VS_PARAM_REG: { POSREGID = r1.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 } 1276!+ 00001e0a SP_VS_OUT[0].REG: { A_REGID = r2.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 } 1277!+ 08080808 SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 } 1278 + 00000000 SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 1279!+ 10cd0000 SP_VS_OBJ_START: 0x10cd0000 1280!+ 00000004 SP_VS_LENGTH_REG: 4 1281!+ 00340402 SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE } 1282!+ 8010003e SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 } 1283 + 7e420000 SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 1284!+ 10cd2000 SP_FS_OBJ_START: 0x10cd2000 1285 + 00000001 SP_FS_LENGTH_REG: 1 1286 + 0000fc01 SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x } 1287 + 0001a000 SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM } 1288 + 00000000 SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 } 1289 + 00000000 SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 } 1290 + 00000000 SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 } 1291 + 00000000 SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 } 1292 + 00000000 SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 } 1293 + 00000000 SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 } 1294 + 00000000 SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 } 1295 + 7e420000 SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 1296 + 7e420000 SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 1297 + 7e420000 SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 1298 + 28000250 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE } 1299 + fcfc0100 HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x } 1300 + fff3f3f0 HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x } 1301 + fcfcfcfc HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x } 1302 + 00fcfcfc HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 } 1303!+ 04000042 HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 } 1304 + 017e423e HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 } 1305 + 007e4200 HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 1306 + 007e4200 HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 1307 + 007e4200 HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 1308 + 00000003 HLSQ_UPDATE_CONTROL: 0x3 1309109cead0: 0000: c0053800 00000404 00000001 000000f0 00000000 10bd0000 000001e0 1310t0 write CP_SCRATCH[0x7].REG (057f) 1311 CP_SCRATCH[0x7].REG: 0x9 1312 :0,7,115,9 1313109ceaec: 0000: 0000057f 00000009 1314t0 write CP_SCRATCH[0x5].REG (057d) 1315 CP_SCRATCH[0x5].REG: 0xd 1316 :0,13,115,9 1317109ceaf4: 0000: 0000057d 0000000d 1318t0 write PC_PRIM_VTX_CNTL (21c4) 1319 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 1320 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 1321109ceafc: 0000: 000121c4 02000001 00000012 1322t0 write VFD_INDEX_OFFSET (2208) 1323 VFD_INDEX_OFFSET: 0 1324 UNKNOWN_2209: 0 1325109ceb08: 0000: 00012208 00000000 00000000 1326t0 write PC_RESTART_INDEX (21c6) 1327 PC_RESTART_INDEX: 0xffffffff 1328109ceb14: 0000: 000021c6 ffffffff 1329t0 write CP_SCRATCH[0x7].REG (057f) 1330 CP_SCRATCH[0x7].REG: 0xe 1331 :0,13,115,14 1332109ceb1c: 0000: 0000057f 0000000e 1333t3 opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords) 1334 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS } 1335 { NUM_INSTANCES = 1 } 1336 { NUM_INDICES = 120 } 1337 { FIRST_INDX = 0 } 1338 { INDX_BASE = 0x10bd01e0 } 1339 { INDX_SIZE = 240 } 1340 draw[2] register values 1341!+ 0000000d CP_SCRATCH[0x5].REG: 0xd 1342 :0,13,115,14 1343!+ 0000000e CP_SCRATCH[0x7].REG: 0xe 1344 :0,13,115,14 1345 + 02000001 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 1346 + 00000012 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 1347 + ffffffff PC_RESTART_INDEX: 0xffffffff 1348 + 00000000 VFD_INDEX_OFFSET: 0 1349 + 00000000 UNKNOWN_2209: 0 1350109ceb24: 0000: c0053800 00000404 00000001 00000078 00000000 10bd01e0 000000f0 1351t0 write CP_SCRATCH[0x7].REG (057f) 1352 CP_SCRATCH[0x7].REG: 0xf 1353 :0,13,115,15 1354109ceb40: 0000: 0000057f 0000000f 1355t0 write CP_SCRATCH[0x5].REG (057d) 1356 CP_SCRATCH[0x5].REG: 0x13 1357 :0,19,115,15 1358109ceb48: 0000: 0000057d 00000013 1359t0 write PC_PRIM_VTX_CNTL (21c4) 1360 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 1361 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 1362109ceb50: 0000: 000121c4 02000001 00000012 1363t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 1364109ceb5c: 0000: c0002600 00000000 1365t3 opcode: CP_LOAD_STATE4 (30) (51 dwords) 1366 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 } 1367 { STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 } 1368109ceb70: 4.330127 0.855050 0.555273 0.469846 0.000000 4.698463 -0.404206 -0.342020 1369109ceb90: 2.500000 -1.480991 -0.961761 -0.813798 -12.990380 -11.962078 35.506226 39.274502 1370109cebb0: 0.000000 0.000000 -1.000000 1.000000 0.160000 0.020000 0.000000 1.000000 1371109cebd0: 0.039740 0.662886 0.747665 0.000000 1.000000 0.000000 0.000000 0.000000 1372109cebf0: 0.000000 0.000000 0.000000 1.000000 0.800000 0.100000 0.000000 1.000000 1373109cec10: 0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 1.000000 1374109ceb70: 0000: 408a9066 3f5ae494 3f0e265d 3ef08fb2 00000000 409659cf becef409 beaf1d43 1375109ceb90: 0020: 40200000 bfbd9119 bf7635f5 bf50550b c14fd899 c13f64ac 420e0660 421d1917 1376109cebb0: 0040: 00000000 00000000 bf800000 3f800000 3e23d70b 3ca3d70b 00000000 3f800000 1377109cebd0: 0060: 3d22c66e 3f29b2e7 3f3f66f5 00000000 3f800000 00000000 00000000 00000000 1378109cebf0: 0080: 00000000 00000000 00000000 3f800000 3f4ccccd 3dcccccd 00000000 3f800000 1379109cec10: 00a0: 00000000 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000 1380109ceb64: 0000: c0313000 03200000 00000001 408a9066 3f5ae494 3f0e265d 3ef08fb2 00000000 1381109ceb84: 0020: 409659cf becef409 beaf1d43 40200000 bfbd9119 bf7635f5 bf50550b c14fd899 1382109ceba4: 0040: c13f64ac 420e0660 421d1917 00000000 00000000 bf800000 3f800000 3e23d70b 1383109cebc4: 0060: 3ca3d70b 00000000 3f800000 3d22c66e 3f29b2e7 3f3f66f5 00000000 3f800000 1384109cebe4: 0080: 00000000 00000000 00000000 00000000 00000000 00000000 3f800000 3f4ccccd 1385109cec04: 00a0: 3dcccccd 00000000 3f800000 00000000 00000000 00000000 3f800000 00000000 1386109cec24: 00c0: 00000000 00000000 3f800000 1387t0 write VFD_INDEX_OFFSET (2208) 1388 VFD_INDEX_OFFSET: 0 1389 UNKNOWN_2209: 0 1390109cec30: 0000: 00012208 00000000 00000000 1391t0 write PC_RESTART_INDEX (21c6) 1392 PC_RESTART_INDEX: 0xffffffff 1393109cec3c: 0000: 000021c6 ffffffff 1394t0 write CP_SCRATCH[0x7].REG (057f) 1395 CP_SCRATCH[0x7].REG: 0x14 1396 :0,19,115,20 1397109cec44: 0000: 0000057f 00000014 1398t3 opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords) 1399 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS } 1400 { NUM_INSTANCES = 1 } 1401 { NUM_INDICES = 240 } 1402 { FIRST_INDX = 0 } 1403 { INDX_BASE = 0x10bd02d0 } 1404 { INDX_SIZE = 480 } 1405 draw[3] register values 1406!+ 00000013 CP_SCRATCH[0x5].REG: 0x13 1407 :0,19,115,20 1408!+ 00000014 CP_SCRATCH[0x7].REG: 0x14 1409 :0,19,115,20 1410 + 02000001 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 1411 + 00000012 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 1412 + ffffffff PC_RESTART_INDEX: 0xffffffff 1413 + 00000000 VFD_INDEX_OFFSET: 0 1414 + 00000000 UNKNOWN_2209: 0 1415109cec4c: 0000: c0053800 00000404 00000001 000000f0 00000000 10bd02d0 000001e0 1416t0 write CP_SCRATCH[0x7].REG (057f) 1417 CP_SCRATCH[0x7].REG: 0x15 1418 :0,19,115,21 1419109cec68: 0000: 0000057f 00000015 1420t0 write CP_SCRATCH[0x5].REG (057d) 1421 CP_SCRATCH[0x5].REG: 0x19 1422 :0,25,115,21 1423109cec70: 0000: 0000057d 00000019 1424t0 write PC_PRIM_VTX_CNTL (21c4) 1425 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 1426 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 1427109cec78: 0000: 000121c4 02000001 00000012 1428t0 write VFD_INDEX_OFFSET (2208) 1429 VFD_INDEX_OFFSET: 0 1430 UNKNOWN_2209: 0 1431109cec84: 0000: 00012208 00000000 00000000 1432t0 write PC_RESTART_INDEX (21c6) 1433 PC_RESTART_INDEX: 0xffffffff 1434109cec90: 0000: 000021c6 ffffffff 1435t0 write CP_SCRATCH[0x7].REG (057f) 1436 CP_SCRATCH[0x7].REG: 0x1a 1437 :0,25,115,26 1438109cec98: 0000: 0000057f 0000001a 1439t3 opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords) 1440 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS } 1441 { NUM_INSTANCES = 1 } 1442 { NUM_INDICES = 120 } 1443 { FIRST_INDX = 0 } 1444 { INDX_BASE = 0x10bd04b0 } 1445 { INDX_SIZE = 240 } 1446 draw[4] register values 1447!+ 00000019 CP_SCRATCH[0x5].REG: 0x19 1448 :0,25,115,26 1449!+ 0000001a CP_SCRATCH[0x7].REG: 0x1a 1450 :0,25,115,26 1451 + 02000001 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 1452 + 00000012 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 1453 + ffffffff PC_RESTART_INDEX: 0xffffffff 1454 + 00000000 VFD_INDEX_OFFSET: 0 1455 + 00000000 UNKNOWN_2209: 0 1456109ceca0: 0000: c0053800 00000404 00000001 00000078 00000000 10bd04b0 000000f0 1457t0 write CP_SCRATCH[0x7].REG (057f) 1458 CP_SCRATCH[0x7].REG: 0x1b 1459 :0,25,115,27 1460109cecbc: 0000: 0000057f 0000001b 1461t0 write CP_SCRATCH[0x5].REG (057d) 1462 CP_SCRATCH[0x5].REG: 0x1f 1463 :0,31,115,27 1464109cecc4: 0000: 0000057d 0000001f 1465t0 write RB_DEPTH_CONTROL (2101) 1466 RB_DEPTH_CONTROL: { Z_TEST_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_READ_ENABLE } 1467109ceccc: 0000: 00002101 80000016 1468t0 write GRAS_ALPHA_CONTROL (2073) 1469 GRAS_ALPHA_CONTROL: { 0 } 1470109cecd4: 0000: 00002073 00000000 1471t0 write PC_PRIM_VTX_CNTL (21c4) 1472 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 1473 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 1474109cecdc: 0000: 000121c4 02000001 00000012 1475t0 write HLSQ_UPDATE_CONTROL (23db) 1476 HLSQ_UPDATE_CONTROL: 0x3 1477109cece8: 0000: 000023db 00000003 1478t0 write HLSQ_CONTROL_0_REG (23c0) 1479 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE } 1480 HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x } 1481 HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x } 1482 HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x } 1483 HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 } 1484109cecf0: 0000: 000423c0 28000250 fcfc0100 fff3f3f0 fcfcfcfc 00fcfcfc 1485t0 write HLSQ_VS_CONTROL_REG (23c5) 1486 HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 } 1487 HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 } 1488 HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 1489 HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 1490 HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 1491109ced08: 0000: 000423c5 04000042 017e423e 007e4200 007e4200 007e4200 1492t0 write SP_SP_CTRL_REG (22c0) 1493 SP_SP_CTRL_REG: { 0x140010 } 1494109ced20: 0000: 000022c0 00140010 1495t0 write SP_INSTR_CACHE_CTRL (22c1) 1496 SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f } 1497109ced28: 0000: 000022c1 000005ff 1498t0 write SP_VS_LENGTH_REG (22e5) 1499 SP_VS_LENGTH_REG: 4 1500109ced30: 0000: 000022e5 00000004 1501t0 write SP_VS_CTRL_REG0 (22c4) 1502 SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE } 1503 SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 } 1504 SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 } 1505109ced38: 0000: 000222c4 00201400 08000042 0010fc0a 1506t0 write SP_VS_OUT[0].REG (22c7) 1507 SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 } 1508109ced48: 0000: 000022c7 00001e0e 1509t0 write SP_VS_VPC_DST[0].REG (22d8) 1510 SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 } 1511109ced50: 0000: 000022d8 08080808 1512t0 write SP_VS_OBJ_OFFSET_REG (22e0) 1513 SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 1514 SP_VS_OBJ_START: 0x10cd5000 1515109ced58: 0000: 000122e0 00000000 10cd5000 1516t0 write SP_FS_LENGTH_REG (22ef) 1517 SP_FS_LENGTH_REG: 1 1518109ced64: 0000: 000022ef 00000001 1519t0 write SP_FS_CTRL_REG0 (22e8) 1520 SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE } 1521 SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 } 1522109ced6c: 0000: 000122e8 00340402 8010003e 1523t0 write SP_FS_OBJ_OFFSET_REG (22ea) 1524 SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 1525 SP_FS_OBJ_START: 0x10cd2000 1526109ced78: 0000: 000122ea 7e420000 10cd2000 1527t0 write SP_HS_OBJ_OFFSET_REG (230d) 1528 SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 1529109ced84: 0000: 0000230d 7e420000 1530t0 write SP_DS_OBJ_OFFSET_REG (2334) 1531 SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 1532109ced8c: 0000: 00002334 7e420000 1533t0 write SP_GS_OBJ_OFFSET_REG (235b) 1534 SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 1535109ced94: 0000: 0000235b 7e420000 1536t0 write GRAS_CNTL (2003) 1537 GRAS_CNTL: { 0 } 1538109ced9c: 0000: 00002003 00000000 1539t0 write RB_RENDER_CONTROL2 (20a3) 1540 RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 } 1541109ceda4: 0000: 000020a3 00000000 1542t0 write RB_FS_OUTPUT_REG (2100) 1543 RB_FS_OUTPUT_REG: { MRT = 1 } 1544109cedac: 0000: 00002100 00000001 1545t0 write SP_FS_OUTPUT_REG (22f0) 1546 SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x } 1547109cedb4: 0000: 000022f0 0000fc01 1548t0 write SP_FS_MRT[0].REG (22f1) 1549 SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM } 1550 SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 } 1551 SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 } 1552 SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 } 1553 SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 } 1554 SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 } 1555 SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 } 1556 SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 } 1557109cedbc: 0000: 000722f1 0001a000 00000000 00000000 00000000 00000000 00000000 00000000 1558* 1559t0 write VPC_ATTR (2140) 1560 VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 } 1561 VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 } 1562109cede0: 0000: 00012140 42001004 00040400 1563t0 write VPC_VARYING_INTERP[0].MODE (2142) 1564 VPC_VARYING_INTERP[0].MODE: 0x55 1565 VPC_VARYING_INTERP[0x1].MODE: 0 1566 VPC_VARYING_INTERP[0x2].MODE: 0 1567 VPC_VARYING_INTERP[0x3].MODE: 0 1568 VPC_VARYING_INTERP[0x4].MODE: 0 1569 VPC_VARYING_INTERP[0x5].MODE: 0 1570 VPC_VARYING_INTERP[0x6].MODE: 0 1571 VPC_VARYING_INTERP[0x7].MODE: 0 1572109cedec: 0000: 00072142 00000055 00000000 00000000 00000000 00000000 00000000 00000000 1573* 1574t0 write VPC_VARYING_PS_REPL[0].MODE (214a) 1575 VPC_VARYING_PS_REPL[0].MODE: 0 1576 VPC_VARYING_PS_REPL[0x1].MODE: 0 1577 VPC_VARYING_PS_REPL[0x2].MODE: 0 1578 VPC_VARYING_PS_REPL[0x3].MODE: 0 1579 VPC_VARYING_PS_REPL[0x4].MODE: 0 1580 VPC_VARYING_PS_REPL[0x5].MODE: 0 1581 VPC_VARYING_PS_REPL[0x6].MODE: 0 1582 VPC_VARYING_PS_REPL[0x7].MODE: 0 1583109cee10: 0000: 0007214a 00000000 00000000 00000000 00000000 00000000 00000000 00000000 1584* 1585t3 opcode: CP_LOAD_STATE4 (30) (131 dwords) 1586 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 4 } 1587 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 1588 :2:0000:0000[40700000x_10000002x] mul.f r0.x, r0.z, c0.x 1589 :2:0001:0001[40700001x_10030002x] mul.f r0.y, r0.z, c0.w 1590 :3:0002:0002[63818000x_00001004x] mad.f32 r0.x, c1.x, r0.w, r0.x 1591 :3:0003:0003[63818001x_00011007x] mad.f32 r0.y, c1.w, r0.w, r0.y 1592 :3:0004:0004[63820000x_00001008x] mad.f32 r0.x, c2.x, r1.x, r0.x 1593 :3:0005:0005[63820001x_0001100bx] mad.f32 r0.y, c2.w, r1.x, r0.y 1594 :3:0006:0006[6382800ax_0000100cx] mad.f32 r2.z, c3.x, r1.y, r0.x 1595 :2:0007:0007[40700000x_10010002x] mul.f r0.x, r0.z, c0.y 1596 :3:0008:0008[6382800dx_0001100fx] mad.f32 r3.y, c3.w, r1.y, r0.y 1597 :3:0009:0009[63818000x_00001005x] mad.f32 r0.x, c1.y, r0.w, r0.x 1598 :1:0010:0010[20244001x_00000010x] mov.f32f32 r0.y, c4.x 1599 :3:0011:0011[63820000x_00001009x] mad.f32 r0.x, c2.y, r1.x, r0.x 1600 :0:0012:0012[00000000x_00000000x] nop 1601 :3:0013:0013[6382800bx_0000100dx] mad.f32 r2.w, c3.y, r1.y, r0.x 1602 :2:0014:0014[40700000x_10020002x] mul.f r0.x, r0.z, c0.z 1603 :2:0015:0015[40100001x_0001101cx] add.f r0.y, c7.x, r0.y 1604 :3:0016:0016[63818000x_00001006x] mad.f32 r0.x, c1.z, r0.w, r0.x 1605 :1:0017:0017[20244002x_00000011x] mov.f32f32 r0.z, c4.y 1606 :3:0018:0018[63820000x_0000100ax] mad.f32 r0.x, c2.z, r1.x, r0.x 1607 :1:0019:0019[20244004x_00000013x] mov.f32f32 r1.x, c4.w 1608 :3:0020:0020[6382800cx_0000100ex] mad.f32 r3.x, c3.z, r1.y, r0.x 1609 :2:0021:0021[40700000x_00070007x] mul.f r0.x, r1.w, r1.w 1610 :2:0022:0022[40100002x_0002101dx] add.f r0.z, c7.y, r0.z 1611 :3:0023:0023[63830000x_00000006x] mad.f32 r0.x, r1.z, r1.z, r0.x 1612 :2:0024:0024[40500411x_00041013x] (sat)max.f r4.y, c4.w, r1.x 1613 :3:0025:0025[63840000x_00000008x] mad.f32 r0.x, r2.x, r2.x, r0.x 1614 :1:0026:0026[20244003x_00000012x] mov.f32f32 r0.w, c4.z 1615 :0:0027:0027[00000200x_00000000x] (rpt2)nop 1616 :2:0028:0030[40100003x_0003101ex] add.f r0.w, c7.z, r0.w 1617 :0:0029:0031[00000000x_00000000x] nop 1618 :4:0030:0032[80300000x_00000000x] rsq r0.x, r0.x 1619 :2:0031:0033[40701004x_00000007x] (ss)mul.f r1.x, r1.w, r0.x 1620 :0:0032:0034[00000200x_00000000x] (rpt2)nop 1621 :2:0033:0037[40700004x_10150004x] mul.f r1.x, r1.x, c5.y 1622 :2:0034:0038[40700005x_00000006x] mul.f r1.y, r1.z, r0.x 1623 :0:0035:0039[00000200x_00000000x] (rpt2)nop 1624 :3:0036:0042[63828004x_00041014x] mad.f32 r1.x, c5.x, r1.y, r1.x 1625 :2:0037:0043[40700000x_00000008x] mul.f r0.x, r2.x, r0.x 1626 :0:0038:0044[00000200x_00000000x] (rpt2)nop 1627 :3:0039:0047[63800000x_00041016x] mad.f32 r0.x, c5.z, r0.x, r1.x 1628 :0:0040:0048[00000200x_00000000x] (rpt2)nop 1629 :2:0041:0051[40b00004x_00001034x] cmps.f.lt r1.x, c13.x, r0.x 1630 :2:0042:0052[40500000x_00001034x] max.f r0.x, c13.x, r0.x 1631 :0:0043:0053[00000100x_00000000x] (rpt1)nop 1632 :1:0044:0055[200c4004x_00000004x] cov.u32f32 r1.x, r1.x 1633 :3:0045:0056[63800001x_00011020x] mad.f32 r0.y, c8.x, r0.x, r0.y 1634 :3:0046:0057[63800002x_00021021x] mad.f32 r0.z, c8.y, r0.x, r0.z 1635 :3:0047:0058[63800000x_00031022x] mad.f32 r0.x, c8.z, r0.x, r0.w 1636 :3:0048:0059[6382040ex_00011024x] (sat)mad.f32 r3.z, c9.x, r1.x, r0.y 1637 :3:0049:0060[6382040fx_00021025x] (sat)mad.f32 r3.w, c9.y, r1.x, r0.z 1638 :3:0050:0061[63820410x_00001026x] (sat)mad.f32 r4.x, c9.z, r1.x, r0.x 1639 :0:0051:0062[03000000x_00000000x] end 1640 :0:0052:0063[00000000x_00000000x] nop 1641 :0:0053:0064[00000000x_00000000x] nop 1642 :0:0054:0065[00000000x_00000000x] nop 1643 :0:0055:0066[00000000x_00000000x] nop 1644 Stats: 1645 - shaderdb: 67 instr, 23 nops, 44 non-nops, 4 mov, 1 cov 1646 - shaderdb: 0 last-baryf, 0 half, 5 full, 13 constlen 1647 - shaderdb: 24 cat0, 5 cat1, 15 cat2, 22 cat3, 1 cat4, 0 cat5, 0 cat6, 0 cat7 1648 - shaderdb: 10 sstall, 1 (ss), 0 (sy) 1649109cee34: 0000: c0813000 01200000 00000000 10000002 40700000 10030002 40700001 00001004 1650109cee54: 0020: 63818000 00011007 63818001 00001008 63820000 0001100b 63820001 0000100c 1651109cee74: 0040: 6382800a 10010002 40700000 0001100f 6382800d 00001005 63818000 00000010 1652109cee94: 0060: 20244001 00001009 63820000 00000000 00000000 0000100d 6382800b 10020002 1653109ceeb4: 0080: 40700000 0001101c 40100001 00001006 63818000 00000011 20244002 0000100a 1654109ceed4: 00a0: 63820000 00000013 20244004 0000100e 6382800c 00070007 40700000 0002101d 1655109ceef4: 00c0: 40100002 00000006 63830000 00041013 40500411 00000008 63840000 00000012 1656109cef14: 00e0: 20244003 00000000 00000200 0003101e 40100003 00000000 00000000 00000000 1657109cef34: 0100: 80300000 00000007 40701004 00000000 00000200 10150004 40700004 00000006 1658109cef54: 0120: 40700005 00000000 00000200 00041014 63828004 00000008 40700000 00000000 1659109cef74: 0140: 00000200 00041016 63800000 00000000 00000200 00001034 40b00004 00001034 1660109cef94: 0160: 40500000 00000000 00000100 00000004 200c4004 00011020 63800001 00021021 1661109cefb4: 0180: 63800002 00031022 63800000 00011024 6382040e 00021025 6382040f 00001026 1662109cefd4: 01a0: 63820410 00000000 03000000 00000000 00000000 00000000 00000000 00000000 1663* 1664t3 opcode: CP_LOAD_STATE4 (30) (35 dwords) 1665 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 1 } 1666 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 1667 :0:0000:0000[00000000x_00000000x] nop 1668 :6:0001:0001[c7c60000x_01c00000x] ldlv.u32 r0.x, l[0], 1 1669 :6:0002:0002[c7c60001x_01c00002x] ldlv.u32 r0.y, l[1], 1 1670 :6:0003:0003[c7c60002x_01c00004x] ldlv.u32 r0.z, l[2], 1 1671 :6:0004:0004[c7c60003x_01c00006x] ldlv.u32 r0.w, l[3], 1 1672 :2:0005:0005[473090fcx_00002000x] (ss)bary.f (ei)r63.x, 0, r0.x 1673 :0:0006:0006[03000000x_00000000x] end 1674 :0:0007:0007[00000000x_00000000x] nop 1675 :0:0008:0008[00000000x_00000000x] nop 1676 :0:0009:0009[00000000x_00000000x] nop 1677 :0:0010:0010[00000000x_00000000x] nop 1678 Stats: 1679 - shaderdb: 11 instr, 5 nops, 6 non-nops, 0 mov, 0 cov 1680 - shaderdb: 5 last-baryf, 0 half, 1 full, 0 constlen 1681 - shaderdb: 6 cat0, 0 cat1, 1 cat2, 0 cat3, 0 cat4, 0 cat5, 4 cat6, 0 cat7 1682 - shaderdb: 0 sstall, 1 (ss), 0 (sy) 1683109cf040: 0000: c0213000 00700000 00000000 00000000 00000000 01c00000 c7c60000 01c00002 1684109cf060: 0020: c7c60001 01c00004 c7c60002 01c00006 c7c60003 00002000 473090fc 00000000 1685109cf080: 0040: 03000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 1686* 1687t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 1688109cf0cc: 0000: c0002600 00000000 1689t3 opcode: CP_LOAD_STATE4 (30) (51 dwords) 1690 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 } 1691 { STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 } 1692109cf0e0: 4.330127 0.855050 0.555273 0.469846 0.000000 4.698463 -0.404206 -0.342020 1693109cf100: 2.500000 -1.480991 -0.961761 -0.813798 -12.990380 -11.962078 35.506226 39.274502 1694109cf120: 0.160000 0.020000 0.000000 1.000000 0.039740 0.662886 0.747665 0.000000 1695109cf140: 1.000000 0.000000 0.000000 0.000000 0.000000 0.000000 0.000000 1.000000 1696109cf160: 0.800000 0.100000 0.000000 1.000000 0.000000 0.000000 0.000000 1.000000 1697109cf180: 0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 0.000000 1698109cf0e0: 0000: 408a9066 3f5ae494 3f0e265d 3ef08fb2 00000000 409659cf becef409 beaf1d43 1699109cf100: 0020: 40200000 bfbd9119 bf7635f5 bf50550b c14fd899 c13f64ac 420e0660 421d1917 1700109cf120: 0040: 3e23d70b 3ca3d70b 00000000 3f800000 3d22c66e 3f29b2e7 3f3f66f5 00000000 1701109cf140: 0060: 3f800000 00000000 00000000 00000000 00000000 00000000 00000000 3f800000 1702109cf160: 0080: 3f4ccccd 3dcccccd 00000000 3f800000 00000000 00000000 00000000 3f800000 1703109cf180: 00a0: 00000000 00000000 00000000 3f800000 02020000 02020202 02020202 00000202 1704109cf0d4: 0000: c0313000 03200000 00000001 408a9066 3f5ae494 3f0e265d 3ef08fb2 00000000 1705109cf0f4: 0020: 409659cf becef409 beaf1d43 40200000 bfbd9119 bf7635f5 bf50550b c14fd899 1706109cf114: 0040: c13f64ac 420e0660 421d1917 3e23d70b 3ca3d70b 00000000 3f800000 3d22c66e 1707109cf134: 0060: 3f29b2e7 3f3f66f5 00000000 3f800000 00000000 00000000 00000000 00000000 1708109cf154: 0080: 00000000 00000000 3f800000 3f4ccccd 3dcccccd 00000000 3f800000 00000000 1709109cf174: 00a0: 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000 02020000 1710109cf194: 00c0: 02020202 02020202 00000202 1711t3 opcode: CP_LOAD_STATE4 (30) (7 dwords) 1712 { DST_OFF = 13 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 1 } 1713 { STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 } 1714109cf1ac: 0.000000 -28026765312.000000 -28026765312.000000 -28026765312.000000 1715109cf1ac: 0000: 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0 1716109cf1a0: 0000: c0053000 0060000d 00000001 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0 1717t0 write VFD_FETCH[0].INSTR_0 (220a) 1718 VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 | SWITCHNEXT } 1719 VFD_FETCH[0].INSTR_1: 0x107cb000 1720 VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 } 1721 VFD_FETCH[0].INSTR_3: { STEPRATE = 1 } 1722109cf1bc: 0000: 0003220a 00080c0b 107cb000 00100000 00000001 1723t0 write VFD_DECODE[0].INSTR (228a) 1724 VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID | SWITCHNEXT } 1725109cf1d0: 0000: 0000228a 6c0020df 1726t0 write VFD_FETCH[0x1].INSTR_0 (220e) 1727 VFD_FETCH[0x1].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 } 1728 VFD_FETCH[0x1].INSTR_1: 0x107cb00c 1729 VFD_FETCH[0x1].INSTR_2: { SIZE = 0xffff4 } 1730 VFD_FETCH[0x1].INSTR_3: { STEPRATE = 1 } 1731109cf1d8: 0000: 0003220e 00000c0b 107cb00c 000ffff4 00000001 1732t0 write VFD_DECODE[0x1].INSTR (228b) 1733 VFD_DECODE[0x1].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r1.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID } 1734109cf1ec: 0000: 0000228b 2c0060df 1735t0 write VFD_CONTROL_0 (2200) 1736 VFD_CONTROL_0: { TOTALATTRTOVS = 8 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 2 | STRMFETCHINSTRCNT = 2 | 0xa0000 } 1737 VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x } 1738 VFD_CONTROL_2: 0 1739 VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x } 1740 VFD_CONTROL_4: 0 1741109cf1f4: 0000: 00042200 082a0008 fcfc0081 00000000 0000fc00 00000000 1742t0 write UCHE_INVALIDATE0 (0e8a) 1743 UCHE_INVALIDATE0: 0 1744 UCHE_INVALIDATE1: 0x12 1745109cf20c: 0000: 00010e8a 00000000 00000012 1746t0 write VFD_INDEX_OFFSET (2208) 1747 VFD_INDEX_OFFSET: 0 1748 UNKNOWN_2209: 0 1749109cf218: 0000: 00012208 00000000 00000000 1750t0 write PC_RESTART_INDEX (21c6) 1751 PC_RESTART_INDEX: 0xffffffff 1752109cf224: 0000: 000021c6 ffffffff 1753t0 write CP_SCRATCH[0x7].REG (057f) 1754 CP_SCRATCH[0x7].REG: 0x20 1755 :0,31,115,32 1756109cf22c: 0000: 0000057f 00000020 1757t3 opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords) 1758 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS } 1759 { NUM_INSTANCES = 1 } 1760 { NUM_INDICES = 480 } 1761 { FIRST_INDX = 0 } 1762 { INDX_BASE = 0x10bd05a0 } 1763 { INDX_SIZE = 960 } 1764 draw[5] register values 1765!+ 0000001f CP_SCRATCH[0x5].REG: 0x1f 1766 :0,31,115,32 1767!+ 00000020 CP_SCRATCH[0x7].REG: 0x20 1768 :0,31,115,32 1769 + 00000000 UCHE_INVALIDATE0: 0 1770 + 00000012 UCHE_INVALIDATE1: 0x12 1771 + 00000000 GRAS_CNTL: { 0 } 1772 + 00000000 GRAS_ALPHA_CONTROL: { 0 } 1773 + 00000000 RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 } 1774 + 00000001 RB_FS_OUTPUT_REG: { MRT = 1 } 1775 + 80000016 RB_DEPTH_CONTROL: { Z_TEST_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_READ_ENABLE } 1776 + 42001004 VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 } 1777 + 00040400 VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 } 1778 + 00000055 VPC_VARYING_INTERP[0].MODE: 0x55 1779 + 00000000 VPC_VARYING_INTERP[0x1].MODE: 0 1780 + 00000000 VPC_VARYING_INTERP[0x2].MODE: 0 1781 + 00000000 VPC_VARYING_INTERP[0x3].MODE: 0 1782 + 00000000 VPC_VARYING_INTERP[0x4].MODE: 0 1783 + 00000000 VPC_VARYING_INTERP[0x5].MODE: 0 1784 + 00000000 VPC_VARYING_INTERP[0x6].MODE: 0 1785 + 00000000 VPC_VARYING_INTERP[0x7].MODE: 0 1786 + 00000000 VPC_VARYING_PS_REPL[0].MODE: 0 1787 + 00000000 VPC_VARYING_PS_REPL[0x1].MODE: 0 1788 + 00000000 VPC_VARYING_PS_REPL[0x2].MODE: 0 1789 + 00000000 VPC_VARYING_PS_REPL[0x3].MODE: 0 1790 + 00000000 VPC_VARYING_PS_REPL[0x4].MODE: 0 1791 + 00000000 VPC_VARYING_PS_REPL[0x5].MODE: 0 1792 + 00000000 VPC_VARYING_PS_REPL[0x6].MODE: 0 1793 + 00000000 VPC_VARYING_PS_REPL[0x7].MODE: 0 1794 + 02000001 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 1795 + 00000012 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 1796 + ffffffff PC_RESTART_INDEX: 0xffffffff 1797!+ 082a0008 VFD_CONTROL_0: { TOTALATTRTOVS = 8 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 2 | STRMFETCHINSTRCNT = 2 | 0xa0000 } 1798 + fcfc0081 VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x } 1799 + 00000000 VFD_CONTROL_2: 0 1800 + 0000fc00 VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x } 1801 + 00000000 VFD_CONTROL_4: 0 1802 + 00000000 VFD_INDEX_OFFSET: 0 1803 + 00000000 UNKNOWN_2209: 0 1804!+ 00080c0b VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 | SWITCHNEXT } 1805 + 107cb000 VFD_FETCH[0].INSTR_1: 0x107cb000 1806 + 00100000 VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 } 1807 + 00000001 VFD_FETCH[0].INSTR_3: { STEPRATE = 1 } 1808!+ 00000c0b VFD_FETCH[0x1].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 } 1809!+ 107cb00c VFD_FETCH[0x1].INSTR_1: 0x107cb00c 1810!+ 000ffff4 VFD_FETCH[0x1].INSTR_2: { SIZE = 0xffff4 } 1811!+ 00000001 VFD_FETCH[0x1].INSTR_3: { STEPRATE = 1 } 1812!+ 6c0020df VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID | SWITCHNEXT } 1813!+ 2c0060df VFD_DECODE[0x1].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r1.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID } 1814 + 00140010 SP_SP_CTRL_REG: { 0x140010 } 1815 + 000005ff SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f } 1816!+ 00201400 SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE } 1817!+ 08000042 SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 } 1818!+ 0010fc0a SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 } 1819!+ 00001e0e SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 } 1820 + 08080808 SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 } 1821 + 00000000 SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 1822!+ 10cd5000 SP_VS_OBJ_START: 0x10cd5000 1823 + 00000004 SP_VS_LENGTH_REG: 4 1824 + 00340402 SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE } 1825 + 8010003e SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 } 1826 + 7e420000 SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 1827 + 10cd2000 SP_FS_OBJ_START: 0x10cd2000 1828 + 00000001 SP_FS_LENGTH_REG: 1 1829 + 0000fc01 SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x } 1830 + 0001a000 SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM } 1831 + 00000000 SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 } 1832 + 00000000 SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 } 1833 + 00000000 SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 } 1834 + 00000000 SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 } 1835 + 00000000 SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 } 1836 + 00000000 SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 } 1837 + 00000000 SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 } 1838 + 7e420000 SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 1839 + 7e420000 SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 1840 + 7e420000 SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 1841 + 28000250 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE } 1842 + fcfc0100 HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x } 1843 + fff3f3f0 HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x } 1844 + fcfcfcfc HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x } 1845 + 00fcfcfc HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 } 1846 + 04000042 HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 } 1847 + 017e423e HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 } 1848 + 007e4200 HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 1849 + 007e4200 HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 1850 + 007e4200 HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 1851 + 00000003 HLSQ_UPDATE_CONTROL: 0x3 1852109cf234: 0000: c0053800 00000404 00000001 000001e0 00000000 10bd05a0 000003c0 1853t0 write CP_SCRATCH[0x7].REG (057f) 1854 CP_SCRATCH[0x7].REG: 0x21 1855 :0,31,115,33 1856109cf250: 0000: 0000057f 00000021 1857t0 write CP_SCRATCH[0x5].REG (057d) 1858 CP_SCRATCH[0x5].REG: 0x25 1859 :0,37,115,33 1860109cf258: 0000: 0000057d 00000025 1861t0 write RB_DEPTH_CONTROL (2101) 1862 RB_DEPTH_CONTROL: { Z_TEST_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_READ_ENABLE } 1863109cf260: 0000: 00002101 80000016 1864t0 write GRAS_ALPHA_CONTROL (2073) 1865 GRAS_ALPHA_CONTROL: { 0 } 1866109cf268: 0000: 00002073 00000000 1867t0 write GRAS_SU_MODE_CONTROL (2078) 1868 GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS } 1869109cf270: 0000: 00002078 00100012 1870t0 write GRAS_SU_POINT_MINMAX (2070) 1871 GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 } 1872 GRAS_SU_POINT_SIZE: 1.000000 1873109cf278: 0000: 00012070 00100010 00000010 1874t0 write GRAS_SU_POLY_OFFSET_SCALE (2074) 1875 GRAS_SU_POLY_OFFSET_SCALE: 0.000000 1876 GRAS_SU_POLY_OFFSET_OFFSET: 0.000000 1877 GRAS_SU_POLY_OFFSET_CLAMP: 0.000000 1878109cf284: 0000: 00022074 00000000 00000000 00000000 1879t0 write GRAS_CL_CLIP_CNTL (2000) 1880 GRAS_CL_CLIP_CNTL: { 0x80000 } 1881109cf294: 0000: 00002000 00080000 1882t0 write PC_PRIM_VTX_CNTL (21c4) 1883 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 1884 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 1885109cf29c: 0000: 000121c4 02000001 00000012 1886t0 write GRAS_SC_WINDOW_SCISSOR_BR (209c) 1887 GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 } 1888 GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 1889109cf2a8: 0000: 0001209c 012b012b 00000000 1890t0 write RB_VPORT_Z_CLAMP[0].MIN (2120) 1891 RB_VPORT_Z_CLAMP[0].MIN: 0 1892 RB_VPORT_Z_CLAMP[0].MAX: 0xffffff 1893109cf2b4: 0000: 00012120 00000000 00ffffff 1894t0 write HLSQ_UPDATE_CONTROL (23db) 1895 HLSQ_UPDATE_CONTROL: 0x3 1896109cf2c0: 0000: 000023db 00000003 1897t0 write HLSQ_CONTROL_0_REG (23c0) 1898 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE } 1899 HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x } 1900 HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x } 1901 HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r0.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x } 1902 HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 } 1903109cf2c8: 0000: 000423c0 28000250 fcfc0100 fff3f3f0 fcfcfc00 00fcfcfc 1904t0 write HLSQ_VS_CONTROL_REG (23c5) 1905 HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 } 1906 HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 } 1907 HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 1908 HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 1909 HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 1910109cf2e0: 0000: 000423c5 04000042 017e423e 007e4200 007e4200 007e4200 1911t0 write SP_SP_CTRL_REG (22c0) 1912 SP_SP_CTRL_REG: { 0x140010 } 1913109cf2f8: 0000: 000022c0 00140010 1914t0 write SP_INSTR_CACHE_CTRL (22c1) 1915 SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f } 1916109cf300: 0000: 000022c1 000005ff 1917t0 write SP_VS_LENGTH_REG (22e5) 1918 SP_VS_LENGTH_REG: 4 1919109cf308: 0000: 000022e5 00000004 1920t0 write SP_VS_CTRL_REG0 (22c4) 1921 SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE } 1922 SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 } 1923 SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 } 1924109cf310: 0000: 000222c4 00201400 08000042 0010fc0a 1925t0 write SP_VS_OUT[0].REG (22c7) 1926 SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 } 1927109cf320: 0000: 000022c7 00001e0e 1928t0 write SP_VS_VPC_DST[0].REG (22d8) 1929 SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 } 1930109cf328: 0000: 000022d8 08080808 1931t0 write SP_VS_OBJ_OFFSET_REG (22e0) 1932 SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 1933 SP_VS_OBJ_START: 0x10cd5000 1934109cf330: 0000: 000122e0 00000000 10cd5000 1935t0 write SP_FS_LENGTH_REG (22ef) 1936 SP_FS_LENGTH_REG: 1 1937109cf33c: 0000: 000022ef 00000001 1938t0 write SP_FS_CTRL_REG0 (22e8) 1939 SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 2 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE } 1940 SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 } 1941109cf344: 0000: 000122e8 00340802 8010003e 1942t0 write SP_FS_OBJ_OFFSET_REG (22ea) 1943 SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 1944 SP_FS_OBJ_START: 0x108cb000 1945109cf350: 0000: 000122ea 7e420000 108cb000 1946t0 write SP_HS_OBJ_OFFSET_REG (230d) 1947 SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 1948109cf35c: 0000: 0000230d 7e420000 1949t0 write SP_DS_OBJ_OFFSET_REG (2334) 1950 SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 1951109cf364: 0000: 00002334 7e420000 1952t0 write SP_GS_OBJ_OFFSET_REG (235b) 1953 SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 1954109cf36c: 0000: 0000235b 7e420000 1955t0 write GRAS_CNTL (2003) 1956 GRAS_CNTL: { IJ_PERSP } 1957109cf374: 0000: 00002003 00000001 1958t0 write RB_RENDER_CONTROL2 (20a3) 1959 RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 | IJ_PERSP_PIXEL } 1960109cf37c: 0000: 000020a3 00001000 1961t0 write RB_FS_OUTPUT_REG (2100) 1962 RB_FS_OUTPUT_REG: { MRT = 1 } 1963109cf384: 0000: 00002100 00000001 1964t0 write SP_FS_OUTPUT_REG (22f0) 1965 SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x } 1966109cf38c: 0000: 000022f0 0000fc01 1967t0 write SP_FS_MRT[0].REG (22f1) 1968 SP_FS_MRT[0].REG: { REGID = r0.z | MRTFORMAT = RB4_R8G8B8A8_UNORM } 1969 SP_FS_MRT[0x1].REG: { REGID = r0.z | MRTFORMAT = 0 } 1970 SP_FS_MRT[0x2].REG: { REGID = r0.z | MRTFORMAT = 0 } 1971 SP_FS_MRT[0x3].REG: { REGID = r0.z | MRTFORMAT = 0 } 1972 SP_FS_MRT[0x4].REG: { REGID = r0.z | MRTFORMAT = 0 } 1973 SP_FS_MRT[0x5].REG: { REGID = r0.z | MRTFORMAT = 0 } 1974 SP_FS_MRT[0x6].REG: { REGID = r0.z | MRTFORMAT = 0 } 1975 SP_FS_MRT[0x7].REG: { REGID = r0.z | MRTFORMAT = 0 } 1976109cf394: 0000: 000722f1 0001a002 00000002 00000002 00000002 00000002 00000002 00000002 1977109cf3b4: 0020: 00000002 1978t0 write VPC_ATTR (2140) 1979 VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 } 1980 VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 } 1981109cf3b8: 0000: 00012140 42001004 00040400 1982t0 write VPC_VARYING_INTERP[0].MODE (2142) 1983 VPC_VARYING_INTERP[0].MODE: 0 1984 VPC_VARYING_INTERP[0x1].MODE: 0 1985 VPC_VARYING_INTERP[0x2].MODE: 0 1986 VPC_VARYING_INTERP[0x3].MODE: 0 1987 VPC_VARYING_INTERP[0x4].MODE: 0 1988 VPC_VARYING_INTERP[0x5].MODE: 0 1989 VPC_VARYING_INTERP[0x6].MODE: 0 1990 VPC_VARYING_INTERP[0x7].MODE: 0 1991109cf3c4: 0000: 00072142 00000000 00000000 00000000 00000000 00000000 00000000 00000000 1992* 1993t0 write VPC_VARYING_PS_REPL[0].MODE (214a) 1994 VPC_VARYING_PS_REPL[0].MODE: 0 1995 VPC_VARYING_PS_REPL[0x1].MODE: 0 1996 VPC_VARYING_PS_REPL[0x2].MODE: 0 1997 VPC_VARYING_PS_REPL[0x3].MODE: 0 1998 VPC_VARYING_PS_REPL[0x4].MODE: 0 1999 VPC_VARYING_PS_REPL[0x5].MODE: 0 2000 VPC_VARYING_PS_REPL[0x6].MODE: 0 2001 VPC_VARYING_PS_REPL[0x7].MODE: 0 2002109cf3e8: 0000: 0007214a 00000000 00000000 00000000 00000000 00000000 00000000 00000000 2003* 2004t3 opcode: CP_LOAD_STATE4 (30) (131 dwords) 2005 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 4 } 2006 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 2007 :2:0000:0000[40700000x_10000002x] mul.f r0.x, r0.z, c0.x 2008 :2:0001:0001[40700001x_10030002x] mul.f r0.y, r0.z, c0.w 2009 :3:0002:0002[63818000x_00001004x] mad.f32 r0.x, c1.x, r0.w, r0.x 2010 :3:0003:0003[63818001x_00011007x] mad.f32 r0.y, c1.w, r0.w, r0.y 2011 :3:0004:0004[63820000x_00001008x] mad.f32 r0.x, c2.x, r1.x, r0.x 2012 :3:0005:0005[63820001x_0001100bx] mad.f32 r0.y, c2.w, r1.x, r0.y 2013 :3:0006:0006[6382800ax_0000100cx] mad.f32 r2.z, c3.x, r1.y, r0.x 2014 :2:0007:0007[40700000x_10010002x] mul.f r0.x, r0.z, c0.y 2015 :3:0008:0008[6382800dx_0001100fx] mad.f32 r3.y, c3.w, r1.y, r0.y 2016 :3:0009:0009[63818000x_00001005x] mad.f32 r0.x, c1.y, r0.w, r0.x 2017 :1:0010:0010[20244001x_00000010x] mov.f32f32 r0.y, c4.x 2018 :3:0011:0011[63820000x_00001009x] mad.f32 r0.x, c2.y, r1.x, r0.x 2019 :0:0012:0012[00000000x_00000000x] nop 2020 :3:0013:0013[6382800bx_0000100dx] mad.f32 r2.w, c3.y, r1.y, r0.x 2021 :2:0014:0014[40700000x_10020002x] mul.f r0.x, r0.z, c0.z 2022 :2:0015:0015[40100001x_0001101cx] add.f r0.y, c7.x, r0.y 2023 :3:0016:0016[63818000x_00001006x] mad.f32 r0.x, c1.z, r0.w, r0.x 2024 :1:0017:0017[20244002x_00000011x] mov.f32f32 r0.z, c4.y 2025 :3:0018:0018[63820000x_0000100ax] mad.f32 r0.x, c2.z, r1.x, r0.x 2026 :1:0019:0019[20244004x_00000013x] mov.f32f32 r1.x, c4.w 2027 :3:0020:0020[6382800cx_0000100ex] mad.f32 r3.x, c3.z, r1.y, r0.x 2028 :2:0021:0021[40700000x_00070007x] mul.f r0.x, r1.w, r1.w 2029 :2:0022:0022[40100002x_0002101dx] add.f r0.z, c7.y, r0.z 2030 :3:0023:0023[63830000x_00000006x] mad.f32 r0.x, r1.z, r1.z, r0.x 2031 :2:0024:0024[40500411x_00041013x] (sat)max.f r4.y, c4.w, r1.x 2032 :3:0025:0025[63840000x_00000008x] mad.f32 r0.x, r2.x, r2.x, r0.x 2033 :1:0026:0026[20244003x_00000012x] mov.f32f32 r0.w, c4.z 2034 :0:0027:0027[00000200x_00000000x] (rpt2)nop 2035 :2:0028:0030[40100003x_0003101ex] add.f r0.w, c7.z, r0.w 2036 :0:0029:0031[00000000x_00000000x] nop 2037 :4:0030:0032[80300000x_00000000x] rsq r0.x, r0.x 2038 :2:0031:0033[40701004x_00000007x] (ss)mul.f r1.x, r1.w, r0.x 2039 :0:0032:0034[00000200x_00000000x] (rpt2)nop 2040 :2:0033:0037[40700004x_10150004x] mul.f r1.x, r1.x, c5.y 2041 :2:0034:0038[40700005x_00000006x] mul.f r1.y, r1.z, r0.x 2042 :0:0035:0039[00000200x_00000000x] (rpt2)nop 2043 :3:0036:0042[63828004x_00041014x] mad.f32 r1.x, c5.x, r1.y, r1.x 2044 :2:0037:0043[40700000x_00000008x] mul.f r0.x, r2.x, r0.x 2045 :0:0038:0044[00000200x_00000000x] (rpt2)nop 2046 :3:0039:0047[63800000x_00041016x] mad.f32 r0.x, c5.z, r0.x, r1.x 2047 :0:0040:0048[00000200x_00000000x] (rpt2)nop 2048 :2:0041:0051[40b00004x_00001034x] cmps.f.lt r1.x, c13.x, r0.x 2049 :2:0042:0052[40500000x_00001034x] max.f r0.x, c13.x, r0.x 2050 :0:0043:0053[00000100x_00000000x] (rpt1)nop 2051 :1:0044:0055[200c4004x_00000004x] cov.u32f32 r1.x, r1.x 2052 :3:0045:0056[63800001x_00011020x] mad.f32 r0.y, c8.x, r0.x, r0.y 2053 :3:0046:0057[63800002x_00021021x] mad.f32 r0.z, c8.y, r0.x, r0.z 2054 :3:0047:0058[63800000x_00031022x] mad.f32 r0.x, c8.z, r0.x, r0.w 2055 :3:0048:0059[6382040ex_00011024x] (sat)mad.f32 r3.z, c9.x, r1.x, r0.y 2056 :3:0049:0060[6382040fx_00021025x] (sat)mad.f32 r3.w, c9.y, r1.x, r0.z 2057 :3:0050:0061[63820410x_00001026x] (sat)mad.f32 r4.x, c9.z, r1.x, r0.x 2058 :0:0051:0062[03000000x_00000000x] end 2059 :0:0052:0063[00000000x_00000000x] nop 2060 :0:0053:0064[00000000x_00000000x] nop 2061 :0:0054:0065[00000000x_00000000x] nop 2062 :0:0055:0066[00000000x_00000000x] nop 2063 Stats: 2064 - shaderdb: 67 instr, 23 nops, 44 non-nops, 4 mov, 1 cov 2065 - shaderdb: 0 last-baryf, 0 half, 5 full, 13 constlen 2066 - shaderdb: 24 cat0, 5 cat1, 15 cat2, 22 cat3, 1 cat4, 0 cat5, 0 cat6, 0 cat7 2067 - shaderdb: 10 sstall, 1 (ss), 0 (sy) 2068109cf40c: 0000: c0813000 01200000 00000000 10000002 40700000 10030002 40700001 00001004 2069109cf42c: 0020: 63818000 00011007 63818001 00001008 63820000 0001100b 63820001 0000100c 2070109cf44c: 0040: 6382800a 10010002 40700000 0001100f 6382800d 00001005 63818000 00000010 2071109cf46c: 0060: 20244001 00001009 63820000 00000000 00000000 0000100d 6382800b 10020002 2072109cf48c: 0080: 40700000 0001101c 40100001 00001006 63818000 00000011 20244002 0000100a 2073109cf4ac: 00a0: 63820000 00000013 20244004 0000100e 6382800c 00070007 40700000 0002101d 2074109cf4cc: 00c0: 40100002 00000006 63830000 00041013 40500411 00000008 63840000 00000012 2075109cf4ec: 00e0: 20244003 00000000 00000200 0003101e 40100003 00000000 00000000 00000000 2076109cf50c: 0100: 80300000 00000007 40701004 00000000 00000200 10150004 40700004 00000006 2077109cf52c: 0120: 40700005 00000000 00000200 00041014 63828004 00000008 40700000 00000000 2078109cf54c: 0140: 00000200 00041016 63800000 00000000 00000200 00001034 40b00004 00001034 2079109cf56c: 0160: 40500000 00000000 00000100 00000004 200c4004 00011020 63800001 00021021 2080109cf58c: 0180: 63800002 00031022 63800000 00011024 6382040e 00021025 6382040f 00001026 2081109cf5ac: 01a0: 63820410 00000000 03000000 00000000 00000000 00000000 00000000 00000000 2082* 2083t3 opcode: CP_LOAD_STATE4 (30) (35 dwords) 2084 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 1 } 2085 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 2086 :2:0000:0000[47300002x_00002000x] bary.f r0.z, 0, r0.x 2087 :2:0001:0001[47300003x_00002001x] bary.f r0.w, 1, r0.x 2088 :2:0002:0002[47300004x_00002002x] bary.f r1.x, 2, r0.x 2089 :2:0003:0003[47308005x_00002003x] bary.f (ei)r1.y, 3, r0.x 2090 :0:0004:0004[03000000x_00000000x] end 2091 :0:0005:0005[00000000x_00000000x] nop 2092 :0:0006:0006[00000000x_00000000x] nop 2093 :0:0007:0007[00000000x_00000000x] nop 2094 :0:0008:0008[00000000x_00000000x] nop 2095 Stats: 2096 - shaderdb: 9 instr, 4 nops, 5 non-nops, 0 mov, 0 cov 2097 - shaderdb: 3 last-baryf, 0 half, 2 full, 0 constlen 2098 - shaderdb: 5 cat0, 0 cat1, 4 cat2, 0 cat3, 0 cat4, 0 cat5, 0 cat6, 0 cat7 2099 - shaderdb: 0 sstall, 0 (ss), 0 (sy) 2100109cf618: 0000: c0213000 00700000 00000000 00002000 47300002 00002001 47300003 00002002 2101109cf638: 0020: 47300004 00002003 47308005 00000000 03000000 00000000 00000000 00000000 2102* 2103t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 2104109cf6a4: 0000: c0002600 00000000 2105t3 opcode: CP_LOAD_STATE4 (30) (51 dwords) 2106 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 } 2107 { STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 } 2108109cf6b8: 4.330127 0.855050 0.555273 0.469846 0.000000 4.698463 -0.404206 -0.342020 2109109cf6d8: 2.500000 -1.480991 -0.961761 -0.813798 -12.990380 -11.962078 35.506226 39.274502 2110109cf6f8: 0.160000 0.020000 0.000000 1.000000 0.039740 0.662886 0.747665 0.000000 2111109cf718: 1.000000 0.000000 0.000000 0.000000 0.000000 0.000000 0.000000 1.000000 2112109cf738: 0.800000 0.100000 0.000000 1.000000 0.000000 0.000000 0.000000 1.000000 2113109cf758: 0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 0.000000 2114109cf6b8: 0000: 408a9066 3f5ae494 3f0e265d 3ef08fb2 00000000 409659cf becef409 beaf1d43 2115109cf6d8: 0020: 40200000 bfbd9119 bf7635f5 bf50550b c14fd899 c13f64ac 420e0660 421d1917 2116109cf6f8: 0040: 3e23d70b 3ca3d70b 00000000 3f800000 3d22c66e 3f29b2e7 3f3f66f5 00000000 2117109cf718: 0060: 3f800000 00000000 00000000 00000000 00000000 00000000 00000000 3f800000 2118109cf738: 0080: 3f4ccccd 3dcccccd 00000000 3f800000 00000000 00000000 00000000 3f800000 2119109cf758: 00a0: 00000000 00000000 00000000 3f800000 02020000 02020202 02020202 00000202 2120109cf6ac: 0000: c0313000 03200000 00000001 408a9066 3f5ae494 3f0e265d 3ef08fb2 00000000 2121109cf6cc: 0020: 409659cf becef409 beaf1d43 40200000 bfbd9119 bf7635f5 bf50550b c14fd899 2122109cf6ec: 0040: c13f64ac 420e0660 421d1917 3e23d70b 3ca3d70b 00000000 3f800000 3d22c66e 2123109cf70c: 0060: 3f29b2e7 3f3f66f5 00000000 3f800000 00000000 00000000 00000000 00000000 2124109cf72c: 0080: 00000000 00000000 3f800000 3f4ccccd 3dcccccd 00000000 3f800000 00000000 2125109cf74c: 00a0: 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000 02020000 2126109cf76c: 00c0: 02020202 02020202 00000202 2127t0 write VFD_INDEX_OFFSET (2208) 2128 VFD_INDEX_OFFSET: 0 2129 UNKNOWN_2209: 0 2130109cf778: 0000: 00012208 00000000 00000000 2131t0 write PC_RESTART_INDEX (21c6) 2132 PC_RESTART_INDEX: 0xffffffff 2133109cf784: 0000: 000021c6 ffffffff 2134t0 write CP_SCRATCH[0x7].REG (057f) 2135 CP_SCRATCH[0x7].REG: 0x26 2136 :0,37,115,38 2137109cf78c: 0000: 0000057f 00000026 2138t3 opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords) 2139 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS } 2140 { NUM_INSTANCES = 1 } 2141 { NUM_INDICES = 120 } 2142 { FIRST_INDX = 0 } 2143 { INDX_BASE = 0x10bd0960 } 2144 { INDX_SIZE = 240 } 2145 draw[6] register values 2146!+ 00000025 CP_SCRATCH[0x5].REG: 0x25 2147 :0,37,115,38 2148!+ 00000026 CP_SCRATCH[0x7].REG: 0x26 2149 :0,37,115,38 2150 + 00080000 GRAS_CL_CLIP_CNTL: { 0x80000 } 2151!+ 00000001 GRAS_CNTL: { IJ_PERSP } 2152 + 00100010 GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 } 2153 + 00000010 GRAS_SU_POINT_SIZE: 1.000000 2154 + 00000000 GRAS_ALPHA_CONTROL: { 0 } 2155 + 00000000 GRAS_SU_POLY_OFFSET_SCALE: 0.000000 2156 + 00000000 GRAS_SU_POLY_OFFSET_OFFSET: 0.000000 2157 + 00000000 GRAS_SU_POLY_OFFSET_CLAMP: 0.000000 2158 + 00100012 GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS } 2159 + 012b012b GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 } 2160 + 00000000 GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 2161!+ 00001000 RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 | IJ_PERSP_PIXEL } 2162 + 00000001 RB_FS_OUTPUT_REG: { MRT = 1 } 2163 + 80000016 RB_DEPTH_CONTROL: { Z_TEST_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_READ_ENABLE } 2164 + 00000000 RB_VPORT_Z_CLAMP[0].MIN: 0 2165 + 00ffffff RB_VPORT_Z_CLAMP[0].MAX: 0xffffff 2166 + 42001004 VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 } 2167 + 00040400 VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 } 2168!+ 00000000 VPC_VARYING_INTERP[0].MODE: 0 2169 + 00000000 VPC_VARYING_INTERP[0x1].MODE: 0 2170 + 00000000 VPC_VARYING_INTERP[0x2].MODE: 0 2171 + 00000000 VPC_VARYING_INTERP[0x3].MODE: 0 2172 + 00000000 VPC_VARYING_INTERP[0x4].MODE: 0 2173 + 00000000 VPC_VARYING_INTERP[0x5].MODE: 0 2174 + 00000000 VPC_VARYING_INTERP[0x6].MODE: 0 2175 + 00000000 VPC_VARYING_INTERP[0x7].MODE: 0 2176 + 00000000 VPC_VARYING_PS_REPL[0].MODE: 0 2177 + 00000000 VPC_VARYING_PS_REPL[0x1].MODE: 0 2178 + 00000000 VPC_VARYING_PS_REPL[0x2].MODE: 0 2179 + 00000000 VPC_VARYING_PS_REPL[0x3].MODE: 0 2180 + 00000000 VPC_VARYING_PS_REPL[0x4].MODE: 0 2181 + 00000000 VPC_VARYING_PS_REPL[0x5].MODE: 0 2182 + 00000000 VPC_VARYING_PS_REPL[0x6].MODE: 0 2183 + 00000000 VPC_VARYING_PS_REPL[0x7].MODE: 0 2184 + 02000001 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 2185 + 00000012 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 2186 + ffffffff PC_RESTART_INDEX: 0xffffffff 2187 + 00000000 VFD_INDEX_OFFSET: 0 2188 + 00000000 UNKNOWN_2209: 0 2189 + 00140010 SP_SP_CTRL_REG: { 0x140010 } 2190 + 000005ff SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f } 2191 + 00201400 SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE } 2192 + 08000042 SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 } 2193 + 0010fc0a SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 } 2194 + 00001e0e SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 } 2195 + 08080808 SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 } 2196 + 00000000 SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 2197 + 10cd5000 SP_VS_OBJ_START: 0x10cd5000 2198 + 00000004 SP_VS_LENGTH_REG: 4 2199!+ 00340802 SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 2 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE } 2200 + 8010003e SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 } 2201 + 7e420000 SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 2202!+ 108cb000 SP_FS_OBJ_START: 0x108cb000 2203 + 00000001 SP_FS_LENGTH_REG: 1 2204 + 0000fc01 SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x } 2205!+ 0001a002 SP_FS_MRT[0].REG: { REGID = r0.z | MRTFORMAT = RB4_R8G8B8A8_UNORM } 2206!+ 00000002 SP_FS_MRT[0x1].REG: { REGID = r0.z | MRTFORMAT = 0 } 2207!+ 00000002 SP_FS_MRT[0x2].REG: { REGID = r0.z | MRTFORMAT = 0 } 2208!+ 00000002 SP_FS_MRT[0x3].REG: { REGID = r0.z | MRTFORMAT = 0 } 2209!+ 00000002 SP_FS_MRT[0x4].REG: { REGID = r0.z | MRTFORMAT = 0 } 2210!+ 00000002 SP_FS_MRT[0x5].REG: { REGID = r0.z | MRTFORMAT = 0 } 2211!+ 00000002 SP_FS_MRT[0x6].REG: { REGID = r0.z | MRTFORMAT = 0 } 2212!+ 00000002 SP_FS_MRT[0x7].REG: { REGID = r0.z | MRTFORMAT = 0 } 2213 + 7e420000 SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 2214 + 7e420000 SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 2215 + 7e420000 SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 2216 + 28000250 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE } 2217 + fcfc0100 HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x } 2218 + fff3f3f0 HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x } 2219!+ fcfcfc00 HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r0.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x } 2220 + 00fcfcfc HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 } 2221 + 04000042 HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 } 2222 + 017e423e HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 } 2223 + 007e4200 HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 2224 + 007e4200 HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 2225 + 007e4200 HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 2226 + 00000003 HLSQ_UPDATE_CONTROL: 0x3 2227109cf794: 0000: c0053800 00000404 00000001 00000078 00000000 10bd0960 000000f0 2228t0 write CP_SCRATCH[0x7].REG (057f) 2229 CP_SCRATCH[0x7].REG: 0x27 2230 :0,37,115,39 2231109cf7b0: 0000: 0000057f 00000027 2232t0 write CP_SCRATCH[0x5].REG (057d) 2233 CP_SCRATCH[0x5].REG: 0x2b 2234 :0,43,115,39 2235109cf7b8: 0000: 0000057d 0000002b 2236t0 write RB_DEPTH_CONTROL (2101) 2237 RB_DEPTH_CONTROL: { Z_TEST_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_READ_ENABLE } 2238109cf7c0: 0000: 00002101 80000016 2239t0 write GRAS_ALPHA_CONTROL (2073) 2240 GRAS_ALPHA_CONTROL: { 0 } 2241109cf7c8: 0000: 00002073 00000000 2242t0 write GRAS_SU_MODE_CONTROL (2078) 2243 GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS } 2244109cf7d0: 0000: 00002078 00100012 2245t0 write GRAS_SU_POINT_MINMAX (2070) 2246 GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 } 2247 GRAS_SU_POINT_SIZE: 1.000000 2248109cf7d8: 0000: 00012070 00100010 00000010 2249t0 write GRAS_SU_POLY_OFFSET_SCALE (2074) 2250 GRAS_SU_POLY_OFFSET_SCALE: 0.000000 2251 GRAS_SU_POLY_OFFSET_OFFSET: 0.000000 2252 GRAS_SU_POLY_OFFSET_CLAMP: 0.000000 2253109cf7e4: 0000: 00022074 00000000 00000000 00000000 2254t0 write GRAS_CL_CLIP_CNTL (2000) 2255 GRAS_CL_CLIP_CNTL: { 0x80000 } 2256109cf7f4: 0000: 00002000 00080000 2257t0 write PC_PRIM_VTX_CNTL (21c4) 2258 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 2259 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 2260109cf7fc: 0000: 000121c4 02000001 00000012 2261t0 write GRAS_SC_WINDOW_SCISSOR_BR (209c) 2262 GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 } 2263 GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 2264109cf808: 0000: 0001209c 012b012b 00000000 2265t0 write RB_VPORT_Z_CLAMP[0].MIN (2120) 2266 RB_VPORT_Z_CLAMP[0].MIN: 0 2267 RB_VPORT_Z_CLAMP[0].MAX: 0xffffff 2268109cf814: 0000: 00012120 00000000 00ffffff 2269t0 write HLSQ_UPDATE_CONTROL (23db) 2270 HLSQ_UPDATE_CONTROL: 0x3 2271109cf820: 0000: 000023db 00000003 2272t0 write HLSQ_CONTROL_0_REG (23c0) 2273 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE } 2274 HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x } 2275 HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x } 2276 HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x } 2277 HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 } 2278109cf828: 0000: 000423c0 28000250 fcfc0100 fff3f3f0 fcfcfcfc 00fcfcfc 2279t0 write HLSQ_VS_CONTROL_REG (23c5) 2280 HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 } 2281 HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 } 2282 HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 2283 HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 2284 HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 2285109cf840: 0000: 000423c5 04000042 017e423e 007e4200 007e4200 007e4200 2286t0 write SP_SP_CTRL_REG (22c0) 2287 SP_SP_CTRL_REG: { 0x140010 } 2288109cf858: 0000: 000022c0 00140010 2289t0 write SP_INSTR_CACHE_CTRL (22c1) 2290 SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f } 2291109cf860: 0000: 000022c1 000005ff 2292t0 write SP_VS_LENGTH_REG (22e5) 2293 SP_VS_LENGTH_REG: 4 2294109cf868: 0000: 000022e5 00000004 2295t0 write SP_VS_CTRL_REG0 (22c4) 2296 SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 4 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE } 2297 SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 4 } 2298 SP_VS_PARAM_REG: { POSREGID = r1.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 } 2299109cf870: 0000: 000222c4 00201000 04000042 0010fc06 2300t0 write SP_VS_OUT[0].REG (22c7) 2301 SP_VS_OUT[0].REG: { A_REGID = r2.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 } 2302109cf880: 0000: 000022c7 00001e0a 2303t0 write SP_VS_VPC_DST[0].REG (22d8) 2304 SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 } 2305109cf888: 0000: 000022d8 08080808 2306t0 write SP_VS_OBJ_OFFSET_REG (22e0) 2307 SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 2308 SP_VS_OBJ_START: 0x10cd0000 2309109cf890: 0000: 000122e0 00000000 10cd0000 2310t0 write SP_FS_LENGTH_REG (22ef) 2311 SP_FS_LENGTH_REG: 1 2312109cf89c: 0000: 000022ef 00000001 2313t0 write SP_FS_CTRL_REG0 (22e8) 2314 SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE } 2315 SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 } 2316109cf8a4: 0000: 000122e8 00340402 8010003e 2317t0 write SP_FS_OBJ_OFFSET_REG (22ea) 2318 SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 2319 SP_FS_OBJ_START: 0x10cd2000 2320109cf8b0: 0000: 000122ea 7e420000 10cd2000 2321t0 write SP_HS_OBJ_OFFSET_REG (230d) 2322 SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 2323109cf8bc: 0000: 0000230d 7e420000 2324t0 write SP_DS_OBJ_OFFSET_REG (2334) 2325 SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 2326109cf8c4: 0000: 00002334 7e420000 2327t0 write SP_GS_OBJ_OFFSET_REG (235b) 2328 SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 2329109cf8cc: 0000: 0000235b 7e420000 2330t0 write GRAS_CNTL (2003) 2331 GRAS_CNTL: { 0 } 2332109cf8d4: 0000: 00002003 00000000 2333t0 write RB_RENDER_CONTROL2 (20a3) 2334 RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 } 2335109cf8dc: 0000: 000020a3 00000000 2336t0 write RB_FS_OUTPUT_REG (2100) 2337 RB_FS_OUTPUT_REG: { MRT = 1 } 2338109cf8e4: 0000: 00002100 00000001 2339t0 write SP_FS_OUTPUT_REG (22f0) 2340 SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x } 2341109cf8ec: 0000: 000022f0 0000fc01 2342t0 write SP_FS_MRT[0].REG (22f1) 2343 SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM } 2344 SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 } 2345 SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 } 2346 SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 } 2347 SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 } 2348 SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 } 2349 SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 } 2350 SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 } 2351109cf8f4: 0000: 000722f1 0001a000 00000000 00000000 00000000 00000000 00000000 00000000 2352* 2353t0 write VPC_ATTR (2140) 2354 VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 } 2355 VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 } 2356109cf918: 0000: 00012140 42001004 00040400 2357t0 write VPC_VARYING_INTERP[0].MODE (2142) 2358 VPC_VARYING_INTERP[0].MODE: 0x55 2359 VPC_VARYING_INTERP[0x1].MODE: 0 2360 VPC_VARYING_INTERP[0x2].MODE: 0 2361 VPC_VARYING_INTERP[0x3].MODE: 0 2362 VPC_VARYING_INTERP[0x4].MODE: 0 2363 VPC_VARYING_INTERP[0x5].MODE: 0 2364 VPC_VARYING_INTERP[0x6].MODE: 0 2365 VPC_VARYING_INTERP[0x7].MODE: 0 2366109cf924: 0000: 00072142 00000055 00000000 00000000 00000000 00000000 00000000 00000000 2367* 2368t0 write VPC_VARYING_PS_REPL[0].MODE (214a) 2369 VPC_VARYING_PS_REPL[0].MODE: 0 2370 VPC_VARYING_PS_REPL[0x1].MODE: 0 2371 VPC_VARYING_PS_REPL[0x2].MODE: 0 2372 VPC_VARYING_PS_REPL[0x3].MODE: 0 2373 VPC_VARYING_PS_REPL[0x4].MODE: 0 2374 VPC_VARYING_PS_REPL[0x5].MODE: 0 2375 VPC_VARYING_PS_REPL[0x6].MODE: 0 2376 VPC_VARYING_PS_REPL[0x7].MODE: 0 2377109cf948: 0000: 0007214a 00000000 00000000 00000000 00000000 00000000 00000000 00000000 2378* 2379t3 opcode: CP_LOAD_STATE4 (30) (131 dwords) 2380 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 4 } 2381 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 2382 :2:0000:0000[40700000x_10000002x] mul.f r0.x, r0.z, c0.x 2383 :2:0001:0001[40700001x_10030002x] mul.f r0.y, r0.z, c0.w 2384 :3:0002:0002[63818000x_00001004x] mad.f32 r0.x, c1.x, r0.w, r0.x 2385 :3:0003:0003[63818001x_00011007x] mad.f32 r0.y, c1.w, r0.w, r0.y 2386 :3:0004:0004[63820000x_00001008x] mad.f32 r0.x, c2.x, r1.x, r0.x 2387 :3:0005:0005[63820001x_0001100bx] mad.f32 r0.y, c2.w, r1.x, r0.y 2388 :3:0006:0006[63828006x_0000100cx] mad.f32 r1.z, c3.x, r1.y, r0.x 2389 :2:0007:0007[40700000x_10010002x] mul.f r0.x, r0.z, c0.y 2390 :3:0008:0008[63828009x_0001100fx] mad.f32 r2.y, c3.w, r1.y, r0.y 2391 :3:0009:0009[63818000x_00001005x] mad.f32 r0.x, c1.y, r0.w, r0.x 2392 :1:0010:0010[20244001x_00000010x] mov.f32f32 r0.y, c4.x 2393 :3:0011:0011[63820000x_00001009x] mad.f32 r0.x, c2.y, r1.x, r0.x 2394 :0:0012:0012[00000000x_00000000x] nop 2395 :3:0013:0013[63828007x_0000100dx] mad.f32 r1.w, c3.y, r1.y, r0.x 2396 :2:0014:0014[40700000x_10020002x] mul.f r0.x, r0.z, c0.z 2397 :1:0015:0015[20244002x_00000015x] mov.f32f32 r0.z, c5.y 2398 :3:0016:0016[63818000x_00001006x] mad.f32 r0.x, c1.z, r0.w, r0.x 2399 :1:0017:0017[20244003x_00000016x] mov.f32f32 r0.w, c5.z 2400 :3:0018:0018[63820000x_0000100ax] mad.f32 r0.x, c2.z, r1.x, r0.x 2401 :1:0019:0019[20244004x_00000017x] mov.f32f32 r1.x, c5.w 2402 :3:0020:0020[63828008x_0000100ex] mad.f32 r2.x, c3.z, r1.y, r0.x 2403 :1:0021:0021[20244000x_00000011x] mov.f32f32 r0.x, c4.y 2404 :2:0022:0022[40100002x_00021021x] add.f r0.z, c8.y, r0.z 2405 :2:0023:0023[4050040dx_00041017x] (sat)max.f r3.y, c5.w, r1.x 2406 :2:0024:0024[40100003x_00031022x] add.f r0.w, c8.z, r0.w 2407 :2:0025:0025[40700000x_00001011x] mul.f r0.x, c4.y, r0.x 2408 :0:0026:0026[00000000x_00000000x] nop 2409 :3:0027:0027[63808000x_00001010x] mad.f32 r0.x, c4.x, r0.y, r0.x 2410 :1:0028:0028[20244001x_00000012x] mov.f32f32 r0.y, c4.z 2411 :0:0029:0029[00000200x_00000000x] (rpt2)nop 2412 :3:0030:0032[63808000x_00001012x] mad.f32 r0.x, c4.z, r0.y, r0.x 2413 :1:0031:0033[20244001x_00000014x] mov.f32f32 r0.y, c5.x 2414 :0:0032:0034[00000200x_00000000x] (rpt2)nop 2415 :2:0033:0037[40100001x_00011020x] add.f r0.y, c8.x, r0.y 2416 :0:0034:0038[00000000x_00000000x] nop 2417 :4:0035:0039[80300000x_00000000x] rsq r0.x, r0.x 2418 :2:0036:0040[40701004x_00001011x] (ss)mul.f r1.x, c4.y, r0.x 2419 :0:0037:0041[00000200x_00000000x] (rpt2)nop 2420 :2:0038:0044[40700004x_10190004x] mul.f r1.x, r1.x, c6.y 2421 :2:0039:0045[40700005x_00001010x] mul.f r1.y, c4.x, r0.x 2422 :0:0040:0046[00000200x_00000000x] (rpt2)nop 2423 :3:0041:0049[63828004x_00041018x] mad.f32 r1.x, c6.x, r1.y, r1.x 2424 :2:0042:0050[40700000x_00001012x] mul.f r0.x, c4.z, r0.x 2425 :0:0043:0051[00000200x_00000000x] (rpt2)nop 2426 :3:0044:0054[63800000x_0004101ax] mad.f32 r0.x, c6.z, r0.x, r1.x 2427 :0:0045:0055[00000200x_00000000x] (rpt2)nop 2428 :2:0046:0058[40b00004x_00001034x] cmps.f.lt r1.x, c13.x, r0.x 2429 :2:0047:0059[40500000x_00001034x] max.f r0.x, c13.x, r0.x 2430 :0:0048:0060[00000100x_00000000x] (rpt1)nop 2431 :1:0049:0062[200c4004x_00000004x] cov.u32f32 r1.x, r1.x 2432 :3:0050:0063[63800001x_00011024x] mad.f32 r0.y, c9.x, r0.x, r0.y 2433 :3:0051:0064[63800002x_00021025x] mad.f32 r0.z, c9.y, r0.x, r0.z 2434 :3:0052:0065[63800000x_00031026x] mad.f32 r0.x, c9.z, r0.x, r0.w 2435 :3:0053:0066[6382040ax_00011028x] (sat)mad.f32 r2.z, c10.x, r1.x, r0.y 2436 :3:0054:0067[6382040bx_00021029x] (sat)mad.f32 r2.w, c10.y, r1.x, r0.z 2437 :3:0055:0068[6382040cx_0000102ax] (sat)mad.f32 r3.x, c10.z, r1.x, r0.x 2438 :0:0056:0069[03000000x_00000000x] end 2439 :0:0057:0070[00000000x_00000000x] nop 2440 :0:0058:0071[00000000x_00000000x] nop 2441 :0:0059:0072[00000000x_00000000x] nop 2442 :0:0060:0073[00000000x_00000000x] nop 2443 Stats: 2444 - shaderdb: 74 instr, 27 nops, 47 non-nops, 7 mov, 1 cov 2445 - shaderdb: 0 last-baryf, 0 half, 4 full, 13 constlen 2446 - shaderdb: 28 cat0, 8 cat1, 15 cat2, 22 cat3, 1 cat4, 0 cat5, 0 cat6, 0 cat7 2447 - shaderdb: 10 sstall, 1 (ss), 0 (sy) 2448109cf96c: 0000: c0813000 01200000 00000000 10000002 40700000 10030002 40700001 00001004 2449109cf98c: 0020: 63818000 00011007 63818001 00001008 63820000 0001100b 63820001 0000100c 2450109cf9ac: 0040: 63828006 10010002 40700000 0001100f 63828009 00001005 63818000 00000010 2451109cf9cc: 0060: 20244001 00001009 63820000 00000000 00000000 0000100d 63828007 10020002 2452109cf9ec: 0080: 40700000 00000015 20244002 00001006 63818000 00000016 20244003 0000100a 2453109cfa0c: 00a0: 63820000 00000017 20244004 0000100e 63828008 00000011 20244000 00021021 2454109cfa2c: 00c0: 40100002 00041017 4050040d 00031022 40100003 00001011 40700000 00000000 2455109cfa4c: 00e0: 00000000 00001010 63808000 00000012 20244001 00000000 00000200 00001012 2456109cfa6c: 0100: 63808000 00000014 20244001 00000000 00000200 00011020 40100001 00000000 2457109cfa8c: 0120: 00000000 00000000 80300000 00001011 40701004 00000000 00000200 10190004 2458109cfaac: 0140: 40700004 00001010 40700005 00000000 00000200 00041018 63828004 00001012 2459109cfacc: 0160: 40700000 00000000 00000200 0004101a 63800000 00000000 00000200 00001034 2460109cfaec: 0180: 40b00004 00001034 40500000 00000000 00000100 00000004 200c4004 00011024 2461109cfb0c: 01a0: 63800001 00021025 63800002 00031026 63800000 00011028 6382040a 00021029 2462109cfb2c: 01c0: 6382040b 0000102a 6382040c 00000000 03000000 00000000 00000000 00000000 2463* 2464t3 opcode: CP_LOAD_STATE4 (30) (35 dwords) 2465 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 1 } 2466 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 2467 :0:0000:0000[00000000x_00000000x] nop 2468 :6:0001:0001[c7c60000x_01c00000x] ldlv.u32 r0.x, l[0], 1 2469 :6:0002:0002[c7c60001x_01c00002x] ldlv.u32 r0.y, l[1], 1 2470 :6:0003:0003[c7c60002x_01c00004x] ldlv.u32 r0.z, l[2], 1 2471 :6:0004:0004[c7c60003x_01c00006x] ldlv.u32 r0.w, l[3], 1 2472 :2:0005:0005[473090fcx_00002000x] (ss)bary.f (ei)r63.x, 0, r0.x 2473 :0:0006:0006[03000000x_00000000x] end 2474 :0:0007:0007[00000000x_00000000x] nop 2475 :0:0008:0008[00000000x_00000000x] nop 2476 :0:0009:0009[00000000x_00000000x] nop 2477 :0:0010:0010[00000000x_00000000x] nop 2478 Stats: 2479 - shaderdb: 11 instr, 5 nops, 6 non-nops, 0 mov, 0 cov 2480 - shaderdb: 5 last-baryf, 0 half, 1 full, 0 constlen 2481 - shaderdb: 6 cat0, 0 cat1, 1 cat2, 0 cat3, 0 cat4, 0 cat5, 4 cat6, 0 cat7 2482 - shaderdb: 0 sstall, 1 (ss), 0 (sy) 2483109cfb78: 0000: c0213000 00700000 00000000 00000000 00000000 01c00000 c7c60000 01c00002 2484109cfb98: 0020: c7c60001 01c00004 c7c60002 01c00006 c7c60003 00002000 473090fc 00000000 2485109cfbb8: 0040: 03000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 2486* 2487t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 2488109cfc04: 0000: c0002600 00000000 2489t3 opcode: CP_LOAD_STATE4 (30) (51 dwords) 2490 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 } 2491 { STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 } 2492109cfc18: 4.276816 0.109522 0.611668 0.517565 0.677381 4.774377 -0.312365 -0.264309 2493109cfc38: 2.500000 -1.480991 -0.961761 -0.813798 13.423393 -6.746271 38.893391 42.140564 2494109cfc58: 0.000000 0.000000 1.000000 1.000000 0.000000 0.160000 0.040000 1.000000 2495109cfc78: -0.064448 0.660942 0.747665 0.000000 1.000000 0.000000 0.000000 0.000000 2496109cfc98: 0.000000 0.000000 0.000000 1.000000 0.000000 0.800000 0.200000 1.000000 2497109cfcb8: 0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 1.000000 2498109cfc18: 0000: 4088dbad 3de04cdc 3f1c964b 3f047f2c 3f2d68da 4098c7b2 be9fee59 be875387 2499109cfc38: 0020: 40200000 bfbd9119 bf7635f5 bf50550b 4156c638 c0d7e173 421b92d5 42288ff0 2500109cfc58: 0040: 00000000 00000000 3f800000 3f800000 00000000 3e23d70b 3d23d70b 3f800000 2501109cfc78: 0060: bd83fd0e 3f293379 3f3f66f5 00000000 3f800000 00000000 00000000 00000000 2502109cfc98: 0080: 00000000 00000000 00000000 3f800000 00000000 3f4ccccd 3e4ccccd 3f800000 2503109cfcb8: 00a0: 00000000 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000 2504109cfc0c: 0000: c0313000 03200000 00000001 4088dbad 3de04cdc 3f1c964b 3f047f2c 3f2d68da 2505109cfc2c: 0020: 4098c7b2 be9fee59 be875387 40200000 bfbd9119 bf7635f5 bf50550b 4156c638 2506109cfc4c: 0040: c0d7e173 421b92d5 42288ff0 00000000 00000000 3f800000 3f800000 00000000 2507109cfc6c: 0060: 3e23d70b 3d23d70b 3f800000 bd83fd0e 3f293379 3f3f66f5 00000000 3f800000 2508109cfc8c: 0080: 00000000 00000000 00000000 00000000 00000000 00000000 3f800000 00000000 2509109cfcac: 00a0: 3f4ccccd 3e4ccccd 3f800000 00000000 00000000 00000000 3f800000 00000000 2510109cfccc: 00c0: 00000000 00000000 3f800000 2511t3 opcode: CP_LOAD_STATE4 (30) (7 dwords) 2512 { DST_OFF = 13 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 1 } 2513 { STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 } 2514109cfce4: 0.000000 -28026765312.000000 -28026765312.000000 -28026765312.000000 2515109cfce4: 0000: 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0 2516109cfcd8: 0000: c0053000 0060000d 00000001 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0 2517t0 write VFD_FETCH[0].INSTR_0 (220a) 2518 VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 12 } 2519 VFD_FETCH[0].INSTR_1: 0x107cb000 2520 VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 } 2521 VFD_FETCH[0].INSTR_3: { STEPRATE = 1 } 2522109cfcf4: 0000: 0003220a 0000060b 107cb000 00100000 00000001 2523t0 write VFD_DECODE[0].INSTR (228a) 2524 VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID } 2525109cfd08: 0000: 0000228a 2c0020df 2526t0 write VFD_CONTROL_0 (2200) 2527 VFD_CONTROL_0: { TOTALATTRTOVS = 4 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 1 | STRMFETCHINSTRCNT = 1 | 0xa0000 } 2528 VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x } 2529 VFD_CONTROL_2: 0 2530 VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x } 2531 VFD_CONTROL_4: 0 2532109cfd10: 0000: 00042200 041a0004 fcfc0081 00000000 0000fc00 00000000 2533t0 write UCHE_INVALIDATE0 (0e8a) 2534 UCHE_INVALIDATE0: 0 2535 UCHE_INVALIDATE1: 0x12 2536109cfd28: 0000: 00010e8a 00000000 00000012 2537t0 write VFD_INDEX_OFFSET (2208) 2538 VFD_INDEX_OFFSET: 0 2539 UNKNOWN_2209: 0 2540109cfd34: 0000: 00012208 00000000 00000000 2541t0 write PC_RESTART_INDEX (21c6) 2542 PC_RESTART_INDEX: 0xffffffff 2543109cfd40: 0000: 000021c6 ffffffff 2544t0 write CP_SCRATCH[0x7].REG (057f) 2545 CP_SCRATCH[0x7].REG: 0x2c 2546 :0,43,115,44 2547109cfd48: 0000: 0000057f 0000002c 2548t3 opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords) 2549 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS } 2550 { NUM_INSTANCES = 1 } 2551 { NUM_INDICES = 120 } 2552 { FIRST_INDX = 0 } 2553 { INDX_BASE = 0x10bd0a50 } 2554 { INDX_SIZE = 240 } 2555 draw[7] register values 2556!+ 0000002b CP_SCRATCH[0x5].REG: 0x2b 2557 :0,43,115,44 2558!+ 0000002c CP_SCRATCH[0x7].REG: 0x2c 2559 :0,43,115,44 2560 + 00000000 UCHE_INVALIDATE0: 0 2561 + 00000012 UCHE_INVALIDATE1: 0x12 2562 + 00080000 GRAS_CL_CLIP_CNTL: { 0x80000 } 2563!+ 00000000 GRAS_CNTL: { 0 } 2564 + 00100010 GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 } 2565 + 00000010 GRAS_SU_POINT_SIZE: 1.000000 2566 + 00000000 GRAS_ALPHA_CONTROL: { 0 } 2567 + 00000000 GRAS_SU_POLY_OFFSET_SCALE: 0.000000 2568 + 00000000 GRAS_SU_POLY_OFFSET_OFFSET: 0.000000 2569 + 00000000 GRAS_SU_POLY_OFFSET_CLAMP: 0.000000 2570 + 00100012 GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS } 2571 + 012b012b GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 } 2572 + 00000000 GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 2573!+ 00000000 RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 } 2574 + 00000001 RB_FS_OUTPUT_REG: { MRT = 1 } 2575 + 80000016 RB_DEPTH_CONTROL: { Z_TEST_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_READ_ENABLE } 2576 + 00000000 RB_VPORT_Z_CLAMP[0].MIN: 0 2577 + 00ffffff RB_VPORT_Z_CLAMP[0].MAX: 0xffffff 2578 + 42001004 VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 } 2579 + 00040400 VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 } 2580!+ 00000055 VPC_VARYING_INTERP[0].MODE: 0x55 2581 + 00000000 VPC_VARYING_INTERP[0x1].MODE: 0 2582 + 00000000 VPC_VARYING_INTERP[0x2].MODE: 0 2583 + 00000000 VPC_VARYING_INTERP[0x3].MODE: 0 2584 + 00000000 VPC_VARYING_INTERP[0x4].MODE: 0 2585 + 00000000 VPC_VARYING_INTERP[0x5].MODE: 0 2586 + 00000000 VPC_VARYING_INTERP[0x6].MODE: 0 2587 + 00000000 VPC_VARYING_INTERP[0x7].MODE: 0 2588 + 00000000 VPC_VARYING_PS_REPL[0].MODE: 0 2589 + 00000000 VPC_VARYING_PS_REPL[0x1].MODE: 0 2590 + 00000000 VPC_VARYING_PS_REPL[0x2].MODE: 0 2591 + 00000000 VPC_VARYING_PS_REPL[0x3].MODE: 0 2592 + 00000000 VPC_VARYING_PS_REPL[0x4].MODE: 0 2593 + 00000000 VPC_VARYING_PS_REPL[0x5].MODE: 0 2594 + 00000000 VPC_VARYING_PS_REPL[0x6].MODE: 0 2595 + 00000000 VPC_VARYING_PS_REPL[0x7].MODE: 0 2596 + 02000001 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 2597 + 00000012 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 2598 + ffffffff PC_RESTART_INDEX: 0xffffffff 2599!+ 041a0004 VFD_CONTROL_0: { TOTALATTRTOVS = 4 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 1 | STRMFETCHINSTRCNT = 1 | 0xa0000 } 2600 + fcfc0081 VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x } 2601 + 00000000 VFD_CONTROL_2: 0 2602 + 0000fc00 VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x } 2603 + 00000000 VFD_CONTROL_4: 0 2604 + 00000000 VFD_INDEX_OFFSET: 0 2605 + 00000000 UNKNOWN_2209: 0 2606!+ 0000060b VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 12 } 2607 + 107cb000 VFD_FETCH[0].INSTR_1: 0x107cb000 2608 + 00100000 VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 } 2609 + 00000001 VFD_FETCH[0].INSTR_3: { STEPRATE = 1 } 2610!+ 2c0020df VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID } 2611 + 00140010 SP_SP_CTRL_REG: { 0x140010 } 2612 + 000005ff SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f } 2613!+ 00201000 SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 4 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE } 2614!+ 04000042 SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 4 } 2615!+ 0010fc06 SP_VS_PARAM_REG: { POSREGID = r1.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 } 2616!+ 00001e0a SP_VS_OUT[0].REG: { A_REGID = r2.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 } 2617 + 08080808 SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 } 2618 + 00000000 SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 2619!+ 10cd0000 SP_VS_OBJ_START: 0x10cd0000 2620 + 00000004 SP_VS_LENGTH_REG: 4 2621!+ 00340402 SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE } 2622 + 8010003e SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 } 2623 + 7e420000 SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 2624!+ 10cd2000 SP_FS_OBJ_START: 0x10cd2000 2625 + 00000001 SP_FS_LENGTH_REG: 1 2626 + 0000fc01 SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x } 2627!+ 0001a000 SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM } 2628!+ 00000000 SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 } 2629!+ 00000000 SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 } 2630!+ 00000000 SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 } 2631!+ 00000000 SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 } 2632!+ 00000000 SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 } 2633!+ 00000000 SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 } 2634!+ 00000000 SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 } 2635 + 7e420000 SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 2636 + 7e420000 SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 2637 + 7e420000 SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 2638 + 28000250 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE } 2639 + fcfc0100 HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x } 2640 + fff3f3f0 HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x } 2641!+ fcfcfcfc HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x } 2642 + 00fcfcfc HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 } 2643 + 04000042 HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 } 2644 + 017e423e HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 } 2645 + 007e4200 HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 2646 + 007e4200 HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 2647 + 007e4200 HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 2648 + 00000003 HLSQ_UPDATE_CONTROL: 0x3 2649109cfd50: 0000: c0053800 00000404 00000001 00000078 00000000 10bd0a50 000000f0 2650t0 write CP_SCRATCH[0x7].REG (057f) 2651 CP_SCRATCH[0x7].REG: 0x2d 2652 :0,43,115,45 2653109cfd6c: 0000: 0000057f 0000002d 2654t0 write CP_SCRATCH[0x5].REG (057d) 2655 CP_SCRATCH[0x5].REG: 0x31 2656 :0,49,115,45 2657109cfd74: 0000: 0000057d 00000031 2658t0 write PC_PRIM_VTX_CNTL (21c4) 2659 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 2660 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 2661109cfd7c: 0000: 000121c4 02000001 00000012 2662t0 write VFD_INDEX_OFFSET (2208) 2663 VFD_INDEX_OFFSET: 0 2664 UNKNOWN_2209: 0 2665109cfd88: 0000: 00012208 00000000 00000000 2666t0 write PC_RESTART_INDEX (21c6) 2667 PC_RESTART_INDEX: 0xffffffff 2668109cfd94: 0000: 000021c6 ffffffff 2669t0 write CP_SCRATCH[0x7].REG (057f) 2670 CP_SCRATCH[0x7].REG: 0x32 2671 :0,49,115,50 2672109cfd9c: 0000: 0000057f 00000032 2673t3 opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords) 2674 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS } 2675 { NUM_INSTANCES = 1 } 2676 { NUM_INDICES = 60 } 2677 { FIRST_INDX = 0 } 2678 { INDX_BASE = 0x10bd0b40 } 2679 { INDX_SIZE = 120 } 2680 draw[8] register values 2681!+ 00000031 CP_SCRATCH[0x5].REG: 0x31 2682 :0,49,115,50 2683!+ 00000032 CP_SCRATCH[0x7].REG: 0x32 2684 :0,49,115,50 2685 + 02000001 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 2686 + 00000012 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 2687 + ffffffff PC_RESTART_INDEX: 0xffffffff 2688 + 00000000 VFD_INDEX_OFFSET: 0 2689 + 00000000 UNKNOWN_2209: 0 2690109cfda4: 0000: c0053800 00000404 00000001 0000003c 00000000 10bd0b40 00000078 2691t0 write CP_SCRATCH[0x7].REG (057f) 2692 CP_SCRATCH[0x7].REG: 0x33 2693 :0,49,115,51 2694109cfdc0: 0000: 0000057f 00000033 2695t0 write CP_SCRATCH[0x5].REG (057d) 2696 CP_SCRATCH[0x5].REG: 0x37 2697 :0,55,115,51 2698109cfdc8: 0000: 0000057d 00000037 2699t0 write PC_PRIM_VTX_CNTL (21c4) 2700 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 2701 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 2702109cfdd0: 0000: 000121c4 02000001 00000012 2703t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 2704109cfddc: 0000: c0002600 00000000 2705t3 opcode: CP_LOAD_STATE4 (30) (51 dwords) 2706 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 } 2707 { STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 } 2708109cfdf0: 4.276816 0.109522 0.611668 0.517565 0.677381 4.774377 -0.312365 -0.264309 2709109cfe10: 2.500000 -1.480991 -0.961761 -0.813798 13.423393 -6.746271 38.893391 42.140564 2710109cfe30: 0.000000 0.000000 -1.000000 1.000000 0.000000 0.160000 0.040000 1.000000 2711109cfe50: -0.064448 0.660942 0.747665 0.000000 1.000000 0.000000 0.000000 0.000000 2712109cfe70: 0.000000 0.000000 0.000000 1.000000 0.000000 0.800000 0.200000 1.000000 2713109cfe90: 0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 1.000000 2714109cfdf0: 0000: 4088dbad 3de04cdc 3f1c964b 3f047f2c 3f2d68da 4098c7b2 be9fee59 be875387 2715109cfe10: 0020: 40200000 bfbd9119 bf7635f5 bf50550b 4156c638 c0d7e173 421b92d5 42288ff0 2716109cfe30: 0040: 00000000 00000000 bf800000 3f800000 00000000 3e23d70b 3d23d70b 3f800000 2717109cfe50: 0060: bd83fd0e 3f293379 3f3f66f5 00000000 3f800000 00000000 00000000 00000000 2718109cfe70: 0080: 00000000 00000000 00000000 3f800000 00000000 3f4ccccd 3e4ccccd 3f800000 2719109cfe90: 00a0: 00000000 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000 2720109cfde4: 0000: c0313000 03200000 00000001 4088dbad 3de04cdc 3f1c964b 3f047f2c 3f2d68da 2721109cfe04: 0020: 4098c7b2 be9fee59 be875387 40200000 bfbd9119 bf7635f5 bf50550b 4156c638 2722109cfe24: 0040: c0d7e173 421b92d5 42288ff0 00000000 00000000 bf800000 3f800000 00000000 2723109cfe44: 0060: 3e23d70b 3d23d70b 3f800000 bd83fd0e 3f293379 3f3f66f5 00000000 3f800000 2724109cfe64: 0080: 00000000 00000000 00000000 00000000 00000000 00000000 3f800000 00000000 2725109cfe84: 00a0: 3f4ccccd 3e4ccccd 3f800000 00000000 00000000 00000000 3f800000 00000000 2726109cfea4: 00c0: 00000000 00000000 3f800000 2727t0 write VFD_INDEX_OFFSET (2208) 2728 VFD_INDEX_OFFSET: 0 2729 UNKNOWN_2209: 0 2730109cfeb0: 0000: 00012208 00000000 00000000 2731t0 write PC_RESTART_INDEX (21c6) 2732 PC_RESTART_INDEX: 0xffffffff 2733109cfebc: 0000: 000021c6 ffffffff 2734t0 write CP_SCRATCH[0x7].REG (057f) 2735 CP_SCRATCH[0x7].REG: 0x38 2736 :0,55,115,56 2737109cfec4: 0000: 0000057f 00000038 2738t3 opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords) 2739 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS } 2740 { NUM_INSTANCES = 1 } 2741 { NUM_INDICES = 120 } 2742 { FIRST_INDX = 0 } 2743 { INDX_BASE = 0x10bd0bb8 } 2744 { INDX_SIZE = 240 } 2745 draw[9] register values 2746!+ 00000037 CP_SCRATCH[0x5].REG: 0x37 2747 :0,55,115,56 2748!+ 00000038 CP_SCRATCH[0x7].REG: 0x38 2749 :0,55,115,56 2750 + 02000001 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 2751 + 00000012 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 2752 + ffffffff PC_RESTART_INDEX: 0xffffffff 2753 + 00000000 VFD_INDEX_OFFSET: 0 2754 + 00000000 UNKNOWN_2209: 0 2755109cfecc: 0000: c0053800 00000404 00000001 00000078 00000000 10bd0bb8 000000f0 2756t0 write CP_SCRATCH[0x7].REG (057f) 2757 CP_SCRATCH[0x7].REG: 0x39 2758 :0,55,115,57 2759109cfee8: 0000: 0000057f 00000039 2760t0 write CP_SCRATCH[0x5].REG (057d) 2761 CP_SCRATCH[0x5].REG: 0x3d 2762 :0,61,115,57 2763109cfef0: 0000: 0000057d 0000003d 2764t0 write PC_PRIM_VTX_CNTL (21c4) 2765 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 2766 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 2767109cfef8: 0000: 000121c4 02000001 00000012 2768t0 write VFD_INDEX_OFFSET (2208) 2769 VFD_INDEX_OFFSET: 0 2770 UNKNOWN_2209: 0 2771109cff04: 0000: 00012208 00000000 00000000 2772t0 write PC_RESTART_INDEX (21c6) 2773 PC_RESTART_INDEX: 0xffffffff 2774109cff10: 0000: 000021c6 ffffffff 2775t0 write CP_SCRATCH[0x7].REG (057f) 2776 CP_SCRATCH[0x7].REG: 0x3e 2777 :0,61,115,62 2778109cff18: 0000: 0000057f 0000003e 2779t3 opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords) 2780 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS } 2781 { NUM_INSTANCES = 1 } 2782 { NUM_INDICES = 60 } 2783 { FIRST_INDX = 0 } 2784 { INDX_BASE = 0x10bd0ca8 } 2785 { INDX_SIZE = 120 } 2786 draw[10] register values 2787!+ 0000003d CP_SCRATCH[0x5].REG: 0x3d 2788 :0,61,115,62 2789!+ 0000003e CP_SCRATCH[0x7].REG: 0x3e 2790 :0,61,115,62 2791 + 02000001 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 2792 + 00000012 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 2793 + ffffffff PC_RESTART_INDEX: 0xffffffff 2794 + 00000000 VFD_INDEX_OFFSET: 0 2795 + 00000000 UNKNOWN_2209: 0 2796109cff20: 0000: c0053800 00000404 00000001 0000003c 00000000 10bd0ca8 00000078 2797t0 write CP_SCRATCH[0x7].REG (057f) 2798 CP_SCRATCH[0x7].REG: 0x3f 2799 :0,61,115,63 2800109cff3c: 0000: 0000057f 0000003f 2801t0 write CP_SCRATCH[0x5].REG (057d) 2802 CP_SCRATCH[0x5].REG: 0x43 2803 :0,67,115,63 2804109cff44: 0000: 0000057d 00000043 2805t0 write RB_DEPTH_CONTROL (2101) 2806 RB_DEPTH_CONTROL: { Z_TEST_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_READ_ENABLE } 2807109cff4c: 0000: 00002101 80000016 2808t0 write GRAS_ALPHA_CONTROL (2073) 2809 GRAS_ALPHA_CONTROL: { 0 } 2810109cff54: 0000: 00002073 00000000 2811t0 write PC_PRIM_VTX_CNTL (21c4) 2812 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 2813 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 2814109cff5c: 0000: 000121c4 02000001 00000012 2815t0 write HLSQ_UPDATE_CONTROL (23db) 2816 HLSQ_UPDATE_CONTROL: 0x3 2817109cff68: 0000: 000023db 00000003 2818t0 write HLSQ_CONTROL_0_REG (23c0) 2819 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE } 2820 HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x } 2821 HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x } 2822 HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x } 2823 HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 } 2824109cff70: 0000: 000423c0 28000250 fcfc0100 fff3f3f0 fcfcfcfc 00fcfcfc 2825t0 write HLSQ_VS_CONTROL_REG (23c5) 2826 HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 } 2827 HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 } 2828 HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 2829 HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 2830 HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 2831109cff88: 0000: 000423c5 04000042 017e423e 007e4200 007e4200 007e4200 2832t0 write SP_SP_CTRL_REG (22c0) 2833 SP_SP_CTRL_REG: { 0x140010 } 2834109cffa0: 0000: 000022c0 00140010 2835t0 write SP_INSTR_CACHE_CTRL (22c1) 2836 SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f } 2837109cffa8: 0000: 000022c1 000005ff 2838t0 write SP_VS_LENGTH_REG (22e5) 2839 SP_VS_LENGTH_REG: 4 2840109cffb0: 0000: 000022e5 00000004 2841t0 write SP_VS_CTRL_REG0 (22c4) 2842 SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE } 2843 SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 } 2844 SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 } 2845109cffb8: 0000: 000222c4 00201400 08000042 0010fc0a 2846t0 write SP_VS_OUT[0].REG (22c7) 2847 SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 } 2848109cffc8: 0000: 000022c7 00001e0e 2849t0 write SP_VS_VPC_DST[0].REG (22d8) 2850 SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 } 2851109cffd0: 0000: 000022d8 08080808 2852t0 write SP_VS_OBJ_OFFSET_REG (22e0) 2853 SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 2854 SP_VS_OBJ_START: 0x10cd5000 2855109cffd8: 0000: 000122e0 00000000 10cd5000 2856t0 write SP_FS_LENGTH_REG (22ef) 2857 SP_FS_LENGTH_REG: 1 2858109cffe4: 0000: 000022ef 00000001 2859t0 write SP_FS_CTRL_REG0 (22e8) 2860 SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE } 2861 SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 } 2862109cffec: 0000: 000122e8 00340402 8010003e 2863t0 write SP_FS_OBJ_OFFSET_REG (22ea) 2864 SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 2865 SP_FS_OBJ_START: 0x10cd2000 2866109cfff8: 0000: 000122ea 7e420000 10cd2000 2867t0 write SP_HS_OBJ_OFFSET_REG (230d) 2868 SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 2869109d0004: 0000: 0000230d 7e420000 2870t0 write SP_DS_OBJ_OFFSET_REG (2334) 2871 SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 2872109d000c: 0000: 00002334 7e420000 2873t0 write SP_GS_OBJ_OFFSET_REG (235b) 2874 SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 2875109d0014: 0000: 0000235b 7e420000 2876t0 write GRAS_CNTL (2003) 2877 GRAS_CNTL: { 0 } 2878109d001c: 0000: 00002003 00000000 2879t0 write RB_RENDER_CONTROL2 (20a3) 2880 RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 } 2881109d0024: 0000: 000020a3 00000000 2882t0 write RB_FS_OUTPUT_REG (2100) 2883 RB_FS_OUTPUT_REG: { MRT = 1 } 2884109d002c: 0000: 00002100 00000001 2885t0 write SP_FS_OUTPUT_REG (22f0) 2886 SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x } 2887109d0034: 0000: 000022f0 0000fc01 2888t0 write SP_FS_MRT[0].REG (22f1) 2889 SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM } 2890 SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 } 2891 SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 } 2892 SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 } 2893 SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 } 2894 SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 } 2895 SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 } 2896 SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 } 2897109d003c: 0000: 000722f1 0001a000 00000000 00000000 00000000 00000000 00000000 00000000 2898* 2899t0 write VPC_ATTR (2140) 2900 VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 } 2901 VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 } 2902109d0060: 0000: 00012140 42001004 00040400 2903t0 write VPC_VARYING_INTERP[0].MODE (2142) 2904 VPC_VARYING_INTERP[0].MODE: 0x55 2905 VPC_VARYING_INTERP[0x1].MODE: 0 2906 VPC_VARYING_INTERP[0x2].MODE: 0 2907 VPC_VARYING_INTERP[0x3].MODE: 0 2908 VPC_VARYING_INTERP[0x4].MODE: 0 2909 VPC_VARYING_INTERP[0x5].MODE: 0 2910 VPC_VARYING_INTERP[0x6].MODE: 0 2911 VPC_VARYING_INTERP[0x7].MODE: 0 2912109d006c: 0000: 00072142 00000055 00000000 00000000 00000000 00000000 00000000 00000000 2913* 2914t0 write VPC_VARYING_PS_REPL[0].MODE (214a) 2915 VPC_VARYING_PS_REPL[0].MODE: 0 2916 VPC_VARYING_PS_REPL[0x1].MODE: 0 2917 VPC_VARYING_PS_REPL[0x2].MODE: 0 2918 VPC_VARYING_PS_REPL[0x3].MODE: 0 2919 VPC_VARYING_PS_REPL[0x4].MODE: 0 2920 VPC_VARYING_PS_REPL[0x5].MODE: 0 2921 VPC_VARYING_PS_REPL[0x6].MODE: 0 2922 VPC_VARYING_PS_REPL[0x7].MODE: 0 2923109d0090: 0000: 0007214a 00000000 00000000 00000000 00000000 00000000 00000000 00000000 2924* 2925t3 opcode: CP_LOAD_STATE4 (30) (131 dwords) 2926 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 4 } 2927 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 2928 :2:0000:0000[40700000x_10000002x] mul.f r0.x, r0.z, c0.x 2929 :2:0001:0001[40700001x_10030002x] mul.f r0.y, r0.z, c0.w 2930 :3:0002:0002[63818000x_00001004x] mad.f32 r0.x, c1.x, r0.w, r0.x 2931 :3:0003:0003[63818001x_00011007x] mad.f32 r0.y, c1.w, r0.w, r0.y 2932 :3:0004:0004[63820000x_00001008x] mad.f32 r0.x, c2.x, r1.x, r0.x 2933 :3:0005:0005[63820001x_0001100bx] mad.f32 r0.y, c2.w, r1.x, r0.y 2934 :3:0006:0006[6382800ax_0000100cx] mad.f32 r2.z, c3.x, r1.y, r0.x 2935 :2:0007:0007[40700000x_10010002x] mul.f r0.x, r0.z, c0.y 2936 :3:0008:0008[6382800dx_0001100fx] mad.f32 r3.y, c3.w, r1.y, r0.y 2937 :3:0009:0009[63818000x_00001005x] mad.f32 r0.x, c1.y, r0.w, r0.x 2938 :1:0010:0010[20244001x_00000010x] mov.f32f32 r0.y, c4.x 2939 :3:0011:0011[63820000x_00001009x] mad.f32 r0.x, c2.y, r1.x, r0.x 2940 :0:0012:0012[00000000x_00000000x] nop 2941 :3:0013:0013[6382800bx_0000100dx] mad.f32 r2.w, c3.y, r1.y, r0.x 2942 :2:0014:0014[40700000x_10020002x] mul.f r0.x, r0.z, c0.z 2943 :2:0015:0015[40100001x_0001101cx] add.f r0.y, c7.x, r0.y 2944 :3:0016:0016[63818000x_00001006x] mad.f32 r0.x, c1.z, r0.w, r0.x 2945 :1:0017:0017[20244002x_00000011x] mov.f32f32 r0.z, c4.y 2946 :3:0018:0018[63820000x_0000100ax] mad.f32 r0.x, c2.z, r1.x, r0.x 2947 :1:0019:0019[20244004x_00000013x] mov.f32f32 r1.x, c4.w 2948 :3:0020:0020[6382800cx_0000100ex] mad.f32 r3.x, c3.z, r1.y, r0.x 2949 :2:0021:0021[40700000x_00070007x] mul.f r0.x, r1.w, r1.w 2950 :2:0022:0022[40100002x_0002101dx] add.f r0.z, c7.y, r0.z 2951 :3:0023:0023[63830000x_00000006x] mad.f32 r0.x, r1.z, r1.z, r0.x 2952 :2:0024:0024[40500411x_00041013x] (sat)max.f r4.y, c4.w, r1.x 2953 :3:0025:0025[63840000x_00000008x] mad.f32 r0.x, r2.x, r2.x, r0.x 2954 :1:0026:0026[20244003x_00000012x] mov.f32f32 r0.w, c4.z 2955 :0:0027:0027[00000200x_00000000x] (rpt2)nop 2956 :2:0028:0030[40100003x_0003101ex] add.f r0.w, c7.z, r0.w 2957 :0:0029:0031[00000000x_00000000x] nop 2958 :4:0030:0032[80300000x_00000000x] rsq r0.x, r0.x 2959 :2:0031:0033[40701004x_00000007x] (ss)mul.f r1.x, r1.w, r0.x 2960 :0:0032:0034[00000200x_00000000x] (rpt2)nop 2961 :2:0033:0037[40700004x_10150004x] mul.f r1.x, r1.x, c5.y 2962 :2:0034:0038[40700005x_00000006x] mul.f r1.y, r1.z, r0.x 2963 :0:0035:0039[00000200x_00000000x] (rpt2)nop 2964 :3:0036:0042[63828004x_00041014x] mad.f32 r1.x, c5.x, r1.y, r1.x 2965 :2:0037:0043[40700000x_00000008x] mul.f r0.x, r2.x, r0.x 2966 :0:0038:0044[00000200x_00000000x] (rpt2)nop 2967 :3:0039:0047[63800000x_00041016x] mad.f32 r0.x, c5.z, r0.x, r1.x 2968 :0:0040:0048[00000200x_00000000x] (rpt2)nop 2969 :2:0041:0051[40b00004x_00001034x] cmps.f.lt r1.x, c13.x, r0.x 2970 :2:0042:0052[40500000x_00001034x] max.f r0.x, c13.x, r0.x 2971 :0:0043:0053[00000100x_00000000x] (rpt1)nop 2972 :1:0044:0055[200c4004x_00000004x] cov.u32f32 r1.x, r1.x 2973 :3:0045:0056[63800001x_00011020x] mad.f32 r0.y, c8.x, r0.x, r0.y 2974 :3:0046:0057[63800002x_00021021x] mad.f32 r0.z, c8.y, r0.x, r0.z 2975 :3:0047:0058[63800000x_00031022x] mad.f32 r0.x, c8.z, r0.x, r0.w 2976 :3:0048:0059[6382040ex_00011024x] (sat)mad.f32 r3.z, c9.x, r1.x, r0.y 2977 :3:0049:0060[6382040fx_00021025x] (sat)mad.f32 r3.w, c9.y, r1.x, r0.z 2978 :3:0050:0061[63820410x_00001026x] (sat)mad.f32 r4.x, c9.z, r1.x, r0.x 2979 :0:0051:0062[03000000x_00000000x] end 2980 :0:0052:0063[00000000x_00000000x] nop 2981 :0:0053:0064[00000000x_00000000x] nop 2982 :0:0054:0065[00000000x_00000000x] nop 2983 :0:0055:0066[00000000x_00000000x] nop 2984 Stats: 2985 - shaderdb: 67 instr, 23 nops, 44 non-nops, 4 mov, 1 cov 2986 - shaderdb: 0 last-baryf, 0 half, 5 full, 13 constlen 2987 - shaderdb: 24 cat0, 5 cat1, 15 cat2, 22 cat3, 1 cat4, 0 cat5, 0 cat6, 0 cat7 2988 - shaderdb: 10 sstall, 1 (ss), 0 (sy) 2989109d00b4: 0000: c0813000 01200000 00000000 10000002 40700000 10030002 40700001 00001004 2990109d00d4: 0020: 63818000 00011007 63818001 00001008 63820000 0001100b 63820001 0000100c 2991109d00f4: 0040: 6382800a 10010002 40700000 0001100f 6382800d 00001005 63818000 00000010 2992109d0114: 0060: 20244001 00001009 63820000 00000000 00000000 0000100d 6382800b 10020002 2993109d0134: 0080: 40700000 0001101c 40100001 00001006 63818000 00000011 20244002 0000100a 2994109d0154: 00a0: 63820000 00000013 20244004 0000100e 6382800c 00070007 40700000 0002101d 2995109d0174: 00c0: 40100002 00000006 63830000 00041013 40500411 00000008 63840000 00000012 2996109d0194: 00e0: 20244003 00000000 00000200 0003101e 40100003 00000000 00000000 00000000 2997109d01b4: 0100: 80300000 00000007 40701004 00000000 00000200 10150004 40700004 00000006 2998109d01d4: 0120: 40700005 00000000 00000200 00041014 63828004 00000008 40700000 00000000 2999109d01f4: 0140: 00000200 00041016 63800000 00000000 00000200 00001034 40b00004 00001034 3000109d0214: 0160: 40500000 00000000 00000100 00000004 200c4004 00011020 63800001 00021021 3001109d0234: 0180: 63800002 00031022 63800000 00011024 6382040e 00021025 6382040f 00001026 3002109d0254: 01a0: 63820410 00000000 03000000 00000000 00000000 00000000 00000000 00000000 3003* 3004t3 opcode: CP_LOAD_STATE4 (30) (35 dwords) 3005 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 1 } 3006 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 3007 :0:0000:0000[00000000x_00000000x] nop 3008 :6:0001:0001[c7c60000x_01c00000x] ldlv.u32 r0.x, l[0], 1 3009 :6:0002:0002[c7c60001x_01c00002x] ldlv.u32 r0.y, l[1], 1 3010 :6:0003:0003[c7c60002x_01c00004x] ldlv.u32 r0.z, l[2], 1 3011 :6:0004:0004[c7c60003x_01c00006x] ldlv.u32 r0.w, l[3], 1 3012 :2:0005:0005[473090fcx_00002000x] (ss)bary.f (ei)r63.x, 0, r0.x 3013 :0:0006:0006[03000000x_00000000x] end 3014 :0:0007:0007[00000000x_00000000x] nop 3015 :0:0008:0008[00000000x_00000000x] nop 3016 :0:0009:0009[00000000x_00000000x] nop 3017 :0:0010:0010[00000000x_00000000x] nop 3018 Stats: 3019 - shaderdb: 11 instr, 5 nops, 6 non-nops, 0 mov, 0 cov 3020 - shaderdb: 5 last-baryf, 0 half, 1 full, 0 constlen 3021 - shaderdb: 6 cat0, 0 cat1, 1 cat2, 0 cat3, 0 cat4, 0 cat5, 4 cat6, 0 cat7 3022 - shaderdb: 0 sstall, 1 (ss), 0 (sy) 3023109d02c0: 0000: c0213000 00700000 00000000 00000000 00000000 01c00000 c7c60000 01c00002 3024109d02e0: 0020: c7c60001 01c00004 c7c60002 01c00006 c7c60003 00002000 473090fc 00000000 3025109d0300: 0040: 03000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 3026* 3027t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 3028109d034c: 0000: c0002600 00000000 3029t3 opcode: CP_LOAD_STATE4 (30) (51 dwords) 3030 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 } 3031 { STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 } 3032109d0360: 4.276816 0.109522 0.611668 0.517565 0.677381 4.774377 -0.312365 -0.264309 3033109d0380: 2.500000 -1.480991 -0.961761 -0.813798 13.423393 -6.746271 38.893391 42.140564 3034109d03a0: 0.000000 0.160000 0.040000 1.000000 -0.064448 0.660942 0.747665 0.000000 3035109d03c0: 1.000000 0.000000 0.000000 0.000000 0.000000 0.000000 0.000000 1.000000 3036109d03e0: 0.000000 0.800000 0.200000 1.000000 0.000000 0.000000 0.000000 1.000000 3037109d0400: 0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 0.000000 3038109d0360: 0000: 4088dbad 3de04cdc 3f1c964b 3f047f2c 3f2d68da 4098c7b2 be9fee59 be875387 3039109d0380: 0020: 40200000 bfbd9119 bf7635f5 bf50550b 4156c638 c0d7e173 421b92d5 42288ff0 3040109d03a0: 0040: 00000000 3e23d70b 3d23d70b 3f800000 bd83fd0e 3f293379 3f3f66f5 00000000 3041109d03c0: 0060: 3f800000 00000000 00000000 00000000 00000000 00000000 00000000 3f800000 3042109d03e0: 0080: 00000000 3f4ccccd 3e4ccccd 3f800000 00000000 00000000 00000000 3f800000 3043109d0400: 00a0: 00000000 00000000 00000000 3f800000 02020000 02020202 02020202 00000202 3044109d0354: 0000: c0313000 03200000 00000001 4088dbad 3de04cdc 3f1c964b 3f047f2c 3f2d68da 3045109d0374: 0020: 4098c7b2 be9fee59 be875387 40200000 bfbd9119 bf7635f5 bf50550b 4156c638 3046109d0394: 0040: c0d7e173 421b92d5 42288ff0 00000000 3e23d70b 3d23d70b 3f800000 bd83fd0e 3047109d03b4: 0060: 3f293379 3f3f66f5 00000000 3f800000 00000000 00000000 00000000 00000000 3048109d03d4: 0080: 00000000 00000000 3f800000 00000000 3f4ccccd 3e4ccccd 3f800000 00000000 3049109d03f4: 00a0: 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000 02020000 3050109d0414: 00c0: 02020202 02020202 00000202 3051t3 opcode: CP_LOAD_STATE4 (30) (7 dwords) 3052 { DST_OFF = 13 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 1 } 3053 { STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 } 3054109d042c: 0.000000 -28026765312.000000 -28026765312.000000 -28026765312.000000 3055109d042c: 0000: 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0 3056109d0420: 0000: c0053000 0060000d 00000001 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0 3057t0 write VFD_FETCH[0].INSTR_0 (220a) 3058 VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 | SWITCHNEXT } 3059 VFD_FETCH[0].INSTR_1: 0x107cb000 3060 VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 } 3061 VFD_FETCH[0].INSTR_3: { STEPRATE = 1 } 3062109d043c: 0000: 0003220a 00080c0b 107cb000 00100000 00000001 3063t0 write VFD_DECODE[0].INSTR (228a) 3064 VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID | SWITCHNEXT } 3065109d0450: 0000: 0000228a 6c0020df 3066t0 write VFD_FETCH[0x1].INSTR_0 (220e) 3067 VFD_FETCH[0x1].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 } 3068 VFD_FETCH[0x1].INSTR_1: 0x107cb00c 3069 VFD_FETCH[0x1].INSTR_2: { SIZE = 0xffff4 } 3070 VFD_FETCH[0x1].INSTR_3: { STEPRATE = 1 } 3071109d0458: 0000: 0003220e 00000c0b 107cb00c 000ffff4 00000001 3072t0 write VFD_DECODE[0x1].INSTR (228b) 3073 VFD_DECODE[0x1].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r1.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID } 3074109d046c: 0000: 0000228b 2c0060df 3075t0 write VFD_CONTROL_0 (2200) 3076 VFD_CONTROL_0: { TOTALATTRTOVS = 8 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 2 | STRMFETCHINSTRCNT = 2 | 0xa0000 } 3077 VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x } 3078 VFD_CONTROL_2: 0 3079 VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x } 3080 VFD_CONTROL_4: 0 3081109d0474: 0000: 00042200 082a0008 fcfc0081 00000000 0000fc00 00000000 3082t0 write UCHE_INVALIDATE0 (0e8a) 3083 UCHE_INVALIDATE0: 0 3084 UCHE_INVALIDATE1: 0x12 3085109d048c: 0000: 00010e8a 00000000 00000012 3086t0 write VFD_INDEX_OFFSET (2208) 3087 VFD_INDEX_OFFSET: 0 3088 UNKNOWN_2209: 0 3089109d0498: 0000: 00012208 00000000 00000000 3090t0 write PC_RESTART_INDEX (21c6) 3091 PC_RESTART_INDEX: 0xffffffff 3092109d04a4: 0000: 000021c6 ffffffff 3093t0 write CP_SCRATCH[0x7].REG (057f) 3094 CP_SCRATCH[0x7].REG: 0x44 3095 :0,67,115,68 3096109d04ac: 0000: 0000057f 00000044 3097t3 opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords) 3098 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS } 3099 { NUM_INSTANCES = 1 } 3100 { NUM_INDICES = 240 } 3101 { FIRST_INDX = 0 } 3102 { INDX_BASE = 0x10bd0d20 } 3103 { INDX_SIZE = 480 } 3104 draw[11] register values 3105!+ 00000043 CP_SCRATCH[0x5].REG: 0x43 3106 :0,67,115,68 3107!+ 00000044 CP_SCRATCH[0x7].REG: 0x44 3108 :0,67,115,68 3109 + 00000000 UCHE_INVALIDATE0: 0 3110 + 00000012 UCHE_INVALIDATE1: 0x12 3111 + 00000000 GRAS_CNTL: { 0 } 3112 + 00000000 GRAS_ALPHA_CONTROL: { 0 } 3113 + 00000000 RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 } 3114 + 00000001 RB_FS_OUTPUT_REG: { MRT = 1 } 3115 + 80000016 RB_DEPTH_CONTROL: { Z_TEST_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_READ_ENABLE } 3116 + 42001004 VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 } 3117 + 00040400 VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 } 3118 + 00000055 VPC_VARYING_INTERP[0].MODE: 0x55 3119 + 00000000 VPC_VARYING_INTERP[0x1].MODE: 0 3120 + 00000000 VPC_VARYING_INTERP[0x2].MODE: 0 3121 + 00000000 VPC_VARYING_INTERP[0x3].MODE: 0 3122 + 00000000 VPC_VARYING_INTERP[0x4].MODE: 0 3123 + 00000000 VPC_VARYING_INTERP[0x5].MODE: 0 3124 + 00000000 VPC_VARYING_INTERP[0x6].MODE: 0 3125 + 00000000 VPC_VARYING_INTERP[0x7].MODE: 0 3126 + 00000000 VPC_VARYING_PS_REPL[0].MODE: 0 3127 + 00000000 VPC_VARYING_PS_REPL[0x1].MODE: 0 3128 + 00000000 VPC_VARYING_PS_REPL[0x2].MODE: 0 3129 + 00000000 VPC_VARYING_PS_REPL[0x3].MODE: 0 3130 + 00000000 VPC_VARYING_PS_REPL[0x4].MODE: 0 3131 + 00000000 VPC_VARYING_PS_REPL[0x5].MODE: 0 3132 + 00000000 VPC_VARYING_PS_REPL[0x6].MODE: 0 3133 + 00000000 VPC_VARYING_PS_REPL[0x7].MODE: 0 3134 + 02000001 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 3135 + 00000012 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 3136 + ffffffff PC_RESTART_INDEX: 0xffffffff 3137!+ 082a0008 VFD_CONTROL_0: { TOTALATTRTOVS = 8 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 2 | STRMFETCHINSTRCNT = 2 | 0xa0000 } 3138 + fcfc0081 VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x } 3139 + 00000000 VFD_CONTROL_2: 0 3140 + 0000fc00 VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x } 3141 + 00000000 VFD_CONTROL_4: 0 3142 + 00000000 VFD_INDEX_OFFSET: 0 3143 + 00000000 UNKNOWN_2209: 0 3144!+ 00080c0b VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 | SWITCHNEXT } 3145 + 107cb000 VFD_FETCH[0].INSTR_1: 0x107cb000 3146 + 00100000 VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 } 3147 + 00000001 VFD_FETCH[0].INSTR_3: { STEPRATE = 1 } 3148 + 00000c0b VFD_FETCH[0x1].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 } 3149 + 107cb00c VFD_FETCH[0x1].INSTR_1: 0x107cb00c 3150 + 000ffff4 VFD_FETCH[0x1].INSTR_2: { SIZE = 0xffff4 } 3151 + 00000001 VFD_FETCH[0x1].INSTR_3: { STEPRATE = 1 } 3152!+ 6c0020df VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID | SWITCHNEXT } 3153 + 2c0060df VFD_DECODE[0x1].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r1.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID } 3154 + 00140010 SP_SP_CTRL_REG: { 0x140010 } 3155 + 000005ff SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f } 3156!+ 00201400 SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE } 3157!+ 08000042 SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 } 3158!+ 0010fc0a SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 } 3159!+ 00001e0e SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 } 3160 + 08080808 SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 } 3161 + 00000000 SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 3162!+ 10cd5000 SP_VS_OBJ_START: 0x10cd5000 3163 + 00000004 SP_VS_LENGTH_REG: 4 3164 + 00340402 SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE } 3165 + 8010003e SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 } 3166 + 7e420000 SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 3167 + 10cd2000 SP_FS_OBJ_START: 0x10cd2000 3168 + 00000001 SP_FS_LENGTH_REG: 1 3169 + 0000fc01 SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x } 3170 + 0001a000 SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM } 3171 + 00000000 SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 } 3172 + 00000000 SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 } 3173 + 00000000 SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 } 3174 + 00000000 SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 } 3175 + 00000000 SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 } 3176 + 00000000 SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 } 3177 + 00000000 SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 } 3178 + 7e420000 SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 3179 + 7e420000 SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 3180 + 7e420000 SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 3181 + 28000250 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE } 3182 + fcfc0100 HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x } 3183 + fff3f3f0 HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x } 3184 + fcfcfcfc HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x } 3185 + 00fcfcfc HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 } 3186 + 04000042 HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 } 3187 + 017e423e HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 } 3188 + 007e4200 HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 3189 + 007e4200 HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 3190 + 007e4200 HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 3191 + 00000003 HLSQ_UPDATE_CONTROL: 0x3 3192109d04b4: 0000: c0053800 00000404 00000001 000000f0 00000000 10bd0d20 000001e0 3193t0 write CP_SCRATCH[0x7].REG (057f) 3194 CP_SCRATCH[0x7].REG: 0x45 3195 :0,67,115,69 3196109d04d0: 0000: 0000057f 00000045 3197t0 write CP_SCRATCH[0x5].REG (057d) 3198 CP_SCRATCH[0x5].REG: 0x49 3199 :0,73,115,69 3200109d04d8: 0000: 0000057d 00000049 3201t0 write RB_DEPTH_CONTROL (2101) 3202 RB_DEPTH_CONTROL: { Z_TEST_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_READ_ENABLE } 3203109d04e0: 0000: 00002101 80000016 3204t0 write GRAS_ALPHA_CONTROL (2073) 3205 GRAS_ALPHA_CONTROL: { 0 } 3206109d04e8: 0000: 00002073 00000000 3207t0 write GRAS_SU_MODE_CONTROL (2078) 3208 GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS } 3209109d04f0: 0000: 00002078 00100012 3210t0 write GRAS_SU_POINT_MINMAX (2070) 3211 GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 } 3212 GRAS_SU_POINT_SIZE: 1.000000 3213109d04f8: 0000: 00012070 00100010 00000010 3214t0 write GRAS_SU_POLY_OFFSET_SCALE (2074) 3215 GRAS_SU_POLY_OFFSET_SCALE: 0.000000 3216 GRAS_SU_POLY_OFFSET_OFFSET: 0.000000 3217 GRAS_SU_POLY_OFFSET_CLAMP: 0.000000 3218109d0504: 0000: 00022074 00000000 00000000 00000000 3219t0 write GRAS_CL_CLIP_CNTL (2000) 3220 GRAS_CL_CLIP_CNTL: { 0x80000 } 3221109d0514: 0000: 00002000 00080000 3222t0 write PC_PRIM_VTX_CNTL (21c4) 3223 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 3224 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 3225109d051c: 0000: 000121c4 02000001 00000012 3226t0 write GRAS_SC_WINDOW_SCISSOR_BR (209c) 3227 GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 } 3228 GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 3229109d0528: 0000: 0001209c 012b012b 00000000 3230t0 write RB_VPORT_Z_CLAMP[0].MIN (2120) 3231 RB_VPORT_Z_CLAMP[0].MIN: 0 3232 RB_VPORT_Z_CLAMP[0].MAX: 0xffffff 3233109d0534: 0000: 00012120 00000000 00ffffff 3234t0 write HLSQ_UPDATE_CONTROL (23db) 3235 HLSQ_UPDATE_CONTROL: 0x3 3236109d0540: 0000: 000023db 00000003 3237t0 write HLSQ_CONTROL_0_REG (23c0) 3238 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE } 3239 HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x } 3240 HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x } 3241 HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r0.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x } 3242 HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 } 3243109d0548: 0000: 000423c0 28000250 fcfc0100 fff3f3f0 fcfcfc00 00fcfcfc 3244t0 write HLSQ_VS_CONTROL_REG (23c5) 3245 HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 } 3246 HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 } 3247 HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 3248 HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 3249 HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 3250109d0560: 0000: 000423c5 04000042 017e423e 007e4200 007e4200 007e4200 3251t0 write SP_SP_CTRL_REG (22c0) 3252 SP_SP_CTRL_REG: { 0x140010 } 3253109d0578: 0000: 000022c0 00140010 3254t0 write SP_INSTR_CACHE_CTRL (22c1) 3255 SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f } 3256109d0580: 0000: 000022c1 000005ff 3257t0 write SP_VS_LENGTH_REG (22e5) 3258 SP_VS_LENGTH_REG: 4 3259109d0588: 0000: 000022e5 00000004 3260t0 write SP_VS_CTRL_REG0 (22c4) 3261 SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE } 3262 SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 } 3263 SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 } 3264109d0590: 0000: 000222c4 00201400 08000042 0010fc0a 3265t0 write SP_VS_OUT[0].REG (22c7) 3266 SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 } 3267109d05a0: 0000: 000022c7 00001e0e 3268t0 write SP_VS_VPC_DST[0].REG (22d8) 3269 SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 } 3270109d05a8: 0000: 000022d8 08080808 3271t0 write SP_VS_OBJ_OFFSET_REG (22e0) 3272 SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 3273 SP_VS_OBJ_START: 0x10cd5000 3274109d05b0: 0000: 000122e0 00000000 10cd5000 3275t0 write SP_FS_LENGTH_REG (22ef) 3276 SP_FS_LENGTH_REG: 1 3277109d05bc: 0000: 000022ef 00000001 3278t0 write SP_FS_CTRL_REG0 (22e8) 3279 SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 2 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE } 3280 SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 } 3281109d05c4: 0000: 000122e8 00340802 8010003e 3282t0 write SP_FS_OBJ_OFFSET_REG (22ea) 3283 SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 3284 SP_FS_OBJ_START: 0x108cb000 3285109d05d0: 0000: 000122ea 7e420000 108cb000 3286t0 write SP_HS_OBJ_OFFSET_REG (230d) 3287 SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 3288109d05dc: 0000: 0000230d 7e420000 3289t0 write SP_DS_OBJ_OFFSET_REG (2334) 3290 SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 3291109d05e4: 0000: 00002334 7e420000 3292t0 write SP_GS_OBJ_OFFSET_REG (235b) 3293 SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 3294109d05ec: 0000: 0000235b 7e420000 3295t0 write GRAS_CNTL (2003) 3296 GRAS_CNTL: { IJ_PERSP } 3297109d05f4: 0000: 00002003 00000001 3298t0 write RB_RENDER_CONTROL2 (20a3) 3299 RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 | IJ_PERSP_PIXEL } 3300109d05fc: 0000: 000020a3 00001000 3301t0 write RB_FS_OUTPUT_REG (2100) 3302 RB_FS_OUTPUT_REG: { MRT = 1 } 3303109d0604: 0000: 00002100 00000001 3304t0 write SP_FS_OUTPUT_REG (22f0) 3305 SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x } 3306109d060c: 0000: 000022f0 0000fc01 3307t0 write SP_FS_MRT[0].REG (22f1) 3308 SP_FS_MRT[0].REG: { REGID = r0.z | MRTFORMAT = RB4_R8G8B8A8_UNORM } 3309 SP_FS_MRT[0x1].REG: { REGID = r0.z | MRTFORMAT = 0 } 3310 SP_FS_MRT[0x2].REG: { REGID = r0.z | MRTFORMAT = 0 } 3311 SP_FS_MRT[0x3].REG: { REGID = r0.z | MRTFORMAT = 0 } 3312 SP_FS_MRT[0x4].REG: { REGID = r0.z | MRTFORMAT = 0 } 3313 SP_FS_MRT[0x5].REG: { REGID = r0.z | MRTFORMAT = 0 } 3314 SP_FS_MRT[0x6].REG: { REGID = r0.z | MRTFORMAT = 0 } 3315 SP_FS_MRT[0x7].REG: { REGID = r0.z | MRTFORMAT = 0 } 3316109d0614: 0000: 000722f1 0001a002 00000002 00000002 00000002 00000002 00000002 00000002 3317109d0634: 0020: 00000002 3318t0 write VPC_ATTR (2140) 3319 VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 } 3320 VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 } 3321109d0638: 0000: 00012140 42001004 00040400 3322t0 write VPC_VARYING_INTERP[0].MODE (2142) 3323 VPC_VARYING_INTERP[0].MODE: 0 3324 VPC_VARYING_INTERP[0x1].MODE: 0 3325 VPC_VARYING_INTERP[0x2].MODE: 0 3326 VPC_VARYING_INTERP[0x3].MODE: 0 3327 VPC_VARYING_INTERP[0x4].MODE: 0 3328 VPC_VARYING_INTERP[0x5].MODE: 0 3329 VPC_VARYING_INTERP[0x6].MODE: 0 3330 VPC_VARYING_INTERP[0x7].MODE: 0 3331109d0644: 0000: 00072142 00000000 00000000 00000000 00000000 00000000 00000000 00000000 3332* 3333t0 write VPC_VARYING_PS_REPL[0].MODE (214a) 3334 VPC_VARYING_PS_REPL[0].MODE: 0 3335 VPC_VARYING_PS_REPL[0x1].MODE: 0 3336 VPC_VARYING_PS_REPL[0x2].MODE: 0 3337 VPC_VARYING_PS_REPL[0x3].MODE: 0 3338 VPC_VARYING_PS_REPL[0x4].MODE: 0 3339 VPC_VARYING_PS_REPL[0x5].MODE: 0 3340 VPC_VARYING_PS_REPL[0x6].MODE: 0 3341 VPC_VARYING_PS_REPL[0x7].MODE: 0 3342109d0668: 0000: 0007214a 00000000 00000000 00000000 00000000 00000000 00000000 00000000 3343* 3344t3 opcode: CP_LOAD_STATE4 (30) (131 dwords) 3345 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 4 } 3346 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 3347 :2:0000:0000[40700000x_10000002x] mul.f r0.x, r0.z, c0.x 3348 :2:0001:0001[40700001x_10030002x] mul.f r0.y, r0.z, c0.w 3349 :3:0002:0002[63818000x_00001004x] mad.f32 r0.x, c1.x, r0.w, r0.x 3350 :3:0003:0003[63818001x_00011007x] mad.f32 r0.y, c1.w, r0.w, r0.y 3351 :3:0004:0004[63820000x_00001008x] mad.f32 r0.x, c2.x, r1.x, r0.x 3352 :3:0005:0005[63820001x_0001100bx] mad.f32 r0.y, c2.w, r1.x, r0.y 3353 :3:0006:0006[6382800ax_0000100cx] mad.f32 r2.z, c3.x, r1.y, r0.x 3354 :2:0007:0007[40700000x_10010002x] mul.f r0.x, r0.z, c0.y 3355 :3:0008:0008[6382800dx_0001100fx] mad.f32 r3.y, c3.w, r1.y, r0.y 3356 :3:0009:0009[63818000x_00001005x] mad.f32 r0.x, c1.y, r0.w, r0.x 3357 :1:0010:0010[20244001x_00000010x] mov.f32f32 r0.y, c4.x 3358 :3:0011:0011[63820000x_00001009x] mad.f32 r0.x, c2.y, r1.x, r0.x 3359 :0:0012:0012[00000000x_00000000x] nop 3360 :3:0013:0013[6382800bx_0000100dx] mad.f32 r2.w, c3.y, r1.y, r0.x 3361 :2:0014:0014[40700000x_10020002x] mul.f r0.x, r0.z, c0.z 3362 :2:0015:0015[40100001x_0001101cx] add.f r0.y, c7.x, r0.y 3363 :3:0016:0016[63818000x_00001006x] mad.f32 r0.x, c1.z, r0.w, r0.x 3364 :1:0017:0017[20244002x_00000011x] mov.f32f32 r0.z, c4.y 3365 :3:0018:0018[63820000x_0000100ax] mad.f32 r0.x, c2.z, r1.x, r0.x 3366 :1:0019:0019[20244004x_00000013x] mov.f32f32 r1.x, c4.w 3367 :3:0020:0020[6382800cx_0000100ex] mad.f32 r3.x, c3.z, r1.y, r0.x 3368 :2:0021:0021[40700000x_00070007x] mul.f r0.x, r1.w, r1.w 3369 :2:0022:0022[40100002x_0002101dx] add.f r0.z, c7.y, r0.z 3370 :3:0023:0023[63830000x_00000006x] mad.f32 r0.x, r1.z, r1.z, r0.x 3371 :2:0024:0024[40500411x_00041013x] (sat)max.f r4.y, c4.w, r1.x 3372 :3:0025:0025[63840000x_00000008x] mad.f32 r0.x, r2.x, r2.x, r0.x 3373 :1:0026:0026[20244003x_00000012x] mov.f32f32 r0.w, c4.z 3374 :0:0027:0027[00000200x_00000000x] (rpt2)nop 3375 :2:0028:0030[40100003x_0003101ex] add.f r0.w, c7.z, r0.w 3376 :0:0029:0031[00000000x_00000000x] nop 3377 :4:0030:0032[80300000x_00000000x] rsq r0.x, r0.x 3378 :2:0031:0033[40701004x_00000007x] (ss)mul.f r1.x, r1.w, r0.x 3379 :0:0032:0034[00000200x_00000000x] (rpt2)nop 3380 :2:0033:0037[40700004x_10150004x] mul.f r1.x, r1.x, c5.y 3381 :2:0034:0038[40700005x_00000006x] mul.f r1.y, r1.z, r0.x 3382 :0:0035:0039[00000200x_00000000x] (rpt2)nop 3383 :3:0036:0042[63828004x_00041014x] mad.f32 r1.x, c5.x, r1.y, r1.x 3384 :2:0037:0043[40700000x_00000008x] mul.f r0.x, r2.x, r0.x 3385 :0:0038:0044[00000200x_00000000x] (rpt2)nop 3386 :3:0039:0047[63800000x_00041016x] mad.f32 r0.x, c5.z, r0.x, r1.x 3387 :0:0040:0048[00000200x_00000000x] (rpt2)nop 3388 :2:0041:0051[40b00004x_00001034x] cmps.f.lt r1.x, c13.x, r0.x 3389 :2:0042:0052[40500000x_00001034x] max.f r0.x, c13.x, r0.x 3390 :0:0043:0053[00000100x_00000000x] (rpt1)nop 3391 :1:0044:0055[200c4004x_00000004x] cov.u32f32 r1.x, r1.x 3392 :3:0045:0056[63800001x_00011020x] mad.f32 r0.y, c8.x, r0.x, r0.y 3393 :3:0046:0057[63800002x_00021021x] mad.f32 r0.z, c8.y, r0.x, r0.z 3394 :3:0047:0058[63800000x_00031022x] mad.f32 r0.x, c8.z, r0.x, r0.w 3395 :3:0048:0059[6382040ex_00011024x] (sat)mad.f32 r3.z, c9.x, r1.x, r0.y 3396 :3:0049:0060[6382040fx_00021025x] (sat)mad.f32 r3.w, c9.y, r1.x, r0.z 3397 :3:0050:0061[63820410x_00001026x] (sat)mad.f32 r4.x, c9.z, r1.x, r0.x 3398 :0:0051:0062[03000000x_00000000x] end 3399 :0:0052:0063[00000000x_00000000x] nop 3400 :0:0053:0064[00000000x_00000000x] nop 3401 :0:0054:0065[00000000x_00000000x] nop 3402 :0:0055:0066[00000000x_00000000x] nop 3403 Stats: 3404 - shaderdb: 67 instr, 23 nops, 44 non-nops, 4 mov, 1 cov 3405 - shaderdb: 0 last-baryf, 0 half, 5 full, 13 constlen 3406 - shaderdb: 24 cat0, 5 cat1, 15 cat2, 22 cat3, 1 cat4, 0 cat5, 0 cat6, 0 cat7 3407 - shaderdb: 10 sstall, 1 (ss), 0 (sy) 3408109d068c: 0000: c0813000 01200000 00000000 10000002 40700000 10030002 40700001 00001004 3409109d06ac: 0020: 63818000 00011007 63818001 00001008 63820000 0001100b 63820001 0000100c 3410109d06cc: 0040: 6382800a 10010002 40700000 0001100f 6382800d 00001005 63818000 00000010 3411109d06ec: 0060: 20244001 00001009 63820000 00000000 00000000 0000100d 6382800b 10020002 3412109d070c: 0080: 40700000 0001101c 40100001 00001006 63818000 00000011 20244002 0000100a 3413109d072c: 00a0: 63820000 00000013 20244004 0000100e 6382800c 00070007 40700000 0002101d 3414109d074c: 00c0: 40100002 00000006 63830000 00041013 40500411 00000008 63840000 00000012 3415109d076c: 00e0: 20244003 00000000 00000200 0003101e 40100003 00000000 00000000 00000000 3416109d078c: 0100: 80300000 00000007 40701004 00000000 00000200 10150004 40700004 00000006 3417109d07ac: 0120: 40700005 00000000 00000200 00041014 63828004 00000008 40700000 00000000 3418109d07cc: 0140: 00000200 00041016 63800000 00000000 00000200 00001034 40b00004 00001034 3419109d07ec: 0160: 40500000 00000000 00000100 00000004 200c4004 00011020 63800001 00021021 3420109d080c: 0180: 63800002 00031022 63800000 00011024 6382040e 00021025 6382040f 00001026 3421109d082c: 01a0: 63820410 00000000 03000000 00000000 00000000 00000000 00000000 00000000 3422* 3423t3 opcode: CP_LOAD_STATE4 (30) (35 dwords) 3424 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 1 } 3425 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 3426 :2:0000:0000[47300002x_00002000x] bary.f r0.z, 0, r0.x 3427 :2:0001:0001[47300003x_00002001x] bary.f r0.w, 1, r0.x 3428 :2:0002:0002[47300004x_00002002x] bary.f r1.x, 2, r0.x 3429 :2:0003:0003[47308005x_00002003x] bary.f (ei)r1.y, 3, r0.x 3430 :0:0004:0004[03000000x_00000000x] end 3431 :0:0005:0005[00000000x_00000000x] nop 3432 :0:0006:0006[00000000x_00000000x] nop 3433 :0:0007:0007[00000000x_00000000x] nop 3434 :0:0008:0008[00000000x_00000000x] nop 3435 Stats: 3436 - shaderdb: 9 instr, 4 nops, 5 non-nops, 0 mov, 0 cov 3437 - shaderdb: 3 last-baryf, 0 half, 2 full, 0 constlen 3438 - shaderdb: 5 cat0, 0 cat1, 4 cat2, 0 cat3, 0 cat4, 0 cat5, 0 cat6, 0 cat7 3439 - shaderdb: 0 sstall, 0 (ss), 0 (sy) 3440109d0898: 0000: c0213000 00700000 00000000 00002000 47300002 00002001 47300003 00002002 3441109d08b8: 0020: 47300004 00002003 47308005 00000000 03000000 00000000 00000000 00000000 3442* 3443t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 3444109d0924: 0000: c0002600 00000000 3445t3 opcode: CP_LOAD_STATE4 (30) (51 dwords) 3446 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 } 3447 { STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 } 3448109d0938: 4.276816 0.109522 0.611668 0.517565 0.677381 4.774377 -0.312365 -0.264309 3449109d0958: 2.500000 -1.480991 -0.961761 -0.813798 13.423393 -6.746271 38.893391 42.140564 3450109d0978: 0.000000 0.160000 0.040000 1.000000 -0.064448 0.660942 0.747665 0.000000 3451109d0998: 1.000000 0.000000 0.000000 0.000000 0.000000 0.000000 0.000000 1.000000 3452109d09b8: 0.000000 0.800000 0.200000 1.000000 0.000000 0.000000 0.000000 1.000000 3453109d09d8: 0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 0.000000 3454109d0938: 0000: 4088dbad 3de04cdc 3f1c964b 3f047f2c 3f2d68da 4098c7b2 be9fee59 be875387 3455109d0958: 0020: 40200000 bfbd9119 bf7635f5 bf50550b 4156c638 c0d7e173 421b92d5 42288ff0 3456109d0978: 0040: 00000000 3e23d70b 3d23d70b 3f800000 bd83fd0e 3f293379 3f3f66f5 00000000 3457109d0998: 0060: 3f800000 00000000 00000000 00000000 00000000 00000000 00000000 3f800000 3458109d09b8: 0080: 00000000 3f4ccccd 3e4ccccd 3f800000 00000000 00000000 00000000 3f800000 3459109d09d8: 00a0: 00000000 00000000 00000000 3f800000 02020000 02020202 02020202 00000202 3460109d092c: 0000: c0313000 03200000 00000001 4088dbad 3de04cdc 3f1c964b 3f047f2c 3f2d68da 3461109d094c: 0020: 4098c7b2 be9fee59 be875387 40200000 bfbd9119 bf7635f5 bf50550b 4156c638 3462109d096c: 0040: c0d7e173 421b92d5 42288ff0 00000000 3e23d70b 3d23d70b 3f800000 bd83fd0e 3463109d098c: 0060: 3f293379 3f3f66f5 00000000 3f800000 00000000 00000000 00000000 00000000 3464109d09ac: 0080: 00000000 00000000 3f800000 00000000 3f4ccccd 3e4ccccd 3f800000 00000000 3465109d09cc: 00a0: 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000 02020000 3466109d09ec: 00c0: 02020202 02020202 00000202 3467t0 write VFD_INDEX_OFFSET (2208) 3468 VFD_INDEX_OFFSET: 0 3469 UNKNOWN_2209: 0 3470109d09f8: 0000: 00012208 00000000 00000000 3471t0 write PC_RESTART_INDEX (21c6) 3472 PC_RESTART_INDEX: 0xffffffff 3473109d0a04: 0000: 000021c6 ffffffff 3474t0 write CP_SCRATCH[0x7].REG (057f) 3475 CP_SCRATCH[0x7].REG: 0x4a 3476 :0,73,115,74 3477109d0a0c: 0000: 0000057f 0000004a 3478t3 opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords) 3479 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS } 3480 { NUM_INSTANCES = 1 } 3481 { NUM_INDICES = 60 } 3482 { FIRST_INDX = 0 } 3483 { INDX_BASE = 0x10bd0f00 } 3484 { INDX_SIZE = 120 } 3485 draw[12] register values 3486!+ 00000049 CP_SCRATCH[0x5].REG: 0x49 3487 :0,73,115,74 3488!+ 0000004a CP_SCRATCH[0x7].REG: 0x4a 3489 :0,73,115,74 3490 + 00080000 GRAS_CL_CLIP_CNTL: { 0x80000 } 3491!+ 00000001 GRAS_CNTL: { IJ_PERSP } 3492 + 00100010 GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 } 3493 + 00000010 GRAS_SU_POINT_SIZE: 1.000000 3494 + 00000000 GRAS_ALPHA_CONTROL: { 0 } 3495 + 00000000 GRAS_SU_POLY_OFFSET_SCALE: 0.000000 3496 + 00000000 GRAS_SU_POLY_OFFSET_OFFSET: 0.000000 3497 + 00000000 GRAS_SU_POLY_OFFSET_CLAMP: 0.000000 3498 + 00100012 GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS } 3499 + 012b012b GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 } 3500 + 00000000 GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 3501!+ 00001000 RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 | IJ_PERSP_PIXEL } 3502 + 00000001 RB_FS_OUTPUT_REG: { MRT = 1 } 3503 + 80000016 RB_DEPTH_CONTROL: { Z_TEST_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_READ_ENABLE } 3504 + 00000000 RB_VPORT_Z_CLAMP[0].MIN: 0 3505 + 00ffffff RB_VPORT_Z_CLAMP[0].MAX: 0xffffff 3506 + 42001004 VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 } 3507 + 00040400 VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 } 3508!+ 00000000 VPC_VARYING_INTERP[0].MODE: 0 3509 + 00000000 VPC_VARYING_INTERP[0x1].MODE: 0 3510 + 00000000 VPC_VARYING_INTERP[0x2].MODE: 0 3511 + 00000000 VPC_VARYING_INTERP[0x3].MODE: 0 3512 + 00000000 VPC_VARYING_INTERP[0x4].MODE: 0 3513 + 00000000 VPC_VARYING_INTERP[0x5].MODE: 0 3514 + 00000000 VPC_VARYING_INTERP[0x6].MODE: 0 3515 + 00000000 VPC_VARYING_INTERP[0x7].MODE: 0 3516 + 00000000 VPC_VARYING_PS_REPL[0].MODE: 0 3517 + 00000000 VPC_VARYING_PS_REPL[0x1].MODE: 0 3518 + 00000000 VPC_VARYING_PS_REPL[0x2].MODE: 0 3519 + 00000000 VPC_VARYING_PS_REPL[0x3].MODE: 0 3520 + 00000000 VPC_VARYING_PS_REPL[0x4].MODE: 0 3521 + 00000000 VPC_VARYING_PS_REPL[0x5].MODE: 0 3522 + 00000000 VPC_VARYING_PS_REPL[0x6].MODE: 0 3523 + 00000000 VPC_VARYING_PS_REPL[0x7].MODE: 0 3524 + 02000001 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 3525 + 00000012 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 3526 + ffffffff PC_RESTART_INDEX: 0xffffffff 3527 + 00000000 VFD_INDEX_OFFSET: 0 3528 + 00000000 UNKNOWN_2209: 0 3529 + 00140010 SP_SP_CTRL_REG: { 0x140010 } 3530 + 000005ff SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f } 3531 + 00201400 SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE } 3532 + 08000042 SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 } 3533 + 0010fc0a SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 } 3534 + 00001e0e SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 } 3535 + 08080808 SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 } 3536 + 00000000 SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 3537 + 10cd5000 SP_VS_OBJ_START: 0x10cd5000 3538 + 00000004 SP_VS_LENGTH_REG: 4 3539!+ 00340802 SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 2 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE } 3540 + 8010003e SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 } 3541 + 7e420000 SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 3542!+ 108cb000 SP_FS_OBJ_START: 0x108cb000 3543 + 00000001 SP_FS_LENGTH_REG: 1 3544 + 0000fc01 SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x } 3545!+ 0001a002 SP_FS_MRT[0].REG: { REGID = r0.z | MRTFORMAT = RB4_R8G8B8A8_UNORM } 3546!+ 00000002 SP_FS_MRT[0x1].REG: { REGID = r0.z | MRTFORMAT = 0 } 3547!+ 00000002 SP_FS_MRT[0x2].REG: { REGID = r0.z | MRTFORMAT = 0 } 3548!+ 00000002 SP_FS_MRT[0x3].REG: { REGID = r0.z | MRTFORMAT = 0 } 3549!+ 00000002 SP_FS_MRT[0x4].REG: { REGID = r0.z | MRTFORMAT = 0 } 3550!+ 00000002 SP_FS_MRT[0x5].REG: { REGID = r0.z | MRTFORMAT = 0 } 3551!+ 00000002 SP_FS_MRT[0x6].REG: { REGID = r0.z | MRTFORMAT = 0 } 3552!+ 00000002 SP_FS_MRT[0x7].REG: { REGID = r0.z | MRTFORMAT = 0 } 3553 + 7e420000 SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 3554 + 7e420000 SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 3555 + 7e420000 SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 3556 + 28000250 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE } 3557 + fcfc0100 HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x } 3558 + fff3f3f0 HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x } 3559!+ fcfcfc00 HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r0.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x } 3560 + 00fcfcfc HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 } 3561 + 04000042 HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 } 3562 + 017e423e HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 } 3563 + 007e4200 HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 3564 + 007e4200 HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 3565 + 007e4200 HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 3566 + 00000003 HLSQ_UPDATE_CONTROL: 0x3 3567109d0a14: 0000: c0053800 00000404 00000001 0000003c 00000000 10bd0f00 00000078 3568t0 write CP_SCRATCH[0x7].REG (057f) 3569 CP_SCRATCH[0x7].REG: 0x4b 3570 :0,73,115,75 3571109d0a30: 0000: 0000057f 0000004b 3572t0 write CP_SCRATCH[0x5].REG (057d) 3573 CP_SCRATCH[0x5].REG: 0x4f 3574 :0,79,115,75 3575109d0a38: 0000: 0000057d 0000004f 3576t0 write RB_DEPTH_CONTROL (2101) 3577 RB_DEPTH_CONTROL: { Z_TEST_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_READ_ENABLE } 3578109d0a40: 0000: 00002101 80000016 3579t0 write GRAS_ALPHA_CONTROL (2073) 3580 GRAS_ALPHA_CONTROL: { 0 } 3581109d0a48: 0000: 00002073 00000000 3582t0 write GRAS_SU_MODE_CONTROL (2078) 3583 GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS } 3584109d0a50: 0000: 00002078 00100012 3585t0 write GRAS_SU_POINT_MINMAX (2070) 3586 GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 } 3587 GRAS_SU_POINT_SIZE: 1.000000 3588109d0a58: 0000: 00012070 00100010 00000010 3589t0 write GRAS_SU_POLY_OFFSET_SCALE (2074) 3590 GRAS_SU_POLY_OFFSET_SCALE: 0.000000 3591 GRAS_SU_POLY_OFFSET_OFFSET: 0.000000 3592 GRAS_SU_POLY_OFFSET_CLAMP: 0.000000 3593109d0a64: 0000: 00022074 00000000 00000000 00000000 3594t0 write GRAS_CL_CLIP_CNTL (2000) 3595 GRAS_CL_CLIP_CNTL: { 0x80000 } 3596109d0a74: 0000: 00002000 00080000 3597t0 write PC_PRIM_VTX_CNTL (21c4) 3598 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 3599 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 3600109d0a7c: 0000: 000121c4 02000001 00000012 3601t0 write GRAS_SC_WINDOW_SCISSOR_BR (209c) 3602 GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 } 3603 GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 3604109d0a88: 0000: 0001209c 012b012b 00000000 3605t0 write RB_VPORT_Z_CLAMP[0].MIN (2120) 3606 RB_VPORT_Z_CLAMP[0].MIN: 0 3607 RB_VPORT_Z_CLAMP[0].MAX: 0xffffff 3608109d0a94: 0000: 00012120 00000000 00ffffff 3609t0 write HLSQ_UPDATE_CONTROL (23db) 3610 HLSQ_UPDATE_CONTROL: 0x3 3611109d0aa0: 0000: 000023db 00000003 3612t0 write HLSQ_CONTROL_0_REG (23c0) 3613 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE } 3614 HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x } 3615 HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x } 3616 HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x } 3617 HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 } 3618109d0aa8: 0000: 000423c0 28000250 fcfc0100 fff3f3f0 fcfcfcfc 00fcfcfc 3619t0 write HLSQ_VS_CONTROL_REG (23c5) 3620 HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 } 3621 HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 } 3622 HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 3623 HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 3624 HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 3625109d0ac0: 0000: 000423c5 04000042 017e423e 007e4200 007e4200 007e4200 3626t0 write SP_SP_CTRL_REG (22c0) 3627 SP_SP_CTRL_REG: { 0x140010 } 3628109d0ad8: 0000: 000022c0 00140010 3629t0 write SP_INSTR_CACHE_CTRL (22c1) 3630 SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f } 3631109d0ae0: 0000: 000022c1 000005ff 3632t0 write SP_VS_LENGTH_REG (22e5) 3633 SP_VS_LENGTH_REG: 4 3634109d0ae8: 0000: 000022e5 00000004 3635t0 write SP_VS_CTRL_REG0 (22c4) 3636 SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 4 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE } 3637 SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 4 } 3638 SP_VS_PARAM_REG: { POSREGID = r1.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 } 3639109d0af0: 0000: 000222c4 00201000 04000042 0010fc06 3640t0 write SP_VS_OUT[0].REG (22c7) 3641 SP_VS_OUT[0].REG: { A_REGID = r2.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 } 3642109d0b00: 0000: 000022c7 00001e0a 3643t0 write SP_VS_VPC_DST[0].REG (22d8) 3644 SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 } 3645109d0b08: 0000: 000022d8 08080808 3646t0 write SP_VS_OBJ_OFFSET_REG (22e0) 3647 SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 3648 SP_VS_OBJ_START: 0x10cd0000 3649109d0b10: 0000: 000122e0 00000000 10cd0000 3650t0 write SP_FS_LENGTH_REG (22ef) 3651 SP_FS_LENGTH_REG: 1 3652109d0b1c: 0000: 000022ef 00000001 3653t0 write SP_FS_CTRL_REG0 (22e8) 3654 SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE } 3655 SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 } 3656109d0b24: 0000: 000122e8 00340402 8010003e 3657t0 write SP_FS_OBJ_OFFSET_REG (22ea) 3658 SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 3659 SP_FS_OBJ_START: 0x10cd2000 3660109d0b30: 0000: 000122ea 7e420000 10cd2000 3661t0 write SP_HS_OBJ_OFFSET_REG (230d) 3662 SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 3663109d0b3c: 0000: 0000230d 7e420000 3664t0 write SP_DS_OBJ_OFFSET_REG (2334) 3665 SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 3666109d0b44: 0000: 00002334 7e420000 3667t0 write SP_GS_OBJ_OFFSET_REG (235b) 3668 SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 3669109d0b4c: 0000: 0000235b 7e420000 3670t0 write GRAS_CNTL (2003) 3671 GRAS_CNTL: { 0 } 3672109d0b54: 0000: 00002003 00000000 3673t0 write RB_RENDER_CONTROL2 (20a3) 3674 RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 } 3675109d0b5c: 0000: 000020a3 00000000 3676t0 write RB_FS_OUTPUT_REG (2100) 3677 RB_FS_OUTPUT_REG: { MRT = 1 } 3678109d0b64: 0000: 00002100 00000001 3679t0 write SP_FS_OUTPUT_REG (22f0) 3680 SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x } 3681109d0b6c: 0000: 000022f0 0000fc01 3682t0 write SP_FS_MRT[0].REG (22f1) 3683 SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM } 3684 SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 } 3685 SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 } 3686 SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 } 3687 SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 } 3688 SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 } 3689 SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 } 3690 SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 } 3691109d0b74: 0000: 000722f1 0001a000 00000000 00000000 00000000 00000000 00000000 00000000 3692* 3693t0 write VPC_ATTR (2140) 3694 VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 } 3695 VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 } 3696109d0b98: 0000: 00012140 42001004 00040400 3697t0 write VPC_VARYING_INTERP[0].MODE (2142) 3698 VPC_VARYING_INTERP[0].MODE: 0x55 3699 VPC_VARYING_INTERP[0x1].MODE: 0 3700 VPC_VARYING_INTERP[0x2].MODE: 0 3701 VPC_VARYING_INTERP[0x3].MODE: 0 3702 VPC_VARYING_INTERP[0x4].MODE: 0 3703 VPC_VARYING_INTERP[0x5].MODE: 0 3704 VPC_VARYING_INTERP[0x6].MODE: 0 3705 VPC_VARYING_INTERP[0x7].MODE: 0 3706109d0ba4: 0000: 00072142 00000055 00000000 00000000 00000000 00000000 00000000 00000000 3707* 3708t0 write VPC_VARYING_PS_REPL[0].MODE (214a) 3709 VPC_VARYING_PS_REPL[0].MODE: 0 3710 VPC_VARYING_PS_REPL[0x1].MODE: 0 3711 VPC_VARYING_PS_REPL[0x2].MODE: 0 3712 VPC_VARYING_PS_REPL[0x3].MODE: 0 3713 VPC_VARYING_PS_REPL[0x4].MODE: 0 3714 VPC_VARYING_PS_REPL[0x5].MODE: 0 3715 VPC_VARYING_PS_REPL[0x6].MODE: 0 3716 VPC_VARYING_PS_REPL[0x7].MODE: 0 3717109d0bc8: 0000: 0007214a 00000000 00000000 00000000 00000000 00000000 00000000 00000000 3718* 3719t3 opcode: CP_LOAD_STATE4 (30) (131 dwords) 3720 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 4 } 3721 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 3722 :2:0000:0000[40700000x_10000002x] mul.f r0.x, r0.z, c0.x 3723 :2:0001:0001[40700001x_10030002x] mul.f r0.y, r0.z, c0.w 3724 :3:0002:0002[63818000x_00001004x] mad.f32 r0.x, c1.x, r0.w, r0.x 3725 :3:0003:0003[63818001x_00011007x] mad.f32 r0.y, c1.w, r0.w, r0.y 3726 :3:0004:0004[63820000x_00001008x] mad.f32 r0.x, c2.x, r1.x, r0.x 3727 :3:0005:0005[63820001x_0001100bx] mad.f32 r0.y, c2.w, r1.x, r0.y 3728 :3:0006:0006[63828006x_0000100cx] mad.f32 r1.z, c3.x, r1.y, r0.x 3729 :2:0007:0007[40700000x_10010002x] mul.f r0.x, r0.z, c0.y 3730 :3:0008:0008[63828009x_0001100fx] mad.f32 r2.y, c3.w, r1.y, r0.y 3731 :3:0009:0009[63818000x_00001005x] mad.f32 r0.x, c1.y, r0.w, r0.x 3732 :1:0010:0010[20244001x_00000010x] mov.f32f32 r0.y, c4.x 3733 :3:0011:0011[63820000x_00001009x] mad.f32 r0.x, c2.y, r1.x, r0.x 3734 :0:0012:0012[00000000x_00000000x] nop 3735 :3:0013:0013[63828007x_0000100dx] mad.f32 r1.w, c3.y, r1.y, r0.x 3736 :2:0014:0014[40700000x_10020002x] mul.f r0.x, r0.z, c0.z 3737 :1:0015:0015[20244002x_00000015x] mov.f32f32 r0.z, c5.y 3738 :3:0016:0016[63818000x_00001006x] mad.f32 r0.x, c1.z, r0.w, r0.x 3739 :1:0017:0017[20244003x_00000016x] mov.f32f32 r0.w, c5.z 3740 :3:0018:0018[63820000x_0000100ax] mad.f32 r0.x, c2.z, r1.x, r0.x 3741 :1:0019:0019[20244004x_00000017x] mov.f32f32 r1.x, c5.w 3742 :3:0020:0020[63828008x_0000100ex] mad.f32 r2.x, c3.z, r1.y, r0.x 3743 :1:0021:0021[20244000x_00000011x] mov.f32f32 r0.x, c4.y 3744 :2:0022:0022[40100002x_00021021x] add.f r0.z, c8.y, r0.z 3745 :2:0023:0023[4050040dx_00041017x] (sat)max.f r3.y, c5.w, r1.x 3746 :2:0024:0024[40100003x_00031022x] add.f r0.w, c8.z, r0.w 3747 :2:0025:0025[40700000x_00001011x] mul.f r0.x, c4.y, r0.x 3748 :0:0026:0026[00000000x_00000000x] nop 3749 :3:0027:0027[63808000x_00001010x] mad.f32 r0.x, c4.x, r0.y, r0.x 3750 :1:0028:0028[20244001x_00000012x] mov.f32f32 r0.y, c4.z 3751 :0:0029:0029[00000200x_00000000x] (rpt2)nop 3752 :3:0030:0032[63808000x_00001012x] mad.f32 r0.x, c4.z, r0.y, r0.x 3753 :1:0031:0033[20244001x_00000014x] mov.f32f32 r0.y, c5.x 3754 :0:0032:0034[00000200x_00000000x] (rpt2)nop 3755 :2:0033:0037[40100001x_00011020x] add.f r0.y, c8.x, r0.y 3756 :0:0034:0038[00000000x_00000000x] nop 3757 :4:0035:0039[80300000x_00000000x] rsq r0.x, r0.x 3758 :2:0036:0040[40701004x_00001011x] (ss)mul.f r1.x, c4.y, r0.x 3759 :0:0037:0041[00000200x_00000000x] (rpt2)nop 3760 :2:0038:0044[40700004x_10190004x] mul.f r1.x, r1.x, c6.y 3761 :2:0039:0045[40700005x_00001010x] mul.f r1.y, c4.x, r0.x 3762 :0:0040:0046[00000200x_00000000x] (rpt2)nop 3763 :3:0041:0049[63828004x_00041018x] mad.f32 r1.x, c6.x, r1.y, r1.x 3764 :2:0042:0050[40700000x_00001012x] mul.f r0.x, c4.z, r0.x 3765 :0:0043:0051[00000200x_00000000x] (rpt2)nop 3766 :3:0044:0054[63800000x_0004101ax] mad.f32 r0.x, c6.z, r0.x, r1.x 3767 :0:0045:0055[00000200x_00000000x] (rpt2)nop 3768 :2:0046:0058[40b00004x_00001034x] cmps.f.lt r1.x, c13.x, r0.x 3769 :2:0047:0059[40500000x_00001034x] max.f r0.x, c13.x, r0.x 3770 :0:0048:0060[00000100x_00000000x] (rpt1)nop 3771 :1:0049:0062[200c4004x_00000004x] cov.u32f32 r1.x, r1.x 3772 :3:0050:0063[63800001x_00011024x] mad.f32 r0.y, c9.x, r0.x, r0.y 3773 :3:0051:0064[63800002x_00021025x] mad.f32 r0.z, c9.y, r0.x, r0.z 3774 :3:0052:0065[63800000x_00031026x] mad.f32 r0.x, c9.z, r0.x, r0.w 3775 :3:0053:0066[6382040ax_00011028x] (sat)mad.f32 r2.z, c10.x, r1.x, r0.y 3776 :3:0054:0067[6382040bx_00021029x] (sat)mad.f32 r2.w, c10.y, r1.x, r0.z 3777 :3:0055:0068[6382040cx_0000102ax] (sat)mad.f32 r3.x, c10.z, r1.x, r0.x 3778 :0:0056:0069[03000000x_00000000x] end 3779 :0:0057:0070[00000000x_00000000x] nop 3780 :0:0058:0071[00000000x_00000000x] nop 3781 :0:0059:0072[00000000x_00000000x] nop 3782 :0:0060:0073[00000000x_00000000x] nop 3783 Stats: 3784 - shaderdb: 74 instr, 27 nops, 47 non-nops, 7 mov, 1 cov 3785 - shaderdb: 0 last-baryf, 0 half, 4 full, 13 constlen 3786 - shaderdb: 28 cat0, 8 cat1, 15 cat2, 22 cat3, 1 cat4, 0 cat5, 0 cat6, 0 cat7 3787 - shaderdb: 10 sstall, 1 (ss), 0 (sy) 3788109d0bec: 0000: c0813000 01200000 00000000 10000002 40700000 10030002 40700001 00001004 3789109d0c0c: 0020: 63818000 00011007 63818001 00001008 63820000 0001100b 63820001 0000100c 3790109d0c2c: 0040: 63828006 10010002 40700000 0001100f 63828009 00001005 63818000 00000010 3791109d0c4c: 0060: 20244001 00001009 63820000 00000000 00000000 0000100d 63828007 10020002 3792109d0c6c: 0080: 40700000 00000015 20244002 00001006 63818000 00000016 20244003 0000100a 3793109d0c8c: 00a0: 63820000 00000017 20244004 0000100e 63828008 00000011 20244000 00021021 3794109d0cac: 00c0: 40100002 00041017 4050040d 00031022 40100003 00001011 40700000 00000000 3795109d0ccc: 00e0: 00000000 00001010 63808000 00000012 20244001 00000000 00000200 00001012 3796109d0cec: 0100: 63808000 00000014 20244001 00000000 00000200 00011020 40100001 00000000 3797109d0d0c: 0120: 00000000 00000000 80300000 00001011 40701004 00000000 00000200 10190004 3798109d0d2c: 0140: 40700004 00001010 40700005 00000000 00000200 00041018 63828004 00001012 3799109d0d4c: 0160: 40700000 00000000 00000200 0004101a 63800000 00000000 00000200 00001034 3800109d0d6c: 0180: 40b00004 00001034 40500000 00000000 00000100 00000004 200c4004 00011024 3801109d0d8c: 01a0: 63800001 00021025 63800002 00031026 63800000 00011028 6382040a 00021029 3802109d0dac: 01c0: 6382040b 0000102a 6382040c 00000000 03000000 00000000 00000000 00000000 3803* 3804t3 opcode: CP_LOAD_STATE4 (30) (35 dwords) 3805 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 1 } 3806 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 3807 :0:0000:0000[00000000x_00000000x] nop 3808 :6:0001:0001[c7c60000x_01c00000x] ldlv.u32 r0.x, l[0], 1 3809 :6:0002:0002[c7c60001x_01c00002x] ldlv.u32 r0.y, l[1], 1 3810 :6:0003:0003[c7c60002x_01c00004x] ldlv.u32 r0.z, l[2], 1 3811 :6:0004:0004[c7c60003x_01c00006x] ldlv.u32 r0.w, l[3], 1 3812 :2:0005:0005[473090fcx_00002000x] (ss)bary.f (ei)r63.x, 0, r0.x 3813 :0:0006:0006[03000000x_00000000x] end 3814 :0:0007:0007[00000000x_00000000x] nop 3815 :0:0008:0008[00000000x_00000000x] nop 3816 :0:0009:0009[00000000x_00000000x] nop 3817 :0:0010:0010[00000000x_00000000x] nop 3818 Stats: 3819 - shaderdb: 11 instr, 5 nops, 6 non-nops, 0 mov, 0 cov 3820 - shaderdb: 5 last-baryf, 0 half, 1 full, 0 constlen 3821 - shaderdb: 6 cat0, 0 cat1, 1 cat2, 0 cat3, 0 cat4, 0 cat5, 4 cat6, 0 cat7 3822 - shaderdb: 0 sstall, 1 (ss), 0 (sy) 3823109d0df8: 0000: c0213000 00700000 00000000 00000000 00000000 01c00000 c7c60000 01c00002 3824109d0e18: 0020: c7c60001 01c00004 c7c60002 01c00006 c7c60003 00002000 473090fc 00000000 3825109d0e38: 0040: 03000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 3826* 3827t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 3828109d0e84: 0000: c0002600 00000000 3829t3 opcode: CP_LOAD_STATE4 (30) (51 dwords) 3830 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 } 3831 { STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 } 3832109d0e98: 3.924428 -1.210718 0.674073 0.570369 1.829991 4.619613 -0.131666 -0.111410 3833109d0eb8: 2.500000 -1.480991 -0.961761 -0.813798 -13.423393 17.082890 32.944622 37.106991 3834109d0ed8: 0.000000 0.000000 1.000000 1.000000 0.040000 0.040000 0.200000 1.000000 3835109d0ef8: -0.244131 0.617574 0.747665 0.000000 1.000000 0.000000 0.000000 0.000000 3836109d0f18: 0.000000 0.000000 0.000000 1.000000 0.200000 0.200000 1.000000 1.000000 3837109d0f38: 0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 1.000000 3838109d0e98: 0000: 407b29d2 bf9af8cb 3f2c9009 3f1203b9 3fea3d23 4093d3df be06d382 bde42adc 3839109d0eb8: 0020: 40200000 bfbd9119 bf7635f5 bf50550b c156c638 4188a9c2 4203c74b 42146d8f 3840109d0ed8: 0040: 00000000 00000000 3f800000 3f800000 3d23d70b 3d23d70b 3e4ccccd 3f800000 3841109d0ef8: 0060: be79fd80 3f1e194f 3f3f66f5 00000000 3f800000 00000000 00000000 00000000 3842109d0f18: 0080: 00000000 00000000 00000000 3f800000 3e4ccccd 3e4ccccd 3f800000 3f800000 3843109d0f38: 00a0: 00000000 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000 3844109d0e8c: 0000: c0313000 03200000 00000001 407b29d2 bf9af8cb 3f2c9009 3f1203b9 3fea3d23 3845109d0eac: 0020: 4093d3df be06d382 bde42adc 40200000 bfbd9119 bf7635f5 bf50550b c156c638 3846109d0ecc: 0040: 4188a9c2 4203c74b 42146d8f 00000000 00000000 3f800000 3f800000 3d23d70b 3847109d0eec: 0060: 3d23d70b 3e4ccccd 3f800000 be79fd80 3f1e194f 3f3f66f5 00000000 3f800000 3848109d0f0c: 0080: 00000000 00000000 00000000 00000000 00000000 00000000 3f800000 3e4ccccd 3849109d0f2c: 00a0: 3e4ccccd 3f800000 3f800000 00000000 00000000 00000000 3f800000 00000000 3850109d0f4c: 00c0: 00000000 00000000 3f800000 3851t3 opcode: CP_LOAD_STATE4 (30) (7 dwords) 3852 { DST_OFF = 13 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 1 } 3853 { STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 } 3854109d0f64: 0.000000 -28026765312.000000 -28026765312.000000 -28026765312.000000 3855109d0f64: 0000: 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0 3856109d0f58: 0000: c0053000 0060000d 00000001 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0 3857t0 write VFD_FETCH[0].INSTR_0 (220a) 3858 VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 12 } 3859 VFD_FETCH[0].INSTR_1: 0x107cb000 3860 VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 } 3861 VFD_FETCH[0].INSTR_3: { STEPRATE = 1 } 3862109d0f74: 0000: 0003220a 0000060b 107cb000 00100000 00000001 3863t0 write VFD_DECODE[0].INSTR (228a) 3864 VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID } 3865109d0f88: 0000: 0000228a 2c0020df 3866t0 write VFD_CONTROL_0 (2200) 3867 VFD_CONTROL_0: { TOTALATTRTOVS = 4 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 1 | STRMFETCHINSTRCNT = 1 | 0xa0000 } 3868 VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x } 3869 VFD_CONTROL_2: 0 3870 VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x } 3871 VFD_CONTROL_4: 0 3872109d0f90: 0000: 00042200 041a0004 fcfc0081 00000000 0000fc00 00000000 3873t0 write UCHE_INVALIDATE0 (0e8a) 3874 UCHE_INVALIDATE0: 0 3875 UCHE_INVALIDATE1: 0x12 3876109d0fa8: 0000: 00010e8a 00000000 00000012 3877t0 write VFD_INDEX_OFFSET (2208) 3878 VFD_INDEX_OFFSET: 0 3879 UNKNOWN_2209: 0 3880109d0fb4: 0000: 00012208 00000000 00000000 3881t0 write PC_RESTART_INDEX (21c6) 3882 PC_RESTART_INDEX: 0xffffffff 3883109d0fc0: 0000: 000021c6 ffffffff 3884t0 write CP_SCRATCH[0x7].REG (057f) 3885 CP_SCRATCH[0x7].REG: 0x50 3886 :0,79,115,80 3887109d0fc8: 0000: 0000057f 00000050 3888t3 opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords) 3889 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS } 3890 { NUM_INSTANCES = 1 } 3891 { NUM_INDICES = 120 } 3892 { FIRST_INDX = 0 } 3893 { INDX_BASE = 0x10bd0f78 } 3894 { INDX_SIZE = 240 } 3895 draw[13] register values 3896!+ 0000004f CP_SCRATCH[0x5].REG: 0x4f 3897 :0,79,115,80 3898!+ 00000050 CP_SCRATCH[0x7].REG: 0x50 3899 :0,79,115,80 3900 + 00000000 UCHE_INVALIDATE0: 0 3901 + 00000012 UCHE_INVALIDATE1: 0x12 3902 + 00080000 GRAS_CL_CLIP_CNTL: { 0x80000 } 3903!+ 00000000 GRAS_CNTL: { 0 } 3904 + 00100010 GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 } 3905 + 00000010 GRAS_SU_POINT_SIZE: 1.000000 3906 + 00000000 GRAS_ALPHA_CONTROL: { 0 } 3907 + 00000000 GRAS_SU_POLY_OFFSET_SCALE: 0.000000 3908 + 00000000 GRAS_SU_POLY_OFFSET_OFFSET: 0.000000 3909 + 00000000 GRAS_SU_POLY_OFFSET_CLAMP: 0.000000 3910 + 00100012 GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS } 3911 + 012b012b GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 } 3912 + 00000000 GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 3913!+ 00000000 RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 } 3914 + 00000001 RB_FS_OUTPUT_REG: { MRT = 1 } 3915 + 80000016 RB_DEPTH_CONTROL: { Z_TEST_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_READ_ENABLE } 3916 + 00000000 RB_VPORT_Z_CLAMP[0].MIN: 0 3917 + 00ffffff RB_VPORT_Z_CLAMP[0].MAX: 0xffffff 3918 + 42001004 VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 } 3919 + 00040400 VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 } 3920!+ 00000055 VPC_VARYING_INTERP[0].MODE: 0x55 3921 + 00000000 VPC_VARYING_INTERP[0x1].MODE: 0 3922 + 00000000 VPC_VARYING_INTERP[0x2].MODE: 0 3923 + 00000000 VPC_VARYING_INTERP[0x3].MODE: 0 3924 + 00000000 VPC_VARYING_INTERP[0x4].MODE: 0 3925 + 00000000 VPC_VARYING_INTERP[0x5].MODE: 0 3926 + 00000000 VPC_VARYING_INTERP[0x6].MODE: 0 3927 + 00000000 VPC_VARYING_INTERP[0x7].MODE: 0 3928 + 00000000 VPC_VARYING_PS_REPL[0].MODE: 0 3929 + 00000000 VPC_VARYING_PS_REPL[0x1].MODE: 0 3930 + 00000000 VPC_VARYING_PS_REPL[0x2].MODE: 0 3931 + 00000000 VPC_VARYING_PS_REPL[0x3].MODE: 0 3932 + 00000000 VPC_VARYING_PS_REPL[0x4].MODE: 0 3933 + 00000000 VPC_VARYING_PS_REPL[0x5].MODE: 0 3934 + 00000000 VPC_VARYING_PS_REPL[0x6].MODE: 0 3935 + 00000000 VPC_VARYING_PS_REPL[0x7].MODE: 0 3936 + 02000001 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 3937 + 00000012 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 3938 + ffffffff PC_RESTART_INDEX: 0xffffffff 3939!+ 041a0004 VFD_CONTROL_0: { TOTALATTRTOVS = 4 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 1 | STRMFETCHINSTRCNT = 1 | 0xa0000 } 3940 + fcfc0081 VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x } 3941 + 00000000 VFD_CONTROL_2: 0 3942 + 0000fc00 VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x } 3943 + 00000000 VFD_CONTROL_4: 0 3944 + 00000000 VFD_INDEX_OFFSET: 0 3945 + 00000000 UNKNOWN_2209: 0 3946!+ 0000060b VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 12 } 3947 + 107cb000 VFD_FETCH[0].INSTR_1: 0x107cb000 3948 + 00100000 VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 } 3949 + 00000001 VFD_FETCH[0].INSTR_3: { STEPRATE = 1 } 3950!+ 2c0020df VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID } 3951 + 00140010 SP_SP_CTRL_REG: { 0x140010 } 3952 + 000005ff SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f } 3953!+ 00201000 SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 4 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE } 3954!+ 04000042 SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 4 } 3955!+ 0010fc06 SP_VS_PARAM_REG: { POSREGID = r1.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 } 3956!+ 00001e0a SP_VS_OUT[0].REG: { A_REGID = r2.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 } 3957 + 08080808 SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 } 3958 + 00000000 SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 3959!+ 10cd0000 SP_VS_OBJ_START: 0x10cd0000 3960 + 00000004 SP_VS_LENGTH_REG: 4 3961!+ 00340402 SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE } 3962 + 8010003e SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 } 3963 + 7e420000 SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 3964!+ 10cd2000 SP_FS_OBJ_START: 0x10cd2000 3965 + 00000001 SP_FS_LENGTH_REG: 1 3966 + 0000fc01 SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x } 3967!+ 0001a000 SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM } 3968!+ 00000000 SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 } 3969!+ 00000000 SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 } 3970!+ 00000000 SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 } 3971!+ 00000000 SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 } 3972!+ 00000000 SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 } 3973!+ 00000000 SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 } 3974!+ 00000000 SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 } 3975 + 7e420000 SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 3976 + 7e420000 SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 3977 + 7e420000 SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 3978 + 28000250 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE } 3979 + fcfc0100 HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x } 3980 + fff3f3f0 HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x } 3981!+ fcfcfcfc HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x } 3982 + 00fcfcfc HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 } 3983 + 04000042 HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 } 3984 + 017e423e HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 } 3985 + 007e4200 HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 3986 + 007e4200 HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 3987 + 007e4200 HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 3988 + 00000003 HLSQ_UPDATE_CONTROL: 0x3 3989109d0fd0: 0000: c0053800 00000404 00000001 00000078 00000000 10bd0f78 000000f0 3990t0 write CP_SCRATCH[0x7].REG (057f) 3991 CP_SCRATCH[0x7].REG: 0x51 3992 :0,79,115,81 3993109d0fec: 0000: 0000057f 00000051 3994t0 write CP_SCRATCH[0x5].REG (057d) 3995 CP_SCRATCH[0x5].REG: 0x55 3996 :0,85,115,81 3997109d0ff4: 0000: 0000057d 00000055 3998t0 write PC_PRIM_VTX_CNTL (21c4) 3999 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 4000 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 4001109d0ffc: 0000: 000121c4 02000001 00000012 4002t0 write VFD_INDEX_OFFSET (2208) 4003 VFD_INDEX_OFFSET: 0 4004 UNKNOWN_2209: 0 4005109d1008: 0000: 00012208 00000000 00000000 4006t0 write PC_RESTART_INDEX (21c6) 4007 PC_RESTART_INDEX: 0xffffffff 4008109d1014: 0000: 000021c6 ffffffff 4009t0 write CP_SCRATCH[0x7].REG (057f) 4010 CP_SCRATCH[0x7].REG: 0x56 4011 :0,85,115,86 4012109d101c: 0000: 0000057f 00000056 4013t3 opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords) 4014 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS } 4015 { NUM_INSTANCES = 1 } 4016 { NUM_INDICES = 60 } 4017 { FIRST_INDX = 0 } 4018 { INDX_BASE = 0x10bd1068 } 4019 { INDX_SIZE = 120 } 4020 draw[14] register values 4021!+ 00000055 CP_SCRATCH[0x5].REG: 0x55 4022 :0,85,115,86 4023!+ 00000056 CP_SCRATCH[0x7].REG: 0x56 4024 :0,85,115,86 4025 + 02000001 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 4026 + 00000012 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 4027 + ffffffff PC_RESTART_INDEX: 0xffffffff 4028 + 00000000 VFD_INDEX_OFFSET: 0 4029 + 00000000 UNKNOWN_2209: 0 4030109d1024: 0000: c0053800 00000404 00000001 0000003c 00000000 10bd1068 00000078 4031t0 write CP_SCRATCH[0x7].REG (057f) 4032 CP_SCRATCH[0x7].REG: 0x57 4033 :0,85,115,87 4034109d1040: 0000: 0000057f 00000057 4035t0 write CP_SCRATCH[0x5].REG (057d) 4036 CP_SCRATCH[0x5].REG: 0x5b 4037 :0,91,115,87 4038109d1048: 0000: 0000057d 0000005b 4039t0 write PC_PRIM_VTX_CNTL (21c4) 4040 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 4041 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 4042109d1050: 0000: 000121c4 02000001 00000012 4043t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 4044109d105c: 0000: c0002600 00000000 4045t3 opcode: CP_LOAD_STATE4 (30) (51 dwords) 4046 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 } 4047 { STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 } 4048109d1070: 3.924428 -1.210718 0.674073 0.570369 1.829991 4.619613 -0.131666 -0.111410 4049109d1090: 2.500000 -1.480991 -0.961761 -0.813798 -13.423393 17.082890 32.944622 37.106991 4050109d10b0: 0.000000 0.000000 -1.000000 1.000000 0.040000 0.040000 0.200000 1.000000 4051109d10d0: -0.244131 0.617574 0.747665 0.000000 1.000000 0.000000 0.000000 0.000000 4052109d10f0: 0.000000 0.000000 0.000000 1.000000 0.200000 0.200000 1.000000 1.000000 4053109d1110: 0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 1.000000 4054109d1070: 0000: 407b29d2 bf9af8cb 3f2c9009 3f1203b9 3fea3d23 4093d3df be06d382 bde42adc 4055109d1090: 0020: 40200000 bfbd9119 bf7635f5 bf50550b c156c638 4188a9c2 4203c74b 42146d8f 4056109d10b0: 0040: 00000000 00000000 bf800000 3f800000 3d23d70b 3d23d70b 3e4ccccd 3f800000 4057109d10d0: 0060: be79fd80 3f1e194f 3f3f66f5 00000000 3f800000 00000000 00000000 00000000 4058109d10f0: 0080: 00000000 00000000 00000000 3f800000 3e4ccccd 3e4ccccd 3f800000 3f800000 4059109d1110: 00a0: 00000000 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000 4060109d1064: 0000: c0313000 03200000 00000001 407b29d2 bf9af8cb 3f2c9009 3f1203b9 3fea3d23 4061109d1084: 0020: 4093d3df be06d382 bde42adc 40200000 bfbd9119 bf7635f5 bf50550b c156c638 4062109d10a4: 0040: 4188a9c2 4203c74b 42146d8f 00000000 00000000 bf800000 3f800000 3d23d70b 4063109d10c4: 0060: 3d23d70b 3e4ccccd 3f800000 be79fd80 3f1e194f 3f3f66f5 00000000 3f800000 4064109d10e4: 0080: 00000000 00000000 00000000 00000000 00000000 00000000 3f800000 3e4ccccd 4065109d1104: 00a0: 3e4ccccd 3f800000 3f800000 00000000 00000000 00000000 3f800000 00000000 4066109d1124: 00c0: 00000000 00000000 3f800000 4067t0 write VFD_INDEX_OFFSET (2208) 4068 VFD_INDEX_OFFSET: 0 4069 UNKNOWN_2209: 0 4070109d1130: 0000: 00012208 00000000 00000000 4071t0 write PC_RESTART_INDEX (21c6) 4072 PC_RESTART_INDEX: 0xffffffff 4073109d113c: 0000: 000021c6 ffffffff 4074t0 write CP_SCRATCH[0x7].REG (057f) 4075 CP_SCRATCH[0x7].REG: 0x5c 4076 :0,91,115,92 4077109d1144: 0000: 0000057f 0000005c 4078t3 opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords) 4079 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS } 4080 { NUM_INSTANCES = 1 } 4081 { NUM_INDICES = 120 } 4082 { FIRST_INDX = 0 } 4083 { INDX_BASE = 0x10bd10e0 } 4084 { INDX_SIZE = 240 } 4085 draw[15] register values 4086!+ 0000005b CP_SCRATCH[0x5].REG: 0x5b 4087 :0,91,115,92 4088!+ 0000005c CP_SCRATCH[0x7].REG: 0x5c 4089 :0,91,115,92 4090 + 02000001 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 4091 + 00000012 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 4092 + ffffffff PC_RESTART_INDEX: 0xffffffff 4093 + 00000000 VFD_INDEX_OFFSET: 0 4094 + 00000000 UNKNOWN_2209: 0 4095109d114c: 0000: c0053800 00000404 00000001 00000078 00000000 10bd10e0 000000f0 4096t0 write CP_SCRATCH[0x7].REG (057f) 4097 CP_SCRATCH[0x7].REG: 0x5d 4098 :0,91,115,93 4099109d1168: 0000: 0000057f 0000005d 4100t0 write CP_SCRATCH[0x5].REG (057d) 4101 CP_SCRATCH[0x5].REG: 0x61 4102 :0,97,115,93 4103109d1170: 0000: 0000057d 00000061 4104t0 write PC_PRIM_VTX_CNTL (21c4) 4105 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 4106 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 4107109d1178: 0000: 000121c4 02000001 00000012 4108t0 write VFD_INDEX_OFFSET (2208) 4109 VFD_INDEX_OFFSET: 0 4110 UNKNOWN_2209: 0 4111109d1184: 0000: 00012208 00000000 00000000 4112t0 write PC_RESTART_INDEX (21c6) 4113 PC_RESTART_INDEX: 0xffffffff 4114109d1190: 0000: 000021c6 ffffffff 4115t0 write CP_SCRATCH[0x7].REG (057f) 4116 CP_SCRATCH[0x7].REG: 0x62 4117 :0,97,115,98 4118109d1198: 0000: 0000057f 00000062 4119t3 opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords) 4120 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS } 4121 { NUM_INSTANCES = 1 } 4122 { NUM_INDICES = 60 } 4123 { FIRST_INDX = 0 } 4124 { INDX_BASE = 0x10bd11d0 } 4125 { INDX_SIZE = 120 } 4126 draw[16] register values 4127!+ 00000061 CP_SCRATCH[0x5].REG: 0x61 4128 :0,97,115,98 4129!+ 00000062 CP_SCRATCH[0x7].REG: 0x62 4130 :0,97,115,98 4131 + 02000001 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 4132 + 00000012 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 4133 + ffffffff PC_RESTART_INDEX: 0xffffffff 4134 + 00000000 VFD_INDEX_OFFSET: 0 4135 + 00000000 UNKNOWN_2209: 0 4136109d11a0: 0000: c0053800 00000404 00000001 0000003c 00000000 10bd11d0 00000078 4137t0 write CP_SCRATCH[0x7].REG (057f) 4138 CP_SCRATCH[0x7].REG: 0x63 4139 :0,97,115,99 4140109d11bc: 0000: 0000057f 00000063 4141t0 write CP_SCRATCH[0x5].REG (057d) 4142 CP_SCRATCH[0x5].REG: 0x67 4143 :0,103,115,99 4144109d11c4: 0000: 0000057d 00000067 4145t0 write RB_DEPTH_CONTROL (2101) 4146 RB_DEPTH_CONTROL: { Z_TEST_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_READ_ENABLE } 4147109d11cc: 0000: 00002101 80000016 4148t0 write GRAS_ALPHA_CONTROL (2073) 4149 GRAS_ALPHA_CONTROL: { 0 } 4150109d11d4: 0000: 00002073 00000000 4151t0 write PC_PRIM_VTX_CNTL (21c4) 4152 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 4153 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 4154109d11dc: 0000: 000121c4 02000001 00000012 4155t0 write HLSQ_UPDATE_CONTROL (23db) 4156 HLSQ_UPDATE_CONTROL: 0x3 4157109d11e8: 0000: 000023db 00000003 4158t0 write HLSQ_CONTROL_0_REG (23c0) 4159 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE } 4160 HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x } 4161 HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x } 4162 HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x } 4163 HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 } 4164109d11f0: 0000: 000423c0 28000250 fcfc0100 fff3f3f0 fcfcfcfc 00fcfcfc 4165t0 write HLSQ_VS_CONTROL_REG (23c5) 4166 HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 } 4167 HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 } 4168 HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 4169 HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 4170 HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 4171109d1208: 0000: 000423c5 04000042 017e423e 007e4200 007e4200 007e4200 4172t0 write SP_SP_CTRL_REG (22c0) 4173 SP_SP_CTRL_REG: { 0x140010 } 4174109d1220: 0000: 000022c0 00140010 4175t0 write SP_INSTR_CACHE_CTRL (22c1) 4176 SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f } 4177109d1228: 0000: 000022c1 000005ff 4178t0 write SP_VS_LENGTH_REG (22e5) 4179 SP_VS_LENGTH_REG: 4 4180109d1230: 0000: 000022e5 00000004 4181t0 write SP_VS_CTRL_REG0 (22c4) 4182 SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE } 4183 SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 } 4184 SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 } 4185109d1238: 0000: 000222c4 00201400 08000042 0010fc0a 4186t0 write SP_VS_OUT[0].REG (22c7) 4187 SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 } 4188109d1248: 0000: 000022c7 00001e0e 4189t0 write SP_VS_VPC_DST[0].REG (22d8) 4190 SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 } 4191109d1250: 0000: 000022d8 08080808 4192t0 write SP_VS_OBJ_OFFSET_REG (22e0) 4193 SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 4194 SP_VS_OBJ_START: 0x10cd5000 4195109d1258: 0000: 000122e0 00000000 10cd5000 4196t0 write SP_FS_LENGTH_REG (22ef) 4197 SP_FS_LENGTH_REG: 1 4198109d1264: 0000: 000022ef 00000001 4199t0 write SP_FS_CTRL_REG0 (22e8) 4200 SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE } 4201 SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 } 4202109d126c: 0000: 000122e8 00340402 8010003e 4203t0 write SP_FS_OBJ_OFFSET_REG (22ea) 4204 SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 4205 SP_FS_OBJ_START: 0x10cd2000 4206109d1278: 0000: 000122ea 7e420000 10cd2000 4207t0 write SP_HS_OBJ_OFFSET_REG (230d) 4208 SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 4209109d1284: 0000: 0000230d 7e420000 4210t0 write SP_DS_OBJ_OFFSET_REG (2334) 4211 SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 4212109d128c: 0000: 00002334 7e420000 4213t0 write SP_GS_OBJ_OFFSET_REG (235b) 4214 SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 4215109d1294: 0000: 0000235b 7e420000 4216t0 write GRAS_CNTL (2003) 4217 GRAS_CNTL: { 0 } 4218109d129c: 0000: 00002003 00000000 4219t0 write RB_RENDER_CONTROL2 (20a3) 4220 RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 } 4221109d12a4: 0000: 000020a3 00000000 4222t0 write RB_FS_OUTPUT_REG (2100) 4223 RB_FS_OUTPUT_REG: { MRT = 1 } 4224109d12ac: 0000: 00002100 00000001 4225t0 write SP_FS_OUTPUT_REG (22f0) 4226 SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x } 4227109d12b4: 0000: 000022f0 0000fc01 4228t0 write SP_FS_MRT[0].REG (22f1) 4229 SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM } 4230 SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 } 4231 SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 } 4232 SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 } 4233 SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 } 4234 SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 } 4235 SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 } 4236 SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 } 4237109d12bc: 0000: 000722f1 0001a000 00000000 00000000 00000000 00000000 00000000 00000000 4238* 4239t0 write VPC_ATTR (2140) 4240 VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 } 4241 VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 } 4242109d12e0: 0000: 00012140 42001004 00040400 4243t0 write VPC_VARYING_INTERP[0].MODE (2142) 4244 VPC_VARYING_INTERP[0].MODE: 0x55 4245 VPC_VARYING_INTERP[0x1].MODE: 0 4246 VPC_VARYING_INTERP[0x2].MODE: 0 4247 VPC_VARYING_INTERP[0x3].MODE: 0 4248 VPC_VARYING_INTERP[0x4].MODE: 0 4249 VPC_VARYING_INTERP[0x5].MODE: 0 4250 VPC_VARYING_INTERP[0x6].MODE: 0 4251 VPC_VARYING_INTERP[0x7].MODE: 0 4252109d12ec: 0000: 00072142 00000055 00000000 00000000 00000000 00000000 00000000 00000000 4253* 4254t0 write VPC_VARYING_PS_REPL[0].MODE (214a) 4255 VPC_VARYING_PS_REPL[0].MODE: 0 4256 VPC_VARYING_PS_REPL[0x1].MODE: 0 4257 VPC_VARYING_PS_REPL[0x2].MODE: 0 4258 VPC_VARYING_PS_REPL[0x3].MODE: 0 4259 VPC_VARYING_PS_REPL[0x4].MODE: 0 4260 VPC_VARYING_PS_REPL[0x5].MODE: 0 4261 VPC_VARYING_PS_REPL[0x6].MODE: 0 4262 VPC_VARYING_PS_REPL[0x7].MODE: 0 4263109d1310: 0000: 0007214a 00000000 00000000 00000000 00000000 00000000 00000000 00000000 4264* 4265t3 opcode: CP_LOAD_STATE4 (30) (131 dwords) 4266 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 4 } 4267 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 4268 :2:0000:0000[40700000x_10000002x] mul.f r0.x, r0.z, c0.x 4269 :2:0001:0001[40700001x_10030002x] mul.f r0.y, r0.z, c0.w 4270 :3:0002:0002[63818000x_00001004x] mad.f32 r0.x, c1.x, r0.w, r0.x 4271 :3:0003:0003[63818001x_00011007x] mad.f32 r0.y, c1.w, r0.w, r0.y 4272 :3:0004:0004[63820000x_00001008x] mad.f32 r0.x, c2.x, r1.x, r0.x 4273 :3:0005:0005[63820001x_0001100bx] mad.f32 r0.y, c2.w, r1.x, r0.y 4274 :3:0006:0006[6382800ax_0000100cx] mad.f32 r2.z, c3.x, r1.y, r0.x 4275 :2:0007:0007[40700000x_10010002x] mul.f r0.x, r0.z, c0.y 4276 :3:0008:0008[6382800dx_0001100fx] mad.f32 r3.y, c3.w, r1.y, r0.y 4277 :3:0009:0009[63818000x_00001005x] mad.f32 r0.x, c1.y, r0.w, r0.x 4278 :1:0010:0010[20244001x_00000010x] mov.f32f32 r0.y, c4.x 4279 :3:0011:0011[63820000x_00001009x] mad.f32 r0.x, c2.y, r1.x, r0.x 4280 :0:0012:0012[00000000x_00000000x] nop 4281 :3:0013:0013[6382800bx_0000100dx] mad.f32 r2.w, c3.y, r1.y, r0.x 4282 :2:0014:0014[40700000x_10020002x] mul.f r0.x, r0.z, c0.z 4283 :2:0015:0015[40100001x_0001101cx] add.f r0.y, c7.x, r0.y 4284 :3:0016:0016[63818000x_00001006x] mad.f32 r0.x, c1.z, r0.w, r0.x 4285 :1:0017:0017[20244002x_00000011x] mov.f32f32 r0.z, c4.y 4286 :3:0018:0018[63820000x_0000100ax] mad.f32 r0.x, c2.z, r1.x, r0.x 4287 :1:0019:0019[20244004x_00000013x] mov.f32f32 r1.x, c4.w 4288 :3:0020:0020[6382800cx_0000100ex] mad.f32 r3.x, c3.z, r1.y, r0.x 4289 :2:0021:0021[40700000x_00070007x] mul.f r0.x, r1.w, r1.w 4290 :2:0022:0022[40100002x_0002101dx] add.f r0.z, c7.y, r0.z 4291 :3:0023:0023[63830000x_00000006x] mad.f32 r0.x, r1.z, r1.z, r0.x 4292 :2:0024:0024[40500411x_00041013x] (sat)max.f r4.y, c4.w, r1.x 4293 :3:0025:0025[63840000x_00000008x] mad.f32 r0.x, r2.x, r2.x, r0.x 4294 :1:0026:0026[20244003x_00000012x] mov.f32f32 r0.w, c4.z 4295 :0:0027:0027[00000200x_00000000x] (rpt2)nop 4296 :2:0028:0030[40100003x_0003101ex] add.f r0.w, c7.z, r0.w 4297 :0:0029:0031[00000000x_00000000x] nop 4298 :4:0030:0032[80300000x_00000000x] rsq r0.x, r0.x 4299 :2:0031:0033[40701004x_00000007x] (ss)mul.f r1.x, r1.w, r0.x 4300 :0:0032:0034[00000200x_00000000x] (rpt2)nop 4301 :2:0033:0037[40700004x_10150004x] mul.f r1.x, r1.x, c5.y 4302 :2:0034:0038[40700005x_00000006x] mul.f r1.y, r1.z, r0.x 4303 :0:0035:0039[00000200x_00000000x] (rpt2)nop 4304 :3:0036:0042[63828004x_00041014x] mad.f32 r1.x, c5.x, r1.y, r1.x 4305 :2:0037:0043[40700000x_00000008x] mul.f r0.x, r2.x, r0.x 4306 :0:0038:0044[00000200x_00000000x] (rpt2)nop 4307 :3:0039:0047[63800000x_00041016x] mad.f32 r0.x, c5.z, r0.x, r1.x 4308 :0:0040:0048[00000200x_00000000x] (rpt2)nop 4309 :2:0041:0051[40b00004x_00001034x] cmps.f.lt r1.x, c13.x, r0.x 4310 :2:0042:0052[40500000x_00001034x] max.f r0.x, c13.x, r0.x 4311 :0:0043:0053[00000100x_00000000x] (rpt1)nop 4312 :1:0044:0055[200c4004x_00000004x] cov.u32f32 r1.x, r1.x 4313 :3:0045:0056[63800001x_00011020x] mad.f32 r0.y, c8.x, r0.x, r0.y 4314 :3:0046:0057[63800002x_00021021x] mad.f32 r0.z, c8.y, r0.x, r0.z 4315 :3:0047:0058[63800000x_00031022x] mad.f32 r0.x, c8.z, r0.x, r0.w 4316 :3:0048:0059[6382040ex_00011024x] (sat)mad.f32 r3.z, c9.x, r1.x, r0.y 4317 :3:0049:0060[6382040fx_00021025x] (sat)mad.f32 r3.w, c9.y, r1.x, r0.z 4318 :3:0050:0061[63820410x_00001026x] (sat)mad.f32 r4.x, c9.z, r1.x, r0.x 4319 :0:0051:0062[03000000x_00000000x] end 4320 :0:0052:0063[00000000x_00000000x] nop 4321 :0:0053:0064[00000000x_00000000x] nop 4322 :0:0054:0065[00000000x_00000000x] nop 4323 :0:0055:0066[00000000x_00000000x] nop 4324 Stats: 4325 - shaderdb: 67 instr, 23 nops, 44 non-nops, 4 mov, 1 cov 4326 - shaderdb: 0 last-baryf, 0 half, 5 full, 13 constlen 4327 - shaderdb: 24 cat0, 5 cat1, 15 cat2, 22 cat3, 1 cat4, 0 cat5, 0 cat6, 0 cat7 4328 - shaderdb: 10 sstall, 1 (ss), 0 (sy) 4329109d1334: 0000: c0813000 01200000 00000000 10000002 40700000 10030002 40700001 00001004 4330109d1354: 0020: 63818000 00011007 63818001 00001008 63820000 0001100b 63820001 0000100c 4331109d1374: 0040: 6382800a 10010002 40700000 0001100f 6382800d 00001005 63818000 00000010 4332109d1394: 0060: 20244001 00001009 63820000 00000000 00000000 0000100d 6382800b 10020002 4333109d13b4: 0080: 40700000 0001101c 40100001 00001006 63818000 00000011 20244002 0000100a 4334109d13d4: 00a0: 63820000 00000013 20244004 0000100e 6382800c 00070007 40700000 0002101d 4335109d13f4: 00c0: 40100002 00000006 63830000 00041013 40500411 00000008 63840000 00000012 4336109d1414: 00e0: 20244003 00000000 00000200 0003101e 40100003 00000000 00000000 00000000 4337109d1434: 0100: 80300000 00000007 40701004 00000000 00000200 10150004 40700004 00000006 4338109d1454: 0120: 40700005 00000000 00000200 00041014 63828004 00000008 40700000 00000000 4339109d1474: 0140: 00000200 00041016 63800000 00000000 00000200 00001034 40b00004 00001034 4340109d1494: 0160: 40500000 00000000 00000100 00000004 200c4004 00011020 63800001 00021021 4341109d14b4: 0180: 63800002 00031022 63800000 00011024 6382040e 00021025 6382040f 00001026 4342109d14d4: 01a0: 63820410 00000000 03000000 00000000 00000000 00000000 00000000 00000000 4343* 4344t3 opcode: CP_LOAD_STATE4 (30) (35 dwords) 4345 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 1 } 4346 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 4347 :0:0000:0000[00000000x_00000000x] nop 4348 :6:0001:0001[c7c60000x_01c00000x] ldlv.u32 r0.x, l[0], 1 4349 :6:0002:0002[c7c60001x_01c00002x] ldlv.u32 r0.y, l[1], 1 4350 :6:0003:0003[c7c60002x_01c00004x] ldlv.u32 r0.z, l[2], 1 4351 :6:0004:0004[c7c60003x_01c00006x] ldlv.u32 r0.w, l[3], 1 4352 :2:0005:0005[473090fcx_00002000x] (ss)bary.f (ei)r63.x, 0, r0.x 4353 :0:0006:0006[03000000x_00000000x] end 4354 :0:0007:0007[00000000x_00000000x] nop 4355 :0:0008:0008[00000000x_00000000x] nop 4356 :0:0009:0009[00000000x_00000000x] nop 4357 :0:0010:0010[00000000x_00000000x] nop 4358 Stats: 4359 - shaderdb: 11 instr, 5 nops, 6 non-nops, 0 mov, 0 cov 4360 - shaderdb: 5 last-baryf, 0 half, 1 full, 0 constlen 4361 - shaderdb: 6 cat0, 0 cat1, 1 cat2, 0 cat3, 0 cat4, 0 cat5, 4 cat6, 0 cat7 4362 - shaderdb: 0 sstall, 1 (ss), 0 (sy) 4363109d1540: 0000: c0213000 00700000 00000000 00000000 00000000 01c00000 c7c60000 01c00002 4364109d1560: 0020: c7c60001 01c00004 c7c60002 01c00006 c7c60003 00002000 473090fc 00000000 4365109d1580: 0040: 03000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 4366* 4367t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 4368109d15cc: 0000: c0002600 00000000 4369t3 opcode: CP_LOAD_STATE4 (30) (51 dwords) 4370 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 } 4371 { STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 } 4372109d15e0: 3.924428 -1.210718 0.674073 0.570369 1.829991 4.619613 -0.131666 -0.111410 4373109d1600: 2.500000 -1.480991 -0.961761 -0.813798 -13.423393 17.082890 32.944622 37.106991 4374109d1620: 0.040000 0.040000 0.200000 1.000000 -0.244131 0.617574 0.747665 0.000000 4375109d1640: 1.000000 0.000000 0.000000 0.000000 0.000000 0.000000 0.000000 1.000000 4376109d1660: 0.200000 0.200000 1.000000 1.000000 0.000000 0.000000 0.000000 1.000000 4377109d1680: 0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 0.000000 4378109d15e0: 0000: 407b29d2 bf9af8cb 3f2c9009 3f1203b9 3fea3d23 4093d3df be06d382 bde42adc 4379109d1600: 0020: 40200000 bfbd9119 bf7635f5 bf50550b c156c638 4188a9c2 4203c74b 42146d8f 4380109d1620: 0040: 3d23d70b 3d23d70b 3e4ccccd 3f800000 be79fd80 3f1e194f 3f3f66f5 00000000 4381109d1640: 0060: 3f800000 00000000 00000000 00000000 00000000 00000000 00000000 3f800000 4382109d1660: 0080: 3e4ccccd 3e4ccccd 3f800000 3f800000 00000000 00000000 00000000 3f800000 4383109d1680: 00a0: 00000000 00000000 00000000 3f800000 02020000 02020202 02020202 00000202 4384109d15d4: 0000: c0313000 03200000 00000001 407b29d2 bf9af8cb 3f2c9009 3f1203b9 3fea3d23 4385109d15f4: 0020: 4093d3df be06d382 bde42adc 40200000 bfbd9119 bf7635f5 bf50550b c156c638 4386109d1614: 0040: 4188a9c2 4203c74b 42146d8f 3d23d70b 3d23d70b 3e4ccccd 3f800000 be79fd80 4387109d1634: 0060: 3f1e194f 3f3f66f5 00000000 3f800000 00000000 00000000 00000000 00000000 4388109d1654: 0080: 00000000 00000000 3f800000 3e4ccccd 3e4ccccd 3f800000 3f800000 00000000 4389109d1674: 00a0: 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000 02020000 4390109d1694: 00c0: 02020202 02020202 00000202 4391t3 opcode: CP_LOAD_STATE4 (30) (7 dwords) 4392 { DST_OFF = 13 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 1 } 4393 { STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 } 4394109d16ac: 0.000000 -28026765312.000000 -28026765312.000000 -28026765312.000000 4395109d16ac: 0000: 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0 4396109d16a0: 0000: c0053000 0060000d 00000001 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0 4397t0 write VFD_FETCH[0].INSTR_0 (220a) 4398 VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 | SWITCHNEXT } 4399 VFD_FETCH[0].INSTR_1: 0x107cb000 4400 VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 } 4401 VFD_FETCH[0].INSTR_3: { STEPRATE = 1 } 4402109d16bc: 0000: 0003220a 00080c0b 107cb000 00100000 00000001 4403t0 write VFD_DECODE[0].INSTR (228a) 4404 VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID | SWITCHNEXT } 4405109d16d0: 0000: 0000228a 6c0020df 4406t0 write VFD_FETCH[0x1].INSTR_0 (220e) 4407 VFD_FETCH[0x1].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 } 4408 VFD_FETCH[0x1].INSTR_1: 0x107cb00c 4409 VFD_FETCH[0x1].INSTR_2: { SIZE = 0xffff4 } 4410 VFD_FETCH[0x1].INSTR_3: { STEPRATE = 1 } 4411109d16d8: 0000: 0003220e 00000c0b 107cb00c 000ffff4 00000001 4412t0 write VFD_DECODE[0x1].INSTR (228b) 4413 VFD_DECODE[0x1].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r1.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID } 4414109d16ec: 0000: 0000228b 2c0060df 4415t0 write VFD_CONTROL_0 (2200) 4416 VFD_CONTROL_0: { TOTALATTRTOVS = 8 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 2 | STRMFETCHINSTRCNT = 2 | 0xa0000 } 4417 VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x } 4418 VFD_CONTROL_2: 0 4419 VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x } 4420 VFD_CONTROL_4: 0 4421109d16f4: 0000: 00042200 082a0008 fcfc0081 00000000 0000fc00 00000000 4422t0 write UCHE_INVALIDATE0 (0e8a) 4423 UCHE_INVALIDATE0: 0 4424 UCHE_INVALIDATE1: 0x12 4425109d170c: 0000: 00010e8a 00000000 00000012 4426t0 write VFD_INDEX_OFFSET (2208) 4427 VFD_INDEX_OFFSET: 0 4428 UNKNOWN_2209: 0 4429109d1718: 0000: 00012208 00000000 00000000 4430t0 write PC_RESTART_INDEX (21c6) 4431 PC_RESTART_INDEX: 0xffffffff 4432109d1724: 0000: 000021c6 ffffffff 4433t0 write CP_SCRATCH[0x7].REG (057f) 4434 CP_SCRATCH[0x7].REG: 0x68 4435 :0,103,115,104 4436109d172c: 0000: 0000057f 00000068 4437t3 opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords) 4438 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS } 4439 { NUM_INSTANCES = 1 } 4440 { NUM_INDICES = 240 } 4441 { FIRST_INDX = 0 } 4442 { INDX_BASE = 0x10bd1248 } 4443 { INDX_SIZE = 480 } 4444 draw[17] register values 4445!+ 00000067 CP_SCRATCH[0x5].REG: 0x67 4446 :0,103,115,104 4447!+ 00000068 CP_SCRATCH[0x7].REG: 0x68 4448 :0,103,115,104 4449 + 00000000 UCHE_INVALIDATE0: 0 4450 + 00000012 UCHE_INVALIDATE1: 0x12 4451 + 00000000 GRAS_CNTL: { 0 } 4452 + 00000000 GRAS_ALPHA_CONTROL: { 0 } 4453 + 00000000 RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 } 4454 + 00000001 RB_FS_OUTPUT_REG: { MRT = 1 } 4455 + 80000016 RB_DEPTH_CONTROL: { Z_TEST_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_READ_ENABLE } 4456 + 42001004 VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 } 4457 + 00040400 VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 } 4458 + 00000055 VPC_VARYING_INTERP[0].MODE: 0x55 4459 + 00000000 VPC_VARYING_INTERP[0x1].MODE: 0 4460 + 00000000 VPC_VARYING_INTERP[0x2].MODE: 0 4461 + 00000000 VPC_VARYING_INTERP[0x3].MODE: 0 4462 + 00000000 VPC_VARYING_INTERP[0x4].MODE: 0 4463 + 00000000 VPC_VARYING_INTERP[0x5].MODE: 0 4464 + 00000000 VPC_VARYING_INTERP[0x6].MODE: 0 4465 + 00000000 VPC_VARYING_INTERP[0x7].MODE: 0 4466 + 00000000 VPC_VARYING_PS_REPL[0].MODE: 0 4467 + 00000000 VPC_VARYING_PS_REPL[0x1].MODE: 0 4468 + 00000000 VPC_VARYING_PS_REPL[0x2].MODE: 0 4469 + 00000000 VPC_VARYING_PS_REPL[0x3].MODE: 0 4470 + 00000000 VPC_VARYING_PS_REPL[0x4].MODE: 0 4471 + 00000000 VPC_VARYING_PS_REPL[0x5].MODE: 0 4472 + 00000000 VPC_VARYING_PS_REPL[0x6].MODE: 0 4473 + 00000000 VPC_VARYING_PS_REPL[0x7].MODE: 0 4474 + 02000001 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 4475 + 00000012 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 4476 + ffffffff PC_RESTART_INDEX: 0xffffffff 4477!+ 082a0008 VFD_CONTROL_0: { TOTALATTRTOVS = 8 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 2 | STRMFETCHINSTRCNT = 2 | 0xa0000 } 4478 + fcfc0081 VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x } 4479 + 00000000 VFD_CONTROL_2: 0 4480 + 0000fc00 VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x } 4481 + 00000000 VFD_CONTROL_4: 0 4482 + 00000000 VFD_INDEX_OFFSET: 0 4483 + 00000000 UNKNOWN_2209: 0 4484!+ 00080c0b VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 | SWITCHNEXT } 4485 + 107cb000 VFD_FETCH[0].INSTR_1: 0x107cb000 4486 + 00100000 VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 } 4487 + 00000001 VFD_FETCH[0].INSTR_3: { STEPRATE = 1 } 4488 + 00000c0b VFD_FETCH[0x1].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 } 4489 + 107cb00c VFD_FETCH[0x1].INSTR_1: 0x107cb00c 4490 + 000ffff4 VFD_FETCH[0x1].INSTR_2: { SIZE = 0xffff4 } 4491 + 00000001 VFD_FETCH[0x1].INSTR_3: { STEPRATE = 1 } 4492!+ 6c0020df VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID | SWITCHNEXT } 4493 + 2c0060df VFD_DECODE[0x1].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r1.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID } 4494 + 00140010 SP_SP_CTRL_REG: { 0x140010 } 4495 + 000005ff SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f } 4496!+ 00201400 SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE } 4497!+ 08000042 SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 } 4498!+ 0010fc0a SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 } 4499!+ 00001e0e SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 } 4500 + 08080808 SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 } 4501 + 00000000 SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 4502!+ 10cd5000 SP_VS_OBJ_START: 0x10cd5000 4503 + 00000004 SP_VS_LENGTH_REG: 4 4504 + 00340402 SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE } 4505 + 8010003e SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 } 4506 + 7e420000 SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 4507 + 10cd2000 SP_FS_OBJ_START: 0x10cd2000 4508 + 00000001 SP_FS_LENGTH_REG: 1 4509 + 0000fc01 SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x } 4510 + 0001a000 SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM } 4511 + 00000000 SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 } 4512 + 00000000 SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 } 4513 + 00000000 SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 } 4514 + 00000000 SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 } 4515 + 00000000 SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 } 4516 + 00000000 SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 } 4517 + 00000000 SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 } 4518 + 7e420000 SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 4519 + 7e420000 SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 4520 + 7e420000 SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 4521 + 28000250 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE } 4522 + fcfc0100 HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x } 4523 + fff3f3f0 HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x } 4524 + fcfcfcfc HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x } 4525 + 00fcfcfc HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 } 4526 + 04000042 HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 } 4527 + 017e423e HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 } 4528 + 007e4200 HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 4529 + 007e4200 HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 4530 + 007e4200 HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 4531 + 00000003 HLSQ_UPDATE_CONTROL: 0x3 4532109d1734: 0000: c0053800 00000404 00000001 000000f0 00000000 10bd1248 000001e0 4533t0 write CP_SCRATCH[0x7].REG (057f) 4534 CP_SCRATCH[0x7].REG: 0x69 4535 :0,103,115,105 4536109d1750: 0000: 0000057f 00000069 4537t0 write CP_SCRATCH[0x5].REG (057d) 4538 CP_SCRATCH[0x5].REG: 0x6d 4539 :0,109,115,105 4540109d1758: 0000: 0000057d 0000006d 4541t0 write RB_DEPTH_CONTROL (2101) 4542 RB_DEPTH_CONTROL: { Z_TEST_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_READ_ENABLE } 4543109d1760: 0000: 00002101 80000016 4544t0 write GRAS_ALPHA_CONTROL (2073) 4545 GRAS_ALPHA_CONTROL: { 0 } 4546109d1768: 0000: 00002073 00000000 4547t0 write GRAS_SU_MODE_CONTROL (2078) 4548 GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS } 4549109d1770: 0000: 00002078 00100012 4550t0 write GRAS_SU_POINT_MINMAX (2070) 4551 GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 } 4552 GRAS_SU_POINT_SIZE: 1.000000 4553109d1778: 0000: 00012070 00100010 00000010 4554t0 write GRAS_SU_POLY_OFFSET_SCALE (2074) 4555 GRAS_SU_POLY_OFFSET_SCALE: 0.000000 4556 GRAS_SU_POLY_OFFSET_OFFSET: 0.000000 4557 GRAS_SU_POLY_OFFSET_CLAMP: 0.000000 4558109d1784: 0000: 00022074 00000000 00000000 00000000 4559t0 write GRAS_CL_CLIP_CNTL (2000) 4560 GRAS_CL_CLIP_CNTL: { 0x80000 } 4561109d1794: 0000: 00002000 00080000 4562t0 write PC_PRIM_VTX_CNTL (21c4) 4563 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 4564 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 4565109d179c: 0000: 000121c4 02000001 00000012 4566t0 write GRAS_SC_WINDOW_SCISSOR_BR (209c) 4567 GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 } 4568 GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 4569109d17a8: 0000: 0001209c 012b012b 00000000 4570t0 write RB_VPORT_Z_CLAMP[0].MIN (2120) 4571 RB_VPORT_Z_CLAMP[0].MIN: 0 4572 RB_VPORT_Z_CLAMP[0].MAX: 0xffffff 4573109d17b4: 0000: 00012120 00000000 00ffffff 4574t0 write HLSQ_UPDATE_CONTROL (23db) 4575 HLSQ_UPDATE_CONTROL: 0x3 4576109d17c0: 0000: 000023db 00000003 4577t0 write HLSQ_CONTROL_0_REG (23c0) 4578 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE } 4579 HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x } 4580 HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x } 4581 HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r0.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x } 4582 HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 } 4583109d17c8: 0000: 000423c0 28000250 fcfc0100 fff3f3f0 fcfcfc00 00fcfcfc 4584t0 write HLSQ_VS_CONTROL_REG (23c5) 4585 HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 } 4586 HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 } 4587 HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 4588 HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 4589 HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 4590109d17e0: 0000: 000423c5 04000042 017e423e 007e4200 007e4200 007e4200 4591t0 write SP_SP_CTRL_REG (22c0) 4592 SP_SP_CTRL_REG: { 0x140010 } 4593109d17f8: 0000: 000022c0 00140010 4594t0 write SP_INSTR_CACHE_CTRL (22c1) 4595 SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f } 4596109d1800: 0000: 000022c1 000005ff 4597t0 write SP_VS_LENGTH_REG (22e5) 4598 SP_VS_LENGTH_REG: 4 4599109d1808: 0000: 000022e5 00000004 4600t0 write SP_VS_CTRL_REG0 (22c4) 4601 SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE } 4602 SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 } 4603 SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 } 4604109d1810: 0000: 000222c4 00201400 08000042 0010fc0a 4605t0 write SP_VS_OUT[0].REG (22c7) 4606 SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 } 4607109d1820: 0000: 000022c7 00001e0e 4608t0 write SP_VS_VPC_DST[0].REG (22d8) 4609 SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 } 4610109d1828: 0000: 000022d8 08080808 4611t0 write SP_VS_OBJ_OFFSET_REG (22e0) 4612 SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 4613 SP_VS_OBJ_START: 0x10cd5000 4614109d1830: 0000: 000122e0 00000000 10cd5000 4615t0 write SP_FS_LENGTH_REG (22ef) 4616 SP_FS_LENGTH_REG: 1 4617109d183c: 0000: 000022ef 00000001 4618t0 write SP_FS_CTRL_REG0 (22e8) 4619 SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 2 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE } 4620 SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 } 4621109d1844: 0000: 000122e8 00340802 8010003e 4622t0 write SP_FS_OBJ_OFFSET_REG (22ea) 4623 SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 4624 SP_FS_OBJ_START: 0x108cb000 4625109d1850: 0000: 000122ea 7e420000 108cb000 4626t0 write SP_HS_OBJ_OFFSET_REG (230d) 4627 SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 4628109d185c: 0000: 0000230d 7e420000 4629t0 write SP_DS_OBJ_OFFSET_REG (2334) 4630 SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 4631109d1864: 0000: 00002334 7e420000 4632t0 write SP_GS_OBJ_OFFSET_REG (235b) 4633 SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 4634109d186c: 0000: 0000235b 7e420000 4635t0 write GRAS_CNTL (2003) 4636 GRAS_CNTL: { IJ_PERSP } 4637109d1874: 0000: 00002003 00000001 4638t0 write RB_RENDER_CONTROL2 (20a3) 4639 RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 | IJ_PERSP_PIXEL } 4640109d187c: 0000: 000020a3 00001000 4641t0 write RB_FS_OUTPUT_REG (2100) 4642 RB_FS_OUTPUT_REG: { MRT = 1 } 4643109d1884: 0000: 00002100 00000001 4644t0 write SP_FS_OUTPUT_REG (22f0) 4645 SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x } 4646109d188c: 0000: 000022f0 0000fc01 4647t0 write SP_FS_MRT[0].REG (22f1) 4648 SP_FS_MRT[0].REG: { REGID = r0.z | MRTFORMAT = RB4_R8G8B8A8_UNORM } 4649 SP_FS_MRT[0x1].REG: { REGID = r0.z | MRTFORMAT = 0 } 4650 SP_FS_MRT[0x2].REG: { REGID = r0.z | MRTFORMAT = 0 } 4651 SP_FS_MRT[0x3].REG: { REGID = r0.z | MRTFORMAT = 0 } 4652 SP_FS_MRT[0x4].REG: { REGID = r0.z | MRTFORMAT = 0 } 4653 SP_FS_MRT[0x5].REG: { REGID = r0.z | MRTFORMAT = 0 } 4654 SP_FS_MRT[0x6].REG: { REGID = r0.z | MRTFORMAT = 0 } 4655 SP_FS_MRT[0x7].REG: { REGID = r0.z | MRTFORMAT = 0 } 4656109d1894: 0000: 000722f1 0001a002 00000002 00000002 00000002 00000002 00000002 00000002 4657109d18b4: 0020: 00000002 4658t0 write VPC_ATTR (2140) 4659 VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 } 4660 VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 } 4661109d18b8: 0000: 00012140 42001004 00040400 4662t0 write VPC_VARYING_INTERP[0].MODE (2142) 4663 VPC_VARYING_INTERP[0].MODE: 0 4664 VPC_VARYING_INTERP[0x1].MODE: 0 4665 VPC_VARYING_INTERP[0x2].MODE: 0 4666 VPC_VARYING_INTERP[0x3].MODE: 0 4667 VPC_VARYING_INTERP[0x4].MODE: 0 4668 VPC_VARYING_INTERP[0x5].MODE: 0 4669 VPC_VARYING_INTERP[0x6].MODE: 0 4670 VPC_VARYING_INTERP[0x7].MODE: 0 4671109d18c4: 0000: 00072142 00000000 00000000 00000000 00000000 00000000 00000000 00000000 4672* 4673t0 write VPC_VARYING_PS_REPL[0].MODE (214a) 4674 VPC_VARYING_PS_REPL[0].MODE: 0 4675 VPC_VARYING_PS_REPL[0x1].MODE: 0 4676 VPC_VARYING_PS_REPL[0x2].MODE: 0 4677 VPC_VARYING_PS_REPL[0x3].MODE: 0 4678 VPC_VARYING_PS_REPL[0x4].MODE: 0 4679 VPC_VARYING_PS_REPL[0x5].MODE: 0 4680 VPC_VARYING_PS_REPL[0x6].MODE: 0 4681 VPC_VARYING_PS_REPL[0x7].MODE: 0 4682109d18e8: 0000: 0007214a 00000000 00000000 00000000 00000000 00000000 00000000 00000000 4683* 4684t3 opcode: CP_LOAD_STATE4 (30) (131 dwords) 4685 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 4 } 4686 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 4687 :2:0000:0000[40700000x_10000002x] mul.f r0.x, r0.z, c0.x 4688 :2:0001:0001[40700001x_10030002x] mul.f r0.y, r0.z, c0.w 4689 :3:0002:0002[63818000x_00001004x] mad.f32 r0.x, c1.x, r0.w, r0.x 4690 :3:0003:0003[63818001x_00011007x] mad.f32 r0.y, c1.w, r0.w, r0.y 4691 :3:0004:0004[63820000x_00001008x] mad.f32 r0.x, c2.x, r1.x, r0.x 4692 :3:0005:0005[63820001x_0001100bx] mad.f32 r0.y, c2.w, r1.x, r0.y 4693 :3:0006:0006[6382800ax_0000100cx] mad.f32 r2.z, c3.x, r1.y, r0.x 4694 :2:0007:0007[40700000x_10010002x] mul.f r0.x, r0.z, c0.y 4695 :3:0008:0008[6382800dx_0001100fx] mad.f32 r3.y, c3.w, r1.y, r0.y 4696 :3:0009:0009[63818000x_00001005x] mad.f32 r0.x, c1.y, r0.w, r0.x 4697 :1:0010:0010[20244001x_00000010x] mov.f32f32 r0.y, c4.x 4698 :3:0011:0011[63820000x_00001009x] mad.f32 r0.x, c2.y, r1.x, r0.x 4699 :0:0012:0012[00000000x_00000000x] nop 4700 :3:0013:0013[6382800bx_0000100dx] mad.f32 r2.w, c3.y, r1.y, r0.x 4701 :2:0014:0014[40700000x_10020002x] mul.f r0.x, r0.z, c0.z 4702 :2:0015:0015[40100001x_0001101cx] add.f r0.y, c7.x, r0.y 4703 :3:0016:0016[63818000x_00001006x] mad.f32 r0.x, c1.z, r0.w, r0.x 4704 :1:0017:0017[20244002x_00000011x] mov.f32f32 r0.z, c4.y 4705 :3:0018:0018[63820000x_0000100ax] mad.f32 r0.x, c2.z, r1.x, r0.x 4706 :1:0019:0019[20244004x_00000013x] mov.f32f32 r1.x, c4.w 4707 :3:0020:0020[6382800cx_0000100ex] mad.f32 r3.x, c3.z, r1.y, r0.x 4708 :2:0021:0021[40700000x_00070007x] mul.f r0.x, r1.w, r1.w 4709 :2:0022:0022[40100002x_0002101dx] add.f r0.z, c7.y, r0.z 4710 :3:0023:0023[63830000x_00000006x] mad.f32 r0.x, r1.z, r1.z, r0.x 4711 :2:0024:0024[40500411x_00041013x] (sat)max.f r4.y, c4.w, r1.x 4712 :3:0025:0025[63840000x_00000008x] mad.f32 r0.x, r2.x, r2.x, r0.x 4713 :1:0026:0026[20244003x_00000012x] mov.f32f32 r0.w, c4.z 4714 :0:0027:0027[00000200x_00000000x] (rpt2)nop 4715 :2:0028:0030[40100003x_0003101ex] add.f r0.w, c7.z, r0.w 4716 :0:0029:0031[00000000x_00000000x] nop 4717 :4:0030:0032[80300000x_00000000x] rsq r0.x, r0.x 4718 :2:0031:0033[40701004x_00000007x] (ss)mul.f r1.x, r1.w, r0.x 4719 :0:0032:0034[00000200x_00000000x] (rpt2)nop 4720 :2:0033:0037[40700004x_10150004x] mul.f r1.x, r1.x, c5.y 4721 :2:0034:0038[40700005x_00000006x] mul.f r1.y, r1.z, r0.x 4722 :0:0035:0039[00000200x_00000000x] (rpt2)nop 4723 :3:0036:0042[63828004x_00041014x] mad.f32 r1.x, c5.x, r1.y, r1.x 4724 :2:0037:0043[40700000x_00000008x] mul.f r0.x, r2.x, r0.x 4725 :0:0038:0044[00000200x_00000000x] (rpt2)nop 4726 :3:0039:0047[63800000x_00041016x] mad.f32 r0.x, c5.z, r0.x, r1.x 4727 :0:0040:0048[00000200x_00000000x] (rpt2)nop 4728 :2:0041:0051[40b00004x_00001034x] cmps.f.lt r1.x, c13.x, r0.x 4729 :2:0042:0052[40500000x_00001034x] max.f r0.x, c13.x, r0.x 4730 :0:0043:0053[00000100x_00000000x] (rpt1)nop 4731 :1:0044:0055[200c4004x_00000004x] cov.u32f32 r1.x, r1.x 4732 :3:0045:0056[63800001x_00011020x] mad.f32 r0.y, c8.x, r0.x, r0.y 4733 :3:0046:0057[63800002x_00021021x] mad.f32 r0.z, c8.y, r0.x, r0.z 4734 :3:0047:0058[63800000x_00031022x] mad.f32 r0.x, c8.z, r0.x, r0.w 4735 :3:0048:0059[6382040ex_00011024x] (sat)mad.f32 r3.z, c9.x, r1.x, r0.y 4736 :3:0049:0060[6382040fx_00021025x] (sat)mad.f32 r3.w, c9.y, r1.x, r0.z 4737 :3:0050:0061[63820410x_00001026x] (sat)mad.f32 r4.x, c9.z, r1.x, r0.x 4738 :0:0051:0062[03000000x_00000000x] end 4739 :0:0052:0063[00000000x_00000000x] nop 4740 :0:0053:0064[00000000x_00000000x] nop 4741 :0:0054:0065[00000000x_00000000x] nop 4742 :0:0055:0066[00000000x_00000000x] nop 4743 Stats: 4744 - shaderdb: 67 instr, 23 nops, 44 non-nops, 4 mov, 1 cov 4745 - shaderdb: 0 last-baryf, 0 half, 5 full, 13 constlen 4746 - shaderdb: 24 cat0, 5 cat1, 15 cat2, 22 cat3, 1 cat4, 0 cat5, 0 cat6, 0 cat7 4747 - shaderdb: 10 sstall, 1 (ss), 0 (sy) 4748109d190c: 0000: c0813000 01200000 00000000 10000002 40700000 10030002 40700001 00001004 4749109d192c: 0020: 63818000 00011007 63818001 00001008 63820000 0001100b 63820001 0000100c 4750109d194c: 0040: 6382800a 10010002 40700000 0001100f 6382800d 00001005 63818000 00000010 4751109d196c: 0060: 20244001 00001009 63820000 00000000 00000000 0000100d 6382800b 10020002 4752109d198c: 0080: 40700000 0001101c 40100001 00001006 63818000 00000011 20244002 0000100a 4753109d19ac: 00a0: 63820000 00000013 20244004 0000100e 6382800c 00070007 40700000 0002101d 4754109d19cc: 00c0: 40100002 00000006 63830000 00041013 40500411 00000008 63840000 00000012 4755109d19ec: 00e0: 20244003 00000000 00000200 0003101e 40100003 00000000 00000000 00000000 4756109d1a0c: 0100: 80300000 00000007 40701004 00000000 00000200 10150004 40700004 00000006 4757109d1a2c: 0120: 40700005 00000000 00000200 00041014 63828004 00000008 40700000 00000000 4758109d1a4c: 0140: 00000200 00041016 63800000 00000000 00000200 00001034 40b00004 00001034 4759109d1a6c: 0160: 40500000 00000000 00000100 00000004 200c4004 00011020 63800001 00021021 4760109d1a8c: 0180: 63800002 00031022 63800000 00011024 6382040e 00021025 6382040f 00001026 4761109d1aac: 01a0: 63820410 00000000 03000000 00000000 00000000 00000000 00000000 00000000 4762* 4763t3 opcode: CP_LOAD_STATE4 (30) (35 dwords) 4764 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 1 } 4765 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 4766 :2:0000:0000[47300002x_00002000x] bary.f r0.z, 0, r0.x 4767 :2:0001:0001[47300003x_00002001x] bary.f r0.w, 1, r0.x 4768 :2:0002:0002[47300004x_00002002x] bary.f r1.x, 2, r0.x 4769 :2:0003:0003[47308005x_00002003x] bary.f (ei)r1.y, 3, r0.x 4770 :0:0004:0004[03000000x_00000000x] end 4771 :0:0005:0005[00000000x_00000000x] nop 4772 :0:0006:0006[00000000x_00000000x] nop 4773 :0:0007:0007[00000000x_00000000x] nop 4774 :0:0008:0008[00000000x_00000000x] nop 4775 Stats: 4776 - shaderdb: 9 instr, 4 nops, 5 non-nops, 0 mov, 0 cov 4777 - shaderdb: 3 last-baryf, 0 half, 2 full, 0 constlen 4778 - shaderdb: 5 cat0, 0 cat1, 4 cat2, 0 cat3, 0 cat4, 0 cat5, 0 cat6, 0 cat7 4779 - shaderdb: 0 sstall, 0 (ss), 0 (sy) 4780109d1b18: 0000: c0213000 00700000 00000000 00002000 47300002 00002001 47300003 00002002 4781109d1b38: 0020: 47300004 00002003 47308005 00000000 03000000 00000000 00000000 00000000 4782* 4783t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 4784109d1ba4: 0000: c0002600 00000000 4785t3 opcode: CP_LOAD_STATE4 (30) (51 dwords) 4786 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 } 4787 { STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 } 4788109d1bb8: 3.924428 -1.210718 0.674073 0.570369 1.829991 4.619613 -0.131666 -0.111410 4789109d1bd8: 2.500000 -1.480991 -0.961761 -0.813798 -13.423393 17.082890 32.944622 37.106991 4790109d1bf8: 0.040000 0.040000 0.200000 1.000000 -0.244131 0.617574 0.747665 0.000000 4791109d1c18: 1.000000 0.000000 0.000000 0.000000 0.000000 0.000000 0.000000 1.000000 4792109d1c38: 0.200000 0.200000 1.000000 1.000000 0.000000 0.000000 0.000000 1.000000 4793109d1c58: 0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 0.000000 4794109d1bb8: 0000: 407b29d2 bf9af8cb 3f2c9009 3f1203b9 3fea3d23 4093d3df be06d382 bde42adc 4795109d1bd8: 0020: 40200000 bfbd9119 bf7635f5 bf50550b c156c638 4188a9c2 4203c74b 42146d8f 4796109d1bf8: 0040: 3d23d70b 3d23d70b 3e4ccccd 3f800000 be79fd80 3f1e194f 3f3f66f5 00000000 4797109d1c18: 0060: 3f800000 00000000 00000000 00000000 00000000 00000000 00000000 3f800000 4798109d1c38: 0080: 3e4ccccd 3e4ccccd 3f800000 3f800000 00000000 00000000 00000000 3f800000 4799109d1c58: 00a0: 00000000 00000000 00000000 3f800000 02020000 02020202 02020202 00000202 4800109d1bac: 0000: c0313000 03200000 00000001 407b29d2 bf9af8cb 3f2c9009 3f1203b9 3fea3d23 4801109d1bcc: 0020: 4093d3df be06d382 bde42adc 40200000 bfbd9119 bf7635f5 bf50550b c156c638 4802109d1bec: 0040: 4188a9c2 4203c74b 42146d8f 3d23d70b 3d23d70b 3e4ccccd 3f800000 be79fd80 4803109d1c0c: 0060: 3f1e194f 3f3f66f5 00000000 3f800000 00000000 00000000 00000000 00000000 4804109d1c2c: 0080: 00000000 00000000 3f800000 3e4ccccd 3e4ccccd 3f800000 3f800000 00000000 4805109d1c4c: 00a0: 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000 02020000 4806109d1c6c: 00c0: 02020202 02020202 00000202 4807t0 write VFD_INDEX_OFFSET (2208) 4808 VFD_INDEX_OFFSET: 0 4809 UNKNOWN_2209: 0 4810109d1c78: 0000: 00012208 00000000 00000000 4811t0 write PC_RESTART_INDEX (21c6) 4812 PC_RESTART_INDEX: 0xffffffff 4813109d1c84: 0000: 000021c6 ffffffff 4814t0 write CP_SCRATCH[0x7].REG (057f) 4815 CP_SCRATCH[0x7].REG: 0x6e 4816 :0,109,115,110 4817109d1c8c: 0000: 0000057f 0000006e 4818t3 opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords) 4819 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS } 4820 { NUM_INSTANCES = 1 } 4821 { NUM_INDICES = 60 } 4822 { FIRST_INDX = 0 } 4823 { INDX_BASE = 0x10bd1428 } 4824 { INDX_SIZE = 120 } 4825 draw[18] register values 4826!+ 0000006d CP_SCRATCH[0x5].REG: 0x6d 4827 :0,109,115,110 4828!+ 0000006e CP_SCRATCH[0x7].REG: 0x6e 4829 :0,109,115,110 4830 + 00080000 GRAS_CL_CLIP_CNTL: { 0x80000 } 4831!+ 00000001 GRAS_CNTL: { IJ_PERSP } 4832 + 00100010 GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 } 4833 + 00000010 GRAS_SU_POINT_SIZE: 1.000000 4834 + 00000000 GRAS_ALPHA_CONTROL: { 0 } 4835 + 00000000 GRAS_SU_POLY_OFFSET_SCALE: 0.000000 4836 + 00000000 GRAS_SU_POLY_OFFSET_OFFSET: 0.000000 4837 + 00000000 GRAS_SU_POLY_OFFSET_CLAMP: 0.000000 4838 + 00100012 GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS } 4839 + 012b012b GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 } 4840 + 00000000 GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 4841!+ 00001000 RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 | IJ_PERSP_PIXEL } 4842 + 00000001 RB_FS_OUTPUT_REG: { MRT = 1 } 4843 + 80000016 RB_DEPTH_CONTROL: { Z_TEST_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_READ_ENABLE } 4844 + 00000000 RB_VPORT_Z_CLAMP[0].MIN: 0 4845 + 00ffffff RB_VPORT_Z_CLAMP[0].MAX: 0xffffff 4846 + 42001004 VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 } 4847 + 00040400 VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 } 4848!+ 00000000 VPC_VARYING_INTERP[0].MODE: 0 4849 + 00000000 VPC_VARYING_INTERP[0x1].MODE: 0 4850 + 00000000 VPC_VARYING_INTERP[0x2].MODE: 0 4851 + 00000000 VPC_VARYING_INTERP[0x3].MODE: 0 4852 + 00000000 VPC_VARYING_INTERP[0x4].MODE: 0 4853 + 00000000 VPC_VARYING_INTERP[0x5].MODE: 0 4854 + 00000000 VPC_VARYING_INTERP[0x6].MODE: 0 4855 + 00000000 VPC_VARYING_INTERP[0x7].MODE: 0 4856 + 00000000 VPC_VARYING_PS_REPL[0].MODE: 0 4857 + 00000000 VPC_VARYING_PS_REPL[0x1].MODE: 0 4858 + 00000000 VPC_VARYING_PS_REPL[0x2].MODE: 0 4859 + 00000000 VPC_VARYING_PS_REPL[0x3].MODE: 0 4860 + 00000000 VPC_VARYING_PS_REPL[0x4].MODE: 0 4861 + 00000000 VPC_VARYING_PS_REPL[0x5].MODE: 0 4862 + 00000000 VPC_VARYING_PS_REPL[0x6].MODE: 0 4863 + 00000000 VPC_VARYING_PS_REPL[0x7].MODE: 0 4864 + 02000001 PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST } 4865 + 00000012 PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 4866 + ffffffff PC_RESTART_INDEX: 0xffffffff 4867 + 00000000 VFD_INDEX_OFFSET: 0 4868 + 00000000 UNKNOWN_2209: 0 4869 + 00140010 SP_SP_CTRL_REG: { 0x140010 } 4870 + 000005ff SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f } 4871 + 00201400 SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE } 4872 + 08000042 SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 } 4873 + 0010fc0a SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 } 4874 + 00001e0e SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 } 4875 + 08080808 SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 } 4876 + 00000000 SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 4877 + 10cd5000 SP_VS_OBJ_START: 0x10cd5000 4878 + 00000004 SP_VS_LENGTH_REG: 4 4879!+ 00340802 SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 2 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE } 4880 + 8010003e SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 } 4881 + 7e420000 SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 4882!+ 108cb000 SP_FS_OBJ_START: 0x108cb000 4883 + 00000001 SP_FS_LENGTH_REG: 1 4884 + 0000fc01 SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x } 4885!+ 0001a002 SP_FS_MRT[0].REG: { REGID = r0.z | MRTFORMAT = RB4_R8G8B8A8_UNORM } 4886!+ 00000002 SP_FS_MRT[0x1].REG: { REGID = r0.z | MRTFORMAT = 0 } 4887!+ 00000002 SP_FS_MRT[0x2].REG: { REGID = r0.z | MRTFORMAT = 0 } 4888!+ 00000002 SP_FS_MRT[0x3].REG: { REGID = r0.z | MRTFORMAT = 0 } 4889!+ 00000002 SP_FS_MRT[0x4].REG: { REGID = r0.z | MRTFORMAT = 0 } 4890!+ 00000002 SP_FS_MRT[0x5].REG: { REGID = r0.z | MRTFORMAT = 0 } 4891!+ 00000002 SP_FS_MRT[0x6].REG: { REGID = r0.z | MRTFORMAT = 0 } 4892!+ 00000002 SP_FS_MRT[0x7].REG: { REGID = r0.z | MRTFORMAT = 0 } 4893 + 7e420000 SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 4894 + 7e420000 SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 4895 + 7e420000 SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 4896 + 28000250 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE } 4897 + fcfc0100 HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x } 4898 + fff3f3f0 HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x } 4899!+ fcfcfc00 HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r0.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x } 4900 + 00fcfcfc HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 } 4901 + 04000042 HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 } 4902 + 017e423e HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 } 4903 + 007e4200 HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 4904 + 007e4200 HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 4905 + 007e4200 HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 4906 + 00000003 HLSQ_UPDATE_CONTROL: 0x3 4907109d1c94: 0000: c0053800 00000404 00000001 0000003c 00000000 10bd1428 00000078 4908t0 write CP_SCRATCH[0x7].REG (057f) 4909 CP_SCRATCH[0x7].REG: 0x6f 4910 :0,109,115,111 4911109d1cb0: 0000: 0000057f 0000006f 4912108ce2d0: 0000: c0013f00 109ce000 00000f2e 4913t2 nop 4914t0 write RB_DEPTH_CONTROL (2101) 4915 RB_DEPTH_CONTROL: { ZFUNC = FUNC_NEVER } 4916108ce2e8: 0000: 00002101 00000000 4917t0 write RB_STENCIL_CONTROL (2106) 4918 RB_STENCIL_CONTROL: { FUNC = FUNC_NEVER | FAIL = STENCIL_KEEP | ZPASS = STENCIL_KEEP | ZFAIL = STENCIL_KEEP | FUNC_BF = FUNC_NEVER | FAIL_BF = STENCIL_KEEP | ZPASS_BF = STENCIL_KEEP | ZFAIL_BF = STENCIL_KEEP } 4919 RB_STENCIL_CONTROL2: { 0 } 4920108ce2f0: 0000: 00012106 00000000 00000000 4921t0 write RB_STENCILREFMASK (210b) 4922 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0xff | 0xff000000 } 4923 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0xff | 0xff000000 } 4924108ce2fc: 0000: 0001210b ffff0000 ffff0000 4925t0 write GRAS_SU_MODE_CONTROL (2078) 4926 GRAS_SU_MODE_CONTROL: { LINEHALFWIDTH = 0.000000 } 4927108ce308: 0000: 00002078 00000000 4928t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 4929108ce310: 0000: c0002600 00000000 4930t0 write GRAS_CL_CLIP_CNTL (2000) 4931 GRAS_CL_CLIP_CNTL: { 0x80000 } 4932108ce318: 0000: 00002000 00080000 4933t0 write GRAS_CL_VPORT_XOFFSET_0 (2008) 4934 GRAS_CL_VPORT_XOFFSET_0: 150.000000 4935 GRAS_CL_VPORT_XSCALE_0: 150.000000 4936 GRAS_CL_VPORT_YOFFSET_0: 150.000000 4937 GRAS_CL_VPORT_YSCALE_0: -150.000000 4938 GRAS_CL_VPORT_ZOFFSET_0: 0.000000 4939 GRAS_CL_VPORT_ZSCALE_0: 1.000000 4940108ce320: 0000: 00052008 43160000 43160000 43160000 c3160000 00000000 3f800000 4941t0 write RB_RENDER_CONTROL (20a1) 4942 RB_RENDER_CONTROL: { DISABLE_COLOR_PIPE | 0xa } 4943108ce33c: 0000: 000020a1 0000002a 4944t0 write GRAS_SC_CONTROL (207b) 4945 GRAS_SC_CONTROL: { RENDER_MODE = RB_RESOLVE_PASS | MSAA_SAMPLES = 0 | MSAA_DISABLE | RASTER_MODE = 0x1 } 4946108ce344: 0000: 0000207b 00001808 4947t0 write PC_PRIM_VTX_CNTL (21c4) 4948 PC_PRIM_VTX_CNTL: { VAROUT = 0 | PROVOKING_VTX_LAST } 4949108ce34c: 0000: 000021c4 02000000 4950t0 write GRAS_ALPHA_CONTROL (2073) 4951 GRAS_ALPHA_CONTROL: { 0x2 } 4952108ce354: 0000: 00002073 00000002 4953t0 write GRAS_SC_WINDOW_SCISSOR_BR (209c) 4954 GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 } 4955 GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 4956108ce35c: 0000: 0001209c 012b012b 00000000 4957t0 write VFD_INDEX_OFFSET (2208) 4958 VFD_INDEX_OFFSET: 0 4959 UNKNOWN_2209: 0 4960108ce368: 0000: 00012208 00000000 00000000 4961t0 write HLSQ_UPDATE_CONTROL (23db) 4962 HLSQ_UPDATE_CONTROL: 0x3 4963108ce374: 0000: 000023db 00000003 4964t0 write HLSQ_CONTROL_0_REG (23c0) 4965 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE } 4966 HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x } 4967 HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x } 4968 HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x } 4969 HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 } 4970108ce37c: 0000: 000423c0 28000250 fcfc0100 fff3f3f0 fcfcfcfc 00fcfcfc 4971t0 write HLSQ_VS_CONTROL_REG (23c5) 4972 HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 1 } 4973 HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 } 4974 HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 4975 HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 4976 HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 4977108ce394: 0000: 000423c5 01000042 017e423e 007e4200 007e4200 007e4200 4978t0 write SP_SP_CTRL_REG (22c0) 4979 SP_SP_CTRL_REG: { 0x140010 } 4980108ce3ac: 0000: 000022c0 00140010 4981t0 write SP_INSTR_CACHE_CTRL (22c1) 4982 SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f } 4983108ce3b4: 0000: 000022c1 000005ff 4984t0 write SP_VS_LENGTH_REG (22e5) 4985 SP_VS_LENGTH_REG: 1 4986108ce3bc: 0000: 000022e5 00000001 4987t0 write SP_VS_CTRL_REG0 (22c4) 4988 SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE } 4989 SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 4 } 4990 SP_VS_PARAM_REG: { POSREGID = r0.x | PSIZEREGID = r63.x | TOTALVSOUTVAR = 0 } 4991108ce3c4: 0000: 000222c4 00200400 04000042 0000fc00 4992t0 write SP_VS_OBJ_OFFSET_REG (22e0) 4993 SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 4994 SP_VS_OBJ_START: 0x1073c000 4995108ce3d4: 0000: 000122e0 00000000 1073c000 4996t0 write SP_FS_LENGTH_REG (22ef) 4997 SP_FS_LENGTH_REG: 1 4998108ce3e0: 0000: 000022ef 00000001 4999t0 write SP_FS_CTRL_REG0 (22e8) 5000 SP_FS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE } 5001 SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | 0x80000000 } 5002108ce3e8: 0000: 000122e8 00340400 8000003e 5003t0 write SP_FS_OBJ_OFFSET_REG (22ea) 5004 SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 5005 SP_FS_OBJ_START: 0x1073b000 5006108ce3f4: 0000: 000122ea 7e420000 1073b000 5007t0 write SP_HS_OBJ_OFFSET_REG (230d) 5008 SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 5009108ce400: 0000: 0000230d 7e420000 5010t0 write SP_DS_OBJ_OFFSET_REG (2334) 5011 SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 5012108ce408: 0000: 00002334 7e420000 5013t0 write SP_GS_OBJ_OFFSET_REG (235b) 5014 SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 5015108ce410: 0000: 0000235b 7e420000 5016t0 write GRAS_CNTL (2003) 5017 GRAS_CNTL: { 0 } 5018108ce418: 0000: 00002003 00000000 5019t0 write RB_RENDER_CONTROL2 (20a3) 5020 RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 } 5021108ce420: 0000: 000020a3 00000000 5022t0 write RB_FS_OUTPUT_REG (2100) 5023 RB_FS_OUTPUT_REG: { MRT = 0 } 5024108ce428: 0000: 00002100 00000000 5025t0 write SP_FS_OUTPUT_REG (22f0) 5026 SP_FS_OUTPUT_REG: { MRT = 0 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x } 5027108ce430: 0000: 000022f0 0000fc00 5028t0 write SP_FS_MRT[0].REG (22f1) 5029 SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = 0 } 5030 SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 } 5031 SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 } 5032 SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 } 5033 SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 } 5034 SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 } 5035 SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 } 5036 SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 } 5037108ce438: 0000: 000722f1 00000000 00000000 00000000 00000000 00000000 00000000 00000000 5038* 5039t0 write VPC_ATTR (2140) 5040 VPC_ATTR: { TOTALATTR = 0 | THRDASSIGN = 1 | 0x40000000 } 5041 VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 0 | NUMNONPOSVSVAR = 0 } 5042108ce45c: 0000: 00012140 40001000 00000000 5043t0 write VPC_VARYING_INTERP[0].MODE (2142) 5044 VPC_VARYING_INTERP[0].MODE: 0 5045 VPC_VARYING_INTERP[0x1].MODE: 0 5046 VPC_VARYING_INTERP[0x2].MODE: 0 5047 VPC_VARYING_INTERP[0x3].MODE: 0 5048 VPC_VARYING_INTERP[0x4].MODE: 0 5049 VPC_VARYING_INTERP[0x5].MODE: 0 5050 VPC_VARYING_INTERP[0x6].MODE: 0 5051 VPC_VARYING_INTERP[0x7].MODE: 0 5052108ce468: 0000: 00072142 00000000 00000000 00000000 00000000 00000000 00000000 00000000 5053* 5054t0 write VPC_VARYING_PS_REPL[0].MODE (214a) 5055 VPC_VARYING_PS_REPL[0].MODE: 0 5056 VPC_VARYING_PS_REPL[0x1].MODE: 0 5057 VPC_VARYING_PS_REPL[0x2].MODE: 0 5058 VPC_VARYING_PS_REPL[0x3].MODE: 0 5059 VPC_VARYING_PS_REPL[0x4].MODE: 0 5060 VPC_VARYING_PS_REPL[0x5].MODE: 0 5061 VPC_VARYING_PS_REPL[0x6].MODE: 0 5062 VPC_VARYING_PS_REPL[0x7].MODE: 0 5063108ce48c: 0000: 0007214a 00000000 00000000 00000000 00000000 00000000 00000000 00000000 5064* 5065t3 opcode: CP_LOAD_STATE4 (30) (35 dwords) 5066 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 1 } 5067 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 5068 :0:0000:0000[03000000x_00000000x] end 5069 :0:0001:0001[00000000x_00000000x] nop 5070 :0:0002:0002[00000000x_00000000x] nop 5071 :0:0003:0003[00000000x_00000000x] nop 5072 :0:0004:0004[00000000x_00000000x] nop 5073 Stats: 5074 - shaderdb: 5 instr, 4 nops, 1 non-nops, 0 mov, 0 cov 5075 - shaderdb: 0 last-baryf, 0 half, 0 full, 0 constlen 5076 - shaderdb: 5 cat0, 0 cat1, 0 cat2, 0 cat3, 0 cat4, 0 cat5, 0 cat6, 0 cat7 5077 - shaderdb: 0 sstall, 0 (ss), 0 (sy) 5078108ce4b0: 0000: c0213000 00600000 00000000 00000000 03000000 00000000 00000000 00000000 5079* 5080t3 opcode: CP_LOAD_STATE4 (30) (35 dwords) 5081 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 1 } 5082 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 5083 :1:0000:0000[20244000x_00000000x] mov.f32f32 r0.x, c0.x 5084 :1:0001:0001[20244001x_00000001x] mov.f32f32 r0.y, c0.y 5085 :1:0002:0002[20244002x_00000002x] mov.f32f32 r0.z, c0.z 5086 :1:0003:0003[20244003x_00000003x] mov.f32f32 r0.w, c0.w 5087 :0:0004:0004[03000000x_00000000x] end 5088 :0:0005:0005[00000000x_00000000x] nop 5089 :0:0006:0006[00000000x_00000000x] nop 5090 :0:0007:0007[00000000x_00000000x] nop 5091 :0:0008:0008[00000000x_00000000x] nop 5092 Stats: 5093 - shaderdb: 9 instr, 4 nops, 5 non-nops, 4 mov, 0 cov 5094 - shaderdb: 0 last-baryf, 0 half, 1 full, 1 constlen 5095 - shaderdb: 5 cat0, 4 cat1, 0 cat2, 0 cat3, 0 cat4, 0 cat5, 0 cat6, 0 cat7 5096 - shaderdb: 0 sstall, 0 (ss), 0 (sy) 5097108ce53c: 0000: c0213000 00700000 00000000 00000000 20244000 00000001 20244001 00000002 5098108ce55c: 0020: 20244002 00000003 20244003 00000000 03000000 00000000 00000000 00000000 5099* 5100t0 write VFD_FETCH[0].INSTR_0 (220a) 5101 VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 12 } 5102 VFD_FETCH[0].INSTR_1: 0x1074a000 5103 VFD_FETCH[0].INSTR_2: { SIZE = 0x1000 } 5104 VFD_FETCH[0].INSTR_3: { STEPRATE = 1 } 5105108ce5c8: 0000: 0003220a 0000060b 1074a000 00001000 00000001 5106t0 write VFD_DECODE[0].INSTR (228a) 5107 VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.x | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID } 5108108ce5dc: 0000: 0000228a 2c0000df 5109t0 write VFD_CONTROL_0 (2200) 5110 VFD_CONTROL_0: { TOTALATTRTOVS = 4 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 1 | STRMFETCHINSTRCNT = 1 | 0xa0000 } 5111 VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x } 5112 VFD_CONTROL_2: 0 5113 VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x } 5114 VFD_CONTROL_4: 0 5115108ce5e4: 0000: 00042200 041a0004 fcfc0081 00000000 0000fc00 00000000 5116t0 write UCHE_INVALIDATE0 (0e8a) 5117 UCHE_INVALIDATE0: 0 5118 UCHE_INVALIDATE1: 0x12 5119108ce5fc: 0000: 00010e8a 00000000 00000012 5120t0 write RB_COPY_CONTROL (20fc) 5121 RB_COPY_CONTROL: { MSAA_RESOLVE = MSAA_ONE | MODE = RB_COPY_RESOLVE | FASTCLEAR = 0 | GMEM_BASE = 0x64000 } 5122 RB_COPY_DEST_BASE: { BASE = 0x10edc000 } 5123 RB_COPY_DEST_PITCH: { PITCH = 1280 } 5124 RB_COPY_DEST_INFO: { FORMAT = RB4_R8G8B8A8_UNORM | SWAP = WZYX | DITHER_MODE = DITHER_DISABLE | COMPONENT_ENABLE = 0xf | ENDIAN = ENDIAN_NONE | TILE = TILE4_LINEAR } 5125108ce608: 0000: 000320fc 00064010 10edc000 00000028 0003c068 5126t0 write CP_SCRATCH[0x7].REG (057f) 5127 CP_SCRATCH[0x7].REG: 0x75 5128 :0,109,115,117 5129108ce61c: 0000: 0000057f 00000075 5130t3 opcode: CP_DRAW_INDX_OFFSET (38) (4 dwords) 5131 { PRIM_TYPE = DI_PT_RECTLIST | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_8_BIT | PATCH_TYPE = TESS_QUADS } 5132 { NUM_INSTANCES = 1 } 5133 { NUM_INDICES = 2 } 5134 draw[19] register values 5135!+ 00000075 CP_SCRATCH[0x7].REG: 0x75 5136 :0,109,115,117 5137 + 00000000 UCHE_INVALIDATE0: 0 5138 + 00000012 UCHE_INVALIDATE1: 0x12 5139 + 00080000 GRAS_CL_CLIP_CNTL: { 0x80000 } 5140!+ 00000000 GRAS_CNTL: { 0 } 5141 + 43160000 GRAS_CL_VPORT_XOFFSET_0: 150.000000 5142 + 43160000 GRAS_CL_VPORT_XSCALE_0: 150.000000 5143 + 43160000 GRAS_CL_VPORT_YOFFSET_0: 150.000000 5144 + c3160000 GRAS_CL_VPORT_YSCALE_0: -150.000000 5145!+ 00000000 GRAS_CL_VPORT_ZOFFSET_0: 0.000000 5146!+ 3f800000 GRAS_CL_VPORT_ZSCALE_0: 1.000000 5147!+ 00000002 GRAS_ALPHA_CONTROL: { 0x2 } 5148!+ 00000000 GRAS_SU_MODE_CONTROL: { LINEHALFWIDTH = 0.000000 } 5149!+ 00001808 GRAS_SC_CONTROL: { RENDER_MODE = RB_RESOLVE_PASS | MSAA_SAMPLES = 0 | MSAA_DISABLE | RASTER_MODE = 0x1 } 5150 + 012b012b GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 } 5151 + 00000000 GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 5152!+ 0000002a RB_RENDER_CONTROL: { DISABLE_COLOR_PIPE | 0xa } 5153!+ 00000000 RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 } 5154!+ 00064010 RB_COPY_CONTROL: { MSAA_RESOLVE = MSAA_ONE | MODE = RB_COPY_RESOLVE | FASTCLEAR = 0 | GMEM_BASE = 0x64000 } 5155!+ 10edc000 RB_COPY_DEST_BASE: { BASE = 0x10edc000 } 5156!+ 00000028 RB_COPY_DEST_PITCH: { PITCH = 1280 } 5157!+ 0003c068 RB_COPY_DEST_INFO: { FORMAT = RB4_R8G8B8A8_UNORM | SWAP = WZYX | DITHER_MODE = DITHER_DISABLE | COMPONENT_ENABLE = 0xf | ENDIAN = ENDIAN_NONE | TILE = TILE4_LINEAR } 5158!+ 00000000 RB_FS_OUTPUT_REG: { MRT = 0 } 5159!+ 00000000 RB_DEPTH_CONTROL: { ZFUNC = FUNC_NEVER } 5160 + 00000000 RB_STENCIL_CONTROL: { FUNC = FUNC_NEVER | FAIL = STENCIL_KEEP | ZPASS = STENCIL_KEEP | ZFAIL = STENCIL_KEEP | FUNC_BF = FUNC_NEVER | FAIL_BF = STENCIL_KEEP | ZPASS_BF = STENCIL_KEEP | ZFAIL_BF = STENCIL_KEEP } 5161 + 00000000 RB_STENCIL_CONTROL2: { 0 } 5162!+ ffff0000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0xff | 0xff000000 } 5163!+ ffff0000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0xff | 0xff000000 } 5164!+ 40001000 VPC_ATTR: { TOTALATTR = 0 | THRDASSIGN = 1 | 0x40000000 } 5165!+ 00000000 VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 0 | NUMNONPOSVSVAR = 0 } 5166 + 00000000 VPC_VARYING_INTERP[0].MODE: 0 5167 + 00000000 VPC_VARYING_INTERP[0x1].MODE: 0 5168 + 00000000 VPC_VARYING_INTERP[0x2].MODE: 0 5169 + 00000000 VPC_VARYING_INTERP[0x3].MODE: 0 5170 + 00000000 VPC_VARYING_INTERP[0x4].MODE: 0 5171 + 00000000 VPC_VARYING_INTERP[0x5].MODE: 0 5172 + 00000000 VPC_VARYING_INTERP[0x6].MODE: 0 5173 + 00000000 VPC_VARYING_INTERP[0x7].MODE: 0 5174 + 00000000 VPC_VARYING_PS_REPL[0].MODE: 0 5175 + 00000000 VPC_VARYING_PS_REPL[0x1].MODE: 0 5176 + 00000000 VPC_VARYING_PS_REPL[0x2].MODE: 0 5177 + 00000000 VPC_VARYING_PS_REPL[0x3].MODE: 0 5178 + 00000000 VPC_VARYING_PS_REPL[0x4].MODE: 0 5179 + 00000000 VPC_VARYING_PS_REPL[0x5].MODE: 0 5180 + 00000000 VPC_VARYING_PS_REPL[0x6].MODE: 0 5181 + 00000000 VPC_VARYING_PS_REPL[0x7].MODE: 0 5182!+ 02000000 PC_PRIM_VTX_CNTL: { VAROUT = 0 | PROVOKING_VTX_LAST } 5183!+ 041a0004 VFD_CONTROL_0: { TOTALATTRTOVS = 4 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 1 | STRMFETCHINSTRCNT = 1 | 0xa0000 } 5184 + fcfc0081 VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x } 5185 + 00000000 VFD_CONTROL_2: 0 5186 + 0000fc00 VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x } 5187 + 00000000 VFD_CONTROL_4: 0 5188 + 00000000 VFD_INDEX_OFFSET: 0 5189 + 00000000 UNKNOWN_2209: 0 5190!+ 0000060b VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 12 } 5191!+ 1074a000 VFD_FETCH[0].INSTR_1: 0x1074a000 5192!+ 00001000 VFD_FETCH[0].INSTR_2: { SIZE = 0x1000 } 5193 + 00000001 VFD_FETCH[0].INSTR_3: { STEPRATE = 1 } 5194!+ 2c0000df VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.x | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID } 5195 + 00140010 SP_SP_CTRL_REG: { 0x140010 } 5196 + 000005ff SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f } 5197!+ 00200400 SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE } 5198!+ 04000042 SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 4 } 5199!+ 0000fc00 SP_VS_PARAM_REG: { POSREGID = r0.x | PSIZEREGID = r63.x | TOTALVSOUTVAR = 0 } 5200 + 00000000 SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 5201!+ 1073c000 SP_VS_OBJ_START: 0x1073c000 5202!+ 00000001 SP_VS_LENGTH_REG: 1 5203!+ 00340400 SP_FS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE } 5204!+ 8000003e SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | 0x80000000 } 5205 + 7e420000 SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 5206!+ 1073b000 SP_FS_OBJ_START: 0x1073b000 5207 + 00000001 SP_FS_LENGTH_REG: 1 5208!+ 0000fc00 SP_FS_OUTPUT_REG: { MRT = 0 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x } 5209!+ 00000000 SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = 0 } 5210!+ 00000000 SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 } 5211!+ 00000000 SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 } 5212!+ 00000000 SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 } 5213!+ 00000000 SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 } 5214!+ 00000000 SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 } 5215!+ 00000000 SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 } 5216!+ 00000000 SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 } 5217 + 7e420000 SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 5218 + 7e420000 SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 5219 + 7e420000 SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 } 5220 + 28000250 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE } 5221 + fcfc0100 HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x } 5222 + fff3f3f0 HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x } 5223!+ fcfcfcfc HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x } 5224 + 00fcfcfc HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 } 5225!+ 01000042 HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 1 } 5226 + 017e423e HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 } 5227 + 007e4200 HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 5228 + 007e4200 HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 5229 + 007e4200 HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 } 5230 + 00000003 HLSQ_UPDATE_CONTROL: 0x3 5231108ce624: 0000: c0023800 00000088 00000001 00000002 5232t0 write CP_SCRATCH[0x7].REG (057f) 5233 CP_SCRATCH[0x7].REG: 0x76 5234 :0,109,115,118 5235108ce634: 0000: 0000057f 00000076 5236t0 write RB_COPY_CONTROL (20fc) 5237 RB_COPY_CONTROL: { MSAA_RESOLVE = MSAA_ONE | MODE = RB_COPY_RESOLVE | FASTCLEAR = 0 | GMEM_BASE = 0 } 5238 RB_COPY_DEST_BASE: { BASE = 0x10f3c000 } 5239 RB_COPY_DEST_PITCH: { PITCH = 1280 } 5240 RB_COPY_DEST_INFO: { FORMAT = RB4_R8G8B8A8_UNORM | SWAP = WXYZ | DITHER_MODE = DITHER_DISABLE | COMPONENT_ENABLE = 0xf | ENDIAN = ENDIAN_NONE | TILE = TILE4_LINEAR } 5241108ce63c: 0000: 000320fc 00000010 10f3c000 00000028 0003c168 5242t0 write CP_SCRATCH[0x7].REG (057f) 5243 CP_SCRATCH[0x7].REG: 0x77 5244 :0,109,115,119 5245108ce650: 0000: 0000057f 00000077 5246t3 opcode: CP_DRAW_INDX_OFFSET (38) (4 dwords) 5247 { PRIM_TYPE = DI_PT_RECTLIST | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_8_BIT | PATCH_TYPE = TESS_QUADS } 5248 { NUM_INSTANCES = 1 } 5249 { NUM_INDICES = 2 } 5250 draw[20] register values 5251!+ 00000077 CP_SCRATCH[0x7].REG: 0x77 5252 :0,109,115,119 5253!+ 00000010 RB_COPY_CONTROL: { MSAA_RESOLVE = MSAA_ONE | MODE = RB_COPY_RESOLVE | FASTCLEAR = 0 | GMEM_BASE = 0 } 5254!+ 10f3c000 RB_COPY_DEST_BASE: { BASE = 0x10f3c000 } 5255 + 00000028 RB_COPY_DEST_PITCH: { PITCH = 1280 } 5256!+ 0003c168 RB_COPY_DEST_INFO: { FORMAT = RB4_R8G8B8A8_UNORM | SWAP = WXYZ | DITHER_MODE = DITHER_DISABLE | COMPONENT_ENABLE = 0xf | ENDIAN = ENDIAN_NONE | TILE = TILE4_LINEAR } 5257108ce658: 0000: c0023800 00000088 00000001 00000002 5258t0 write CP_SCRATCH[0x7].REG (057f) 5259 CP_SCRATCH[0x7].REG: 0x78 5260 :0,109,115,120 5261108ce668: 0000: 0000057f 00000078 5262t0 write GRAS_SC_CONTROL (207b) 5263 GRAS_SC_CONTROL: { RENDER_MODE = RB_RENDERING_PASS | MSAA_SAMPLES = 0 | MSAA_DISABLE | RASTER_MODE = 0 } 5264108ce670: 0000: 0000207b 00000800 5265############################################################ 5266vertices: 0 5267cmd: glxgears/23375: fence=1029605 5268cmd: glxgears/23375: fence=1029606 5269cmd: glxgears/23375: fence=1029607 5270cmd: glxgears/23375: fence=1029608 5271cmd: glxgears/23375: fence=1029609 5272cmd: glxgears/23375: fence=1029610 5273cmd: glxgears/23375: fence=1029611 5274cmd: glxgears/23375: fence=1029612 5275cmd: glxgears/23375: fence=1029613 5276cmd: glxgears/23375: fence=1029614 5277cmd: glxgears/23375: fence=1029615 5278cmd: glxgears/23375: fence=1029616 5279cmd: glxgears/23375: fence=1029617 5280cmd: glxgears/23375: fence=1029618 5281cmd: glxgears/23375: fence=1029619 5282cmd: glxgears/23375: fence=1029620 5283cmd: glxgears/23375: fence=1029621 5284cmd: glxgears/23375: fence=1029622 5285cmd: glxgears/23375: fence=1029623 5286cmd: glxgears/23375: fence=1029624 5287cmd: glxgears/23375: fence=1029625 5288cmd: glxgears/23375: fence=1029626 5289cmd: glxgears/23375: fence=1029627 5290cmd: glxgears/23375: fence=1029628 5291cmd: glxgears/23375: fence=1029629 5292cmd: glxgears/23375: fence=1029630 5293cmd: glxgears/23375: fence=1029631 5294cmd: glxgears/23375: fence=1029632 5295cmd: glxgears/23375: fence=1029633 5296cmd: glxgears/23375: fence=1029634 5297cmd: glxgears/23375: fence=1029635 5298cmd: glxgears/23375: fence=1029636 5299cmd: glxgears/23375: fence=1029637 5300cmd: glxgears/23375: fence=1029638 5301cmd: glxgears/23375: fence=1029639 5302cmd: glxgears/23375: fence=1029640 5303cmd: glxgears/23375: fence=1029641 5304cmd: glxgears/23375: fence=1029642 5305cmd: glxgears/23375: fence=1029643 5306cmd: glxgears/23375: fence=1029644 5307cmd: glxgears/23375: fence=1029645 5308cmd: glxgears/23375: fence=1029646 5309cmd: glxgears/23375: fence=1029647 5310cmd: glxgears/23375: fence=1029648 5311cmd: glxgears/23375: fence=1029649 5312cmd: glxgears/23375: fence=1029650 5313cmd: glxgears/23375: fence=1029651 5314cmd: glxgears/23375: fence=1029652 5315cmd: glxgears/23375: fence=1029653 5316cmd: glxgears/23375: fence=1029654 5317cmd: glxgears/23375: fence=1029655 5318cmd: glxgears/23375: fence=1029656 5319cmd: glxgears/23375: fence=1029657 5320cmd: glxgears/23375: fence=1029658 5321cmd: glxgears/23375: fence=1029659 5322cmd: glxgears/23375: fence=1029660 5323cmd: glxgears/23375: fence=1029661 5324cmd: glxgears/23375: fence=1029662 5325cmd: glxgears/23375: fence=1029663 5326cmd: glxgears/23375: fence=1029664 5327cmd: glxgears/23375: fence=1029665 5328cmd: glxgears/23375: fence=1029666 5329cmd: glxgears/23375: fence=1029667 5330cmd: glxgears/23375: fence=1029668 5331cmd: glxgears/23375: fence=1029669 5332cmd: glxgears/23375: fence=1029670 5333cmd: glxgears/23375: fence=1029671 5334cmd: glxgears/23375: fence=1029672 5335cmd: glxgears/23375: fence=1029673 5336cmd: glxgears/23375: fence=1029674 5337cmd: glxgears/23375: fence=1029675 5338cmd: glxgears/23375: fence=1029676 5339cmd: glxgears/23375: fence=1029677 5340cmd: glxgears/23375: fence=1029678 5341cmd: glxgears/23375: fence=1029679 5342cmd: glxgears/23375: fence=1029680 5343cmd: glxgears/23375: fence=1029681 5344cmd: glxgears/23375: fence=1029682 5345cmd: glxgears/23375: fence=1029683 5346cmd: glxgears/23375: fence=1029684 5347cmd: glxgears/23375: fence=1029685 5348cmd: glxgears/23375: fence=1029686 5349cmd: glxgears/23375: fence=1029687 5350cmd: glxgears/23375: fence=1029688 5351cmd: glxgears/23375: fence=1029689 5352cmd: glxgears/23375: fence=1029690 5353cmd: glxgears/23375: fence=1029691 5354cmd: glxgears/23375: fence=1029692 5355cmd: glxgears/23375: fence=1029693 5356cmd: glxgears/23375: fence=1029694 5357cmd: glxgears/23375: fence=1029695 5358cmd: glxgears/23375: fence=1029696 5359cmd: glxgears/23375: fence=1029697 5360cmd: glxgears/23375: fence=1029698 5361cmd: glxgears/23375: fence=1029699 5362cmd: glxgears/23375: fence=1029700 5363cmd: glxgears/23375: fence=1029701 5364cmd: glxgears/23375: fence=1029702 5365cmd: glxgears/23375: fence=1029703 5366cmd: glxgears/23375: fence=1029704 5367cmd: glxgears/23375: fence=1029705 5368cmd: glxgears/23375: fence=1029706 5369cmd: glxgears/23375: fence=1029707 5370cmd: glxgears/23375: fence=1029708 5371cmd: glxgears/23375: fence=1029709 5372cmd: glxgears/23375: fence=1029710 5373cmd: glxgears/23375: fence=1029711 5374cmd: glxgears/23375: fence=1029712 5375cmd: glxgears/23375: fence=1029713 5376cmd: glxgears/23375: fence=1029714 5377cmd: glxgears/23375: fence=1029715 5378cmd: glxgears/23375: fence=1029716 5379cmd: glxgears/23375: fence=1029717 5380cmd: glxgears/23375: fence=1029718 5381cmd: glxgears/23375: fence=1029719 5382cmd: glxgears/23375: fence=1029720 5383cmd: glxgears/23375: fence=1029721 5384cmd: glxgears/23375: fence=1029722 5385cmd: glxgears/23375: fence=1029723 5386cmd: glxgears/23375: fence=1029724 5387cmd: glxgears/23375: fence=1029725 5388cmd: glxgears/23375: fence=1029726 5389cmd: glxgears/23375: fence=1029727 5390cmd: glxgears/23375: fence=1029728 5391cmd: glxgears/23375: fence=1029729 5392cmd: glxgears/23375: fence=1029730 5393cmd: glxgears/23375: fence=1029731 5394cmd: glxgears/23375: fence=1029732 5395cmd: glxgears/23375: fence=1029733 5396cmd: glxgears/23375: fence=1029734 5397cmd: glxgears/23375: fence=1029735 5398cmd: glxgears/23375: fence=1029736 5399cmd: glxgears/23375: fence=1029737 5400cmd: glxgears/23375: fence=1029738 5401cmd: glxgears/23375: fence=1029739 5402cmd: glxgears/23375: fence=1029740 5403cmd: glxgears/23375: fence=1029741 5404cmd: glxgears/23375: fence=1029742 5405cmd: glxgears/23375: fence=1029743 5406cmd: glxgears/23375: fence=1029744 5407cmd: glxgears/23375: fence=1029745 5408cmd: glxgears/23375: fence=1029746 5409cmd: glxgears/23375: fence=1029747 5410cmd: glxgears/23375: fence=1029748 5411cmd: glxgears/23375: fence=1029749 5412cmd: glxgears/23375: fence=1029750 5413cmd: glxgears/23375: fence=1029751 5414cmd: glxgears/23375: fence=1029752 5415cmd: glxgears/23375: fence=1029753 5416cmd: glxgears/23375: fence=1029754 5417cmd: glxgears/23375: fence=1029755 5418cmd: glxgears/23375: fence=1029756 5419cmd: glxgears/23375: fence=1029757 5420cmd: glxgears/23375: fence=1029758 5421cmd: glxgears/23375: fence=1029759 5422cmd: glxgears/23375: fence=1029760 5423cmd: glxgears/23375: fence=1029761 5424cmd: glxgears/23375: fence=1029762 5425cmd: glxgears/23375: fence=1029763 5426cmd: glxgears/23375: fence=1029764 5427cmd: glxgears/23375: fence=1029765 5428cmd: glxgears/23375: fence=1029766 5429cmd: glxgears/23375: fence=1029767 5430cmd: glxgears/23375: fence=1029768 5431cmd: glxgears/23375: fence=1029769 5432cmd: glxgears/23375: fence=1029770 5433cmd: glxgears/23375: fence=1029771 5434cmd: glxgears/23375: fence=1029772 5435cmd: glxgears/23375: fence=1029773 5436cmd: glxgears/23375: fence=1029774 5437cmd: glxgears/23375: fence=1029775 5438cmd: glxgears/23375: fence=1029776 5439cmd: glxgears/23375: fence=1029777 5440cmd: glxgears/23375: fence=1029778 5441cmd: glxgears/23375: fence=1029779 5442cmd: glxgears/23375: fence=1029780 5443cmd: glxgears/23375: fence=1029781 5444cmd: glxgears/23375: fence=1029782 5445cmd: glxgears/23375: fence=1029783 5446cmd: glxgears/23375: fence=1029784 5447cmd: glxgears/23375: fence=1029785 5448cmd: glxgears/23375: fence=1029786 5449cmd: glxgears/23375: fence=1029787 5450cmd: glxgears/23375: fence=1029788 5451cmd: glxgears/23375: fence=1029789 5452cmd: glxgears/23375: fence=1029790 5453cmd: glxgears/23375: fence=1029791 5454cmd: glxgears/23375: fence=1029792 5455cmd: glxgears/23375: fence=1029793 5456cmd: glxgears/23375: fence=1029794 5457cmd: glxgears/23375: fence=1029795 5458cmd: glxgears/23375: fence=1029796 5459cmd: glxgears/23375: fence=1029797 5460cmd: glxgears/23375: fence=1029798 5461cmd: glxgears/23375: fence=1029799 5462cmd: glxgears/23375: fence=1029800 5463cmd: glxgears/23375: fence=1029801 5464cmd: glxgears/23375: fence=1029802 5465cmd: glxgears/23375: fence=1029803 5466cmd: glxgears/23375: fence=1029804 5467cmd: glxgears/23375: fence=1029805 5468cmd: glxgears/23375: fence=1029806 5469cmd: glxgears/23375: fence=1029807 5470cmd: glxgears/23375: fence=1029808 5471cmd: glxgears/23375: fence=1029809 5472cmd: glxgears/23375: fence=1029810 5473cmd: glxgears/23375: fence=1029811 5474cmd: glxgears/23375: fence=1029812 5475cmd: glxgears/23375: fence=1029813 5476cmd: glxgears/23375: fence=1029814 5477cmd: glxgears/23375: fence=1029815 5478cmd: glxgears/23375: fence=1029816 5479cmd: glxgears/23375: fence=1029817 5480cmd: glxgears/23375: fence=1029818 5481cmd: glxgears/23375: fence=1029819 5482cmd: glxgears/23375: fence=1029820 5483cmd: glxgears/23375: fence=1029821 5484cmd: glxgears/23375: fence=1029822 5485cmd: glxgears/23375: fence=1029823 5486cmd: glxgears/23375: fence=1029824 5487cmd: glxgears/23375: fence=1029825 5488cmd: glxgears/23375: fence=1029826 5489cmd: glxgears/23375: fence=1029827 5490cmd: glxgears/23375: fence=1029828 5491cmd: X/23360: fence=1029829 5492cmd: glxgears/23375: fence=1029830 5493cmd: glxgears/23375: fence=1029831 5494cmd: X/23360: fence=1029832 5495cmd: glxgears/23375: fence=1029833 5496cmd: glxgears/23375: fence=1029834 5497cmd: X/23360: fence=1029835 5498cmd: glxgears/23375: fence=1029836 5499cmd: glxgears/23375: fence=1029837 5500cmd: X/23360: fence=1029838 5501cmd: glxgears/23375: fence=1029839 5502cmd: glxgears/23375: fence=1029840 5503cmd: X/23360: fence=1029841 5504cmd: glxgears/23375: fence=1029842 5505cmd: glxgears/23375: fence=1029843 5506cmd: X/23360: fence=1029844 5507cmd: glxgears/23375: fence=1029845 5508cmd: glxgears/23375: fence=1029846 5509cmd: X/23360: fence=1029847 5510