1<?xml version="1.0" encoding="UTF-8"?> 2<!-- 3Copyright © 2020 Google, Inc. 4 5Permission is hereby granted, free of charge, to any person obtaining a 6copy of this software and associated documentation files (the "Software"), 7to deal in the Software without restriction, including without limitation 8the rights to use, copy, modify, merge, publish, distribute, sublicense, 9and/or sell copies of the Software, and to permit persons to whom the 10Software is furnished to do so, subject to the following conditions: 11 12The above copyright notice and this permission notice (including the next 13paragraph) shall be included in all copies or substantial portions of the 14Software. 15 16THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22SOFTWARE. 23 --> 24 25<isa> 26 27<!-- 28 Cat6 Instructions: load/store/atomic instructions 29 30 There are instructions with suffixes like: 31 "stg.a", "ldib.b", "atomic.g.add", "atomic.s.add" 32 They have the following meaning: 33 '.a' - "addrcalc" stg/ldg with complex address computations 34 '.b' - "bindless" instructions 35 '.g' - "global" atomics that operate on raw iova addresses 36 '.s' - "ssbo" pre-a6xx image/ssbo atomics 37 --> 38 39<bitset name="#instruction-cat6" extends="#instruction"> 40 <field pos="59" name="JP" type="bool" display="(jp)"/> 41 <field pos="60" name="SY" type="bool" display="(sy)"/> 42 <pattern low="61" high="63">110</pattern> <!-- cat6 --> 43 <!-- is load dst / store src a half-reg? --> 44 <derived name="TYPE_HALF" expr="#type-half" type="bool" display="h"/> 45 <encode> 46 <map name="TYPE">src->cat6.type</map> 47 </encode> 48</bitset> 49 50<bitset name="#instruction-cat6-a3xx" extends="#instruction-cat6"> 51 <field name="TYPE" low="49" high="51" type="#type"/> 52 <!-- TODO pull more fields up to this level, when they are common across sub-encodings --> 53</bitset> 54 55<bitset name="#instruction-cat6-ldg" extends="#instruction-cat6-a3xx"> 56 <pattern pos="0" >1</pattern> 57 <field low="14" high="21" name="SRC1" type="#reg-gpr"/> 58 <pattern pos="23" >1</pattern> 59 <field low="24" high="31" name="SIZE" type="uint"/> 60 <field low="32" high="39" name="DST" type="#reg-gpr"/> 61 <pattern low="40" high="48">xxxxxxxxx</pattern> 62 <pattern low="52" high="53">00</pattern> 63 <pattern low="54" high="58">00000</pattern> <!-- OPC --> 64</bitset> 65 66<bitset name="ldg" extends="#instruction-cat6-ldg"> 67 <doc> 68 LoaD Global 69 </doc> 70 71 <display> 72 {SY}{JP}{NAME}.{TYPE} {TYPE_HALF}{DST}, g[{SRC1}{OFF}], {SIZE} 73 </display> 74 75 <field low="1" high="13" name="OFF" type="offset"/> 76 <pattern pos="22" >0</pattern> <!-- Imm offset ldg form --> 77 78 <encode> 79 <map name="OFF">extract_reg_iim(src->srcs[1])</map> 80 <map name="SIZE">extract_reg_uim(src->srcs[2])</map> 81 </encode> 82</bitset> 83 84<bitset name="ldg.a" extends="#instruction-cat6-ldg"> 85 <doc> 86 LoaD Global 87 </doc> 88 89 <gen min="600"/> 90 91 <display> 92 {SY}{JP}{NAME}.{TYPE} {TYPE_HALF}{DST}, g[{SRC1}+({SRC2}{OFF})<<{SRC2_BYTE_SHIFT}], {SIZE} 93 </display> 94 95 <override> 96 <display> 97 {SY}{JP}{NAME}.{TYPE} {TYPE_HALF}{DST}, g[{SRC1}+{SRC2}<<{SRC2_BYTE_SHIFT}{OFF}<<2], {SIZE} 98 </display> 99 <expr>{SRC2_ADD_DWORD_SHIFT} > 0</expr> 100 </override> 101 102 <field low="1" high="8" name="SRC2" type="#reg-gpr"/> 103 <field low="9" high="10" name="OFF" type="uoffset"/> 104 <assert pos="11" >0</assert> 105 <field low="12" high="13" name="SRC2_ADD_DWORD_SHIFT" type="uint"/> 106 <pattern pos="22" >1</pattern> <!-- Reg offset ldg form --> 107 108 <derived name="SRC2_BYTE_SHIFT" width="3" type="uint"> 109 <expr>{SRC2_ADD_DWORD_SHIFT} + 2</expr> 110 </derived> 111 112 <encode> 113 <map name="SRC2">src->srcs[1]</map> 114 <map name="SRC2_ADD_DWORD_SHIFT">extract_reg_uim(src->srcs[2])</map> 115 <map name="OFF">extract_reg_uim(src->srcs[3])</map> 116 <map name="SIZE">extract_reg_uim(src->srcs[4])</map> 117 </encode> 118</bitset> 119 120<bitset name="#instruction-cat6-stg" extends="#instruction-cat6-a3xx"> 121 <pattern pos="0" >x</pattern> 122 <field low="1" high="8" name="SRC3" type="#reg-gpr"/> 123 <pattern low="14" high="21">xxxxxxxx</pattern> 124 <pattern low="22" high="23">1x</pattern> 125 <field low="24" high="31" name="SIZE" type="uint"/> 126 <field pos="40" name="DST_OFF" type="bool"/> 127 <field low="41" high="48" name="SRC1" type="#reg-gpr"/> 128 <pattern pos="53" >x</pattern> 129 <pattern low="54" high="58">00011</pattern> <!-- OPC --> 130 131 <encode> 132 <map name="DST_OFF" force="true">1</map> 133 </encode> 134</bitset> 135 136<bitset name="stg" extends="#instruction-cat6-stg"> 137 <doc> 138 STore Global 139 </doc> 140 141 <display> 142 {SY}{JP}{NAME}.{TYPE} g[{SRC1}{OFF}], {TYPE_HALF}{SRC3}, {SIZE} 143 </display> 144 145 <derived name="OFF" width="13" type="offset"> 146 <expr>({OFF_HI} << 8) | {OFF_LO}</expr> 147 </derived> 148 149 <field low="9" high="13" name="OFF_HI" type="int"/> 150 <field low="32" high="39" name="OFF_LO" type="uint"/> 151 <pattern pos="52" >0</pattern> <!-- Imm offset stg form --> 152 153 <encode> 154 <map name="OFF_LO">extract_reg_iim(src->srcs[1]) & 0xff</map> 155 <map name="OFF_HI">extract_reg_iim(src->srcs[1]) >> 8</map> 156 <map name="SRC3">src->srcs[2]</map> 157 <map name="SIZE">extract_reg_uim(src->srcs[3])</map> 158 </encode> 159</bitset> 160 161<bitset name="stg.a" extends="#instruction-cat6-stg"> 162 <doc> 163 STore Global 164 </doc> 165 166 <gen min="600"/> 167 168 <display> 169 {SY}{JP}{NAME}.{TYPE} g[{SRC1}+({SRC2}{OFF})<<{DST_BYTE_SHIFT}], {TYPE_HALF}{SRC3}, {SIZE} 170 </display> 171 172 <override> 173 <display> 174 {SY}{JP}{NAME}.{TYPE} g[{SRC1}+{SRC2}<<{DST_BYTE_SHIFT}{OFF}<<2], {TYPE_HALF}{SRC3}, {SIZE} 175 </display> 176 <expr>{SRC2_ADD_DWORD_SHIFT} > 0</expr> 177 </override> 178 179 <derived name="DST_BYTE_SHIFT" width="3" type="uint"> 180 <expr>{SRC2_ADD_DWORD_SHIFT} + 2</expr> 181 </derived> 182 183 <field low="9" high="10" name="OFF" type="uoffset"/> 184 <assert pos="11" >0</assert> 185 <field low="12" high="13" name="SRC2_ADD_DWORD_SHIFT" type="uint"/> 186 <field low="32" high="39" name="SRC2" type="#reg-gpr"/> 187 <pattern pos="52" >1</pattern> <!-- Reg offset stg form --> 188 189 <encode> 190 <map name="SRC2">src->srcs[1]</map> 191 <map name="SRC2_ADD_DWORD_SHIFT">extract_reg_uim(src->srcs[2])</map> 192 <map name="OFF">extract_reg_uim(src->srcs[3])</map> 193 <map name="SRC3">src->srcs[4]</map> 194 <map name="SIZE">extract_reg_uim(src->srcs[5])</map> 195 </encode> 196</bitset> 197 198<bitset name="#instruction-cat6-a3xx-ld" extends="#instruction-cat6-a3xx"> 199 <pattern pos="0" >1</pattern> 200 <field low="1" high="13" name="OFF" type="offset"/> 201 <field low="14" high="21" name="SRC" type="#reg-gpr"/> 202 <pattern pos="22" >x</pattern> 203 <pattern pos="23" >1</pattern> 204 <field low="24" high="31" name="SIZE" type="uint"/> 205 <field low="32" high="39" name="DST" type="#reg-gpr"/> 206 <pattern low="40" high="48">xxxxxxxxx</pattern> 207 <pattern low="52" high="53">xx</pattern> 208 <encode> 209 <map name="OFF">extract_reg_uim(src->srcs[1])</map> 210 <map name="SRC">src->srcs[0]</map> 211 <map name="SIZE">extract_reg_uim(src->srcs[2])</map> 212 </encode> 213</bitset> 214 215<bitset name="ldl" extends="#instruction-cat6-a3xx-ld"> 216 <doc> 217 LoaD Local 218 </doc> 219 <display> 220 {SY}{JP}{NAME}.{TYPE} {DST}, l[{SRC}{OFF}], {SIZE} 221 </display> 222 <pattern low="54" high="58">00001</pattern> <!-- OPC --> 223</bitset> 224 225<bitset name="ldp" extends="#instruction-cat6-a3xx-ld"> 226 <doc> 227 LoaD Private 228 </doc> 229 <display> 230 {SY}{JP}{NAME}.{TYPE} {DST}, p[{SRC}{OFF}], {SIZE} 231 </display> 232 <pattern low="54" high="58">00010</pattern> <!-- OPC --> 233</bitset> 234 235<bitset name="ldlw" extends="#instruction-cat6-a3xx-ld"> 236 <doc> 237 LoaD Local (variant used for passing data between geom stages) 238 </doc> 239 <display> 240 {SY}{JP}{NAME}.{TYPE} {DST}, l[{SRC}{OFF}], {SIZE} 241 </display> 242 <pattern low="54" high="58">01010</pattern> <!-- OPC --> 243</bitset> 244 245<bitset name="ldlv" extends="#instruction-cat6-a3xx"> 246 <doc> 247 LoaD Local Varying - read directly from varying storage 248 </doc> 249 <display> 250 {SY}{JP}{NAME}.{TYPE} {DST}, l[{OFF}], {SIZE} 251 </display> 252 <pattern pos="0" >0</pattern> 253 <field low="1" high="13" name="OFF" type="uint"/> 254 <pattern low="14" high="21">xxxxxxxx</pattern> <!-- SRC --> 255 <pattern low="22" high="23">11</pattern> 256 <field low="24" high="31" name="SIZE" type="uint"/> 257 <field low="32" high="39" name="DST" type="#reg-gpr"/> 258 <pattern low="40" high="48">xxxxxxxxx</pattern> 259 <pattern low="52" high="53">xx</pattern> 260 <pattern low="54" high="58">11111</pattern> <!-- OPC --> 261 <encode> 262 <map name="SIZE">extract_reg_uim(src->srcs[1])</map> 263 <map name="OFF">extract_reg_uim(src->srcs[0])</map> 264 </encode> 265</bitset> 266 267<bitset name="#instruction-cat6-a3xx-st" extends="#instruction-cat6-a3xx"> 268 <derived name="OFF" width="13" type="offset"> 269 <expr>({OFF_HI} << 8) | {OFF_LO}</expr> 270 </derived> 271 272 <field low="1" high="8" name="SRC" type="#reg-gpr"/> 273 <field low="9" high="13" name="OFF_HI" type="int"/> 274 <pattern low="14" high="22">xxxxxxxxx</pattern> 275 <pattern pos="23" >1</pattern> 276 <field low="24" high="31" name="SIZE" type="uint"/> 277 <field low="32" high="39" name="OFF_LO" type="uint"/> 278 <pattern pos="40" >1</pattern> 279 <field low="41" high="48" name="DST" type="#reg-gpr"/> 280 <pattern low="52" high="53">xx</pattern> 281 <encode> 282 <!-- 283 TODO get rid of dst_offset and use a normal (potentially 284 immed) reg.. for now match the existing ir3 until we can 285 drop the old packed-struct encoding 286 --> 287 <map name="OFF_HI">src->cat6.dst_offset >> 8</map> 288 <map name="OFF_LO">src->cat6.dst_offset & 0xff</map> 289 <map name="SRC">src->srcs[1]</map> 290 <map name="DST">src->srcs[0]</map>" 291 <map name="SIZE">extract_reg_uim(src->srcs[2])</map> 292 </encode> 293</bitset> 294 295<bitset name="stl" extends="#instruction-cat6-a3xx-st"> 296 <doc> 297 STore Local 298 </doc> 299 <display> 300 {SY}{JP}{NAME}.{TYPE} l[{DST}{OFF}], {SRC}, {SIZE} 301 </display> 302 <pattern pos="0" >x</pattern> 303 <pattern low="54" high="58">00100</pattern> <!-- OPC --> 304</bitset> 305 306<bitset name="stp" extends="#instruction-cat6-a3xx-st"> 307 <doc> 308 STore Private 309 </doc> 310 <display> 311 {SY}{JP}{NAME}.{TYPE} p[{DST}{OFF}], {SRC}, {SIZE} 312 </display> 313 <pattern pos="0" >0</pattern> <!-- SRC_OFF --> 314 <pattern low="54" high="58">00101</pattern> <!-- OPC --> 315</bitset> 316 317<bitset name="stlw" extends="#instruction-cat6-a3xx-st"> 318 <doc> 319 STore Local (variant used for passing data between geom stages) 320 </doc> 321 <display> 322 {SY}{JP}{NAME}.{TYPE} l[{DST}{OFF}], {SRC}, {SIZE} 323 </display> 324 <pattern pos="0" >x</pattern> 325 <pattern low="54" high="58">01011</pattern> <!-- OPC --> 326</bitset> 327 328<bitset name="#stc-dst-imm" extends="#stc-dst"> 329 <display> 330 {OFFSET} 331 </display> 332 <field name="OFFSET" low="0" high="7" type="uint"/> 333 <pattern pos="8">0</pattern> 334</bitset> 335 336<bitset name="#stc-dst-a1" extends="#stc-dst"> 337 <display> 338 a1.x{OFFSET} 339 </display> 340 <field name="OFFSET" low="0" high="7" type="uoffset"/> 341 <pattern pos="8">1</pattern> 342</bitset> 343 344<bitset name="#stc-dst" size="9"> 345 <doc> 346 Encoding for stc destination which can be constant or have an 347 offset of a1.x. 348 </doc> 349 <encode type="struct ir3_instruction *" case-prefix=""> 350 <map name="OFFSET">extract_reg_uim(src->srcs[0])</map> 351 </encode> 352</bitset> 353 354<bitset name="stc" extends="#instruction-cat6-a3xx"> 355 <doc> 356 STore Const - used for shader prolog (between shps and shpe) 357 to store "uniform folded" values into CONST file 358 359 NOTE: TYPE field actually seems to be set to different 360 values (ie f32 vs u32), but it seems that only the size (16b vs 361 32b) matters. Setting a 16-bit type (f16, u16, or s16) doesn't 362 cause any promotion to 32-bit, it causes the 16-bit sources to 363 be stored one after the other starting with the low half of the 364 constant. So e.g. "stc.f16 c[1], hr0.x, 1" copies hr0.x to the 365 bottom half of c0.y. There seems to be no way to set just the 366 upper half. In any case, the blob seems to only use the 32-bit 367 versions. 368 369 The blob disassembly doesn't include the type, but we still 370 display it so that we can preserve the different values the blob 371 sets when round-tripping. 372 373 NOTE: this conflicts with stgb from earlier gens 374 </doc> 375 <display> 376 {SY}{JP}{NAME}.{TYPE} c[{DST}], {SRC}, {SIZE} 377 </display> 378 <gen min="600"/> 379 <pattern pos="0" >x</pattern> 380 <field low="1" high="8" name="SRC" type="#reg-gpr"/> 381 <pattern low="9" high="22">xxxxxxxxxxxxxx</pattern> 382 <pattern pos="23" >1</pattern> 383 <field low="24" high="26" name="SIZE" type="uint"/> 384 <pattern low="27" high="31">xxxxx</pattern> 385 <field low="32" high="40" name="DST" type="#stc-dst"/> 386 <pattern low="41" high="48">xxxxxxxx</pattern> 387 <pattern low="52" high="53">xx</pattern> 388 <pattern low="54" high="58">11100</pattern> <!-- OPC --> 389 <encode> 390 <map name="DST">src</map> 391 <map name="SRC">src->srcs[1]</map> 392 <map name="SIZE">src->cat6.iim_val</map> 393 </encode> 394</bitset> 395 396<bitset name="resinfo" extends="#instruction-cat6-a3xx"> 397 <display> 398 {SY}{JP}{NAME}.{TYPE}.{D}d {DST}, g[{SSBO}] 399 </display> 400 <derived name="D" expr="#cat6-d" type="uint"/> 401 402 <pattern pos="0" >x</pattern> 403 <pattern low="1" high="8" >xxxxxxxx</pattern> <!-- SRC3 --> 404 <field low="9" high="10" name="D_MINUS_ONE" type="uint"/> 405 <pattern pos="11" >x</pattern> <!-- TYPED --> 406 <pattern low="12" high="13">xx</pattern> <!-- TYPE_SIZE --> 407 <pattern low="14" high="21">xxxxxxxx</pattern> <!-- SRC1 --> 408 <pattern pos="22" >x</pattern> <!-- SRC1_IM --> 409 <pattern pos="23" >x</pattern> <!-- SRC2_IM --> 410 <pattern low="24" high="31">xxxxxxxx</pattern> <!-- SRC2 --> 411 <field low="32" high="39" name="DST" type="#reg-gpr"/> 412 <pattern pos="40" >0</pattern> 413 <field low="41" high="48" name="SSBO" type="#cat6-src"> <!-- SSBO/image binding point --> 414 <param name="SSBO_IM" as="SRC_IM"/> 415 </field> 416 <pattern pos="52" >x</pattern> <!-- G --> 417 <field pos="53" name="SSBO_IM" type="bool"/> 418 <pattern low="54" high="58">01111</pattern> <!-- OPC --> 419 <encode> 420 <map name="D_MINUS_ONE">src->cat6.d - 1</map> 421 <map name="SSBO">src->srcs[0]</map> 422 <map name="SSBO_IM">!!(src->srcs[0]->flags & IR3_REG_IMMED)</map> 423 </encode> 424</bitset> 425 426<!-- base pattern for a3xx cat6 ssbo/ibo load/store instructions --> 427<bitset name="#instruction-cat6-a3xx-ibo" extends="#instruction-cat6-a3xx"> 428 <derived name="D" expr="#cat6-d" type="uint"/> 429 <derived name="TYPE_SIZE" expr="#cat6-type-size" type="uint"/> 430 431 <field low="9" high="10" name="D_MINUS_ONE" type="uint"/> 432 <field pos="11" name="TYPED" type="#cat6-typed"/> 433 <field low="12" high="13" name="TYPE_SIZE_MINUS_ONE" type="uint"/> 434 <field low="41" high="48" name="SSBO" type="#cat6-src"> <!-- SSBO/image binding point --> 435 <param name="SSBO_IM" as="SRC_IM"/> 436 </field> 437 <pattern pos="52" >x</pattern> <!-- G --> 438 <field pos="53" name="SSBO_IM" type="bool"/> 439 <encode> 440 <map name="D_MINUS_ONE">src->cat6.d - 1</map> 441 <map name="TYPED">src</map> 442 <map name="TYPE_SIZE_MINUS_ONE">src->cat6.iim_val - 1</map> 443 <map name="SSBO">src->srcs[0]</map> 444 <map name="SSBO_IM">!!(src->srcs[0]->flags & IR3_REG_IMMED)</map> 445 </encode> 446</bitset> 447 448<bitset name="#instruction-cat6-a3xx-ibo-load" extends="#instruction-cat6-a3xx-ibo"> 449 <display> 450 {SY}{JP}{NAME}.{TYPED}.{D}d.{TYPE}.{TYPE_SIZE} {DST}, g[{SSBO}], {SRC1}, {SRC2} 451 </display> 452 <gen max="599"/> 453 454 <pattern low="1" high="8" >xxxxxxxx</pattern> <!-- SRC3 --> 455 <field low="14" high="21" name="SRC1" type="#cat6-src"> 456 <param name="SRC1_IM" as="SRC_IM"/> 457 </field> 458 <field pos="22" name="SRC1_IM" type="bool"/> 459 <field pos="23" name="SRC2_IM" type="bool"/> 460 <field low="24" high="31" name="SRC2" type="#cat6-src"> 461 <param name="SRC2_IM" as="SRC_IM"/> 462 </field> 463 <field low="32" high="39" name="DST" type="#reg-gpr"/> 464 <pattern pos="40" >x</pattern> <!-- .rck --> 465 <encode> 466 <map name="SRC1">src->srcs[1]</map> 467 <map name="SRC1_IM">!!(src->srcs[1]->flags & IR3_REG_IMMED)</map> 468 <map name="SRC2">src->srcs[2]</map> 469 <map name="SRC2_IM">!!(src->srcs[2]->flags & IR3_REG_IMMED)</map> 470 </encode> 471</bitset> 472 473<bitset name="ldgb" extends="#instruction-cat6-a3xx-ibo-load"> 474 <gen max="499"/> 475 <pattern low="54" high="58">11011</pattern> <!-- OPC --> 476 <pattern pos="0" >1</pattern> <!-- .a --> 477</bitset> 478 479<bitset name="ldgb" extends="#instruction-cat6-a3xx-ibo-load"> 480 <gen min="500"/> 481 <pattern low="54" high="58">11011</pattern> <!-- OPC --> 482 <pattern pos="0" >x</pattern> <!-- .a --> 483</bitset> 484 485<bitset name="ldib" extends="#instruction-cat6-a3xx-ibo-load"> 486 <pattern low="54" high="58">00110</pattern> <!-- OPC --> 487 <pattern pos="0" >1</pattern> <!-- .a --> 488</bitset> 489 490<bitset name="#instruction-cat6-a3xx-ibo-store" extends="#instruction-cat6-a3xx-ibo"> 491 <display> 492 {SY}{JP}{NAME}.{TYPED}.{D}d.{TYPE}.{TYPE_SIZE} g[{SSBO}], {SRC1}, {SRC2}, {SRC3} 493 </display> 494 <gen max="599"/> 495 496 <field low="1" high="8" name="SRC1" type="#reg-gpr"/> 497 <pattern low="14" high="22">xxxxxxxxx</pattern> 498 <field pos="23" name="SRC2_IM" type="bool"/> 499 <field low="24" high="31" name="SRC2" type="#cat6-src"> 500 <param name="SRC2_IM" as="SRC_IM"/> 501 </field> 502 <field low="32" high="39" name="SRC3" type="#cat6-src"> 503 <param name="SRC3_IM" as="SRC_IM"/> 504 </field> 505 <field pos="40" name="SRC3_IM" type="bool"/> 506 <encode> 507 <map name="SRC1">src->srcs[1]</map> 508 <map name="SRC1_IM">!!(src->srcs[1]->flags & IR3_REG_IMMED)</map> 509 <map name="SRC2">src->srcs[2]</map> 510 <map name="SRC2_IM">!!(src->srcs[2]->flags & IR3_REG_IMMED)</map> 511 <map name="SRC3">src->srcs[3]</map> 512 <map name="SRC3_IM">!!(src->srcs[3]->flags & IR3_REG_IMMED)</map> 513 </encode> 514</bitset> 515 516<bitset name="#instruction-cat6-a3xx-ibo-store-a4xx" extends="#instruction-cat6-a3xx-ibo-store"> 517 <pattern pos="0" >0</pattern> <!-- .a --> 518</bitset> 519 520<bitset name="#instruction-cat6-a3xx-ibo-store-a5xx" extends="#instruction-cat6-a3xx-ibo-store"> 521 <pattern pos="0" >1</pattern> <!-- .a --> 522</bitset> 523 524<bitset name="stgb" extends="#instruction-cat6-a3xx-ibo-store-a5xx"> 525 <gen min="500"/> 526 <pattern low="54" high="58">11100</pattern> <!-- OPC --> 527</bitset> 528 529<bitset name="stib" extends="#instruction-cat6-a3xx-ibo-store-a5xx"> 530 <gen min="500"/> 531 <pattern low="54" high="58">11101</pattern> <!-- OPC --> 532</bitset> 533 534<bitset name="stgb" extends="#instruction-cat6-a3xx-ibo-store-a4xx"> 535 <gen max="499"/> 536 <pattern low="54" high="58">11100</pattern> <!-- OPC --> 537</bitset> 538 539<bitset name="stib" extends="#instruction-cat6-a3xx-ibo-store-a4xx"> 540 <gen max="499"/> 541 <pattern low="54" high="58">11101</pattern> <!-- OPC --> 542</bitset> 543 544<bitset name="#instruction-cat6-a3xx-atomic" extends="#instruction-cat6-a3xx"> 545 <doc> 546 Base for atomic instructions (I think mostly a4xx+, as 547 a3xx didn't have real image/ssbo.. it was all just global). 548 Still used as of a6xx for local. 549 550 NOTE that existing disasm and asm parser expect atomic inc/dec 551 to still have an extra src. For now, match that. 552 </doc> 553 554 <display> 555 {SY}{JP}{NAME}.{TYPED}.{D}d.{TYPE}.{TYPE_SIZE}.l {DST}, l[{SRC1}], {SRC2} 556 </display> 557 558 <derived name="D" expr="#cat6-d" type="uint"/> 559 <derived name="TYPE_SIZE" expr="#cat6-type-size" type="uint"/> 560 561 <field low="9" high="10" name="D_MINUS_ONE" type="uint"/> 562 <field pos="11" name="TYPED" type="#cat6-typed"/> 563 <field low="12" high="13" name="TYPE_SIZE_MINUS_ONE" type="uint"/> 564 <field low="14" high="21" name="SRC1" type="#cat6-src"> 565 <param name="SRC1_IM" as="SRC_IM"/> 566 </field> 567 <field pos="22" name="SRC1_IM" type="bool"/> 568 <field pos="23" name="SRC2_IM" type="bool"/> 569 <field low="24" high="31" name="SRC2" type="#cat6-src"> 570 <param name="SRC2_IM" as="SRC_IM"/> 571 </field> 572 <field low="32" high="39" name="DST" type="#reg-gpr"/> 573 <pattern pos="40" >x</pattern> 574 <encode> 575 <map name="TYPED">src</map> 576 <map name="D_MINUS_ONE">src->cat6.d - 1</map> 577 <map name="TYPE_SIZE_MINUS_ONE">src->cat6.iim_val - 1</map> 578 <map name="SRC1">extract_cat6_SRC(src, 0)</map> 579 <map name="SRC1_IM">!!(extract_cat6_SRC(src, 0)->flags & IR3_REG_IMMED)</map> 580 <map name="SRC2">extract_cat6_SRC(src, 1)</map> 581 <map name="SRC2_IM">!!(extract_cat6_SRC(src, 1)->flags & IR3_REG_IMMED)</map> 582 </encode> 583</bitset> 584 585<bitset name="#instruction-cat6-a3xx-atomic-local" extends="#instruction-cat6-a3xx-atomic"> 586 <pattern pos="0" >1</pattern> 587 <pattern low="1" high="8" >00000000</pattern> <!-- SRC3 --> 588 <pattern low="41" high="48" >00000000</pattern> <!-- SSBO/image binding point --> 589 <pattern pos="52" >0</pattern> <!-- "G" --> 590 <pattern pos="53" >0</pattern> <!-- SSBO_IM --> 591</bitset> 592 593<bitset name="#instruction-cat6-a3xx-atomic-1src" extends="#instruction-cat6-a3xx-atomic-local"> 594 <!-- TODO when asm parser is updated, shift display templates, etc, here --> 595</bitset> 596 597<bitset name="#instruction-cat6-a3xx-atomic-2src" extends="#instruction-cat6-a3xx-atomic-local"> 598 <!-- TODO when asm parser is updated, shift display templates, etc, here --> 599</bitset> 600 601<bitset name="atomic.add" extends="#instruction-cat6-a3xx-atomic-2src"> 602 <pattern low="54" high="58">10000</pattern> <!-- OPC --> 603</bitset> 604 605<bitset name="atomic.sub" extends="#instruction-cat6-a3xx-atomic-2src"> 606 <pattern low="54" high="58">10001</pattern> <!-- OPC --> 607</bitset> 608 609<bitset name="atomic.xchg" extends="#instruction-cat6-a3xx-atomic-2src"> 610 <pattern low="54" high="58">10010</pattern> <!-- OPC --> 611</bitset> 612 613<bitset name="atomic.inc" extends="#instruction-cat6-a3xx-atomic-1src"> 614 <pattern low="54" high="58">10011</pattern> <!-- OPC --> 615</bitset> 616 617<bitset name="atomic.dec" extends="#instruction-cat6-a3xx-atomic-1src"> 618 <pattern low="54" high="58">10100</pattern> <!-- OPC --> 619</bitset> 620 621<bitset name="atomic.cmpxchg" extends="#instruction-cat6-a3xx-atomic-2src"> 622 <pattern low="54" high="58">10101</pattern> <!-- OPC --> 623</bitset> 624 625<bitset name="atomic.min" extends="#instruction-cat6-a3xx-atomic-2src"> 626 <pattern low="54" high="58">10110</pattern> <!-- OPC --> 627</bitset> 628 629<bitset name="atomic.max" extends="#instruction-cat6-a3xx-atomic-2src"> 630 <pattern low="54" high="58">10111</pattern> <!-- OPC --> 631</bitset> 632 633<bitset name="atomic.and" extends="#instruction-cat6-a3xx-atomic-2src"> 634 <pattern low="54" high="58">11000</pattern> <!-- OPC --> 635</bitset> 636 637<bitset name="atomic.or" extends="#instruction-cat6-a3xx-atomic-2src"> 638 <pattern low="54" high="58">11001</pattern> <!-- OPC --> 639</bitset> 640 641<bitset name="atomic.xor" extends="#instruction-cat6-a3xx-atomic-2src"> 642 <pattern low="54" high="58">11010</pattern> <!-- OPC --> 643</bitset> 644 645<bitset name="#instruction-cat6-a3xx-atomic-global" extends="#instruction-cat6-a3xx-atomic"> 646 <doc> 647 Pre-a6xx atomics for Image/SSBO 648 </doc> 649 650 <gen max="599"/> 651 652 <display> 653 {SY}{JP}{NAME}.{TYPED}.{D}d.{TYPE}.{TYPE_SIZE}.g {DST}, g[{SSBO}], {SRC1}, {SRC2}, {SRC3} 654 </display> 655 656 <field low="1" high="8" name="SRC3" type="#reg-gpr"/> 657 <field low="41" high="48" name="SSBO" type="#cat6-src"> <!-- SSBO/image binding point --> 658 <param name="SSBO_IM" as="SRC_IM"/> 659 </field> 660 <pattern pos="52" >1</pattern> <!-- "G" --> 661 <field pos="53" name="SSBO_IM" type="bool"/> 662 663 <encode> 664 <map name="SSBO">src->srcs[0]</map> 665 <map name="SSBO_IM">!!(src->srcs[0]->flags & IR3_REG_IMMED)</map> 666 <map name="SRC3">extract_cat6_SRC(src, 2)</map> 667 <map name="SRC3_IM">!!(extract_cat6_SRC(src, 2)->flags & IR3_REG_IMMED)</map> 668 </encode> 669</bitset> 670 671<bitset name="#instruction-cat6-a3xx-atomic-global-a4xx" extends="#instruction-cat6-a3xx-atomic-global"> 672 <pattern pos="0" >0</pattern> 673</bitset> 674 675<bitset name="atomic.s.add" extends="#instruction-cat6-a3xx-atomic-global-a4xx"> 676 <gen max="499"/> 677 <pattern low="54" high="58">10000</pattern> <!-- OPC --> 678</bitset> 679 680<bitset name="atomic.s.sub" extends="#instruction-cat6-a3xx-atomic-global-a4xx"> 681 <gen max="499"/> 682 <pattern low="54" high="58">10001</pattern> <!-- OPC --> 683</bitset> 684 685<bitset name="atomic.s.xchg" extends="#instruction-cat6-a3xx-atomic-global-a4xx"> 686 <gen max="499"/> 687 <pattern low="54" high="58">10010</pattern> <!-- OPC --> 688</bitset> 689 690<bitset name="atomic.s.inc" extends="#instruction-cat6-a3xx-atomic-global-a4xx"> 691 <gen max="499"/> 692 <pattern low="54" high="58">10011</pattern> <!-- OPC --> 693</bitset> 694 695<bitset name="atomic.s.dec" extends="#instruction-cat6-a3xx-atomic-global-a4xx"> 696 <gen max="499"/> 697 <pattern low="54" high="58">10100</pattern> <!-- OPC --> 698</bitset> 699 700<bitset name="atomic.s.cmpxchg" extends="#instruction-cat6-a3xx-atomic-global-a4xx"> 701 <gen max="499"/> 702 <pattern low="54" high="58">10101</pattern> <!-- OPC --> 703</bitset> 704 705<bitset name="atomic.s.min" extends="#instruction-cat6-a3xx-atomic-global-a4xx"> 706 <gen max="499"/> 707 <pattern low="54" high="58">10110</pattern> <!-- OPC --> 708</bitset> 709 710<bitset name="atomic.s.max" extends="#instruction-cat6-a3xx-atomic-global-a4xx"> 711 <gen max="499"/> 712 <pattern low="54" high="58">10111</pattern> <!-- OPC --> 713</bitset> 714 715<bitset name="atomic.s.and" extends="#instruction-cat6-a3xx-atomic-global-a4xx"> 716 <gen max="499"/> 717 <pattern low="54" high="58">11000</pattern> <!-- OPC --> 718</bitset> 719 720<bitset name="atomic.s.or" extends="#instruction-cat6-a3xx-atomic-global-a4xx"> 721 <gen max="499"/> 722 <pattern low="54" high="58">11001</pattern> <!-- OPC --> 723</bitset> 724 725<bitset name="atomic.s.xor" extends="#instruction-cat6-a3xx-atomic-global-a4xx"> 726 <gen max="499"/> 727 <pattern low="54" high="58">11010</pattern> <!-- OPC --> 728</bitset> 729 730<bitset name="#instruction-cat6-a3xx-atomic-global-a5xx" extends="#instruction-cat6-a3xx-atomic-global"> 731 <pattern pos="0" >1</pattern> 732</bitset> 733 734<bitset name="atomic.s.add" extends="#instruction-cat6-a3xx-atomic-global-a5xx"> 735 <gen min="500"/> 736 <pattern low="54" high="58">10000</pattern> <!-- OPC --> 737</bitset> 738 739<bitset name="atomic.s.sub" extends="#instruction-cat6-a3xx-atomic-global-a5xx"> 740 <gen min="500"/> 741 <pattern low="54" high="58">10001</pattern> <!-- OPC --> 742</bitset> 743 744<bitset name="atomic.s.xchg" extends="#instruction-cat6-a3xx-atomic-global-a5xx"> 745 <gen min="500"/> 746 <pattern low="54" high="58">10010</pattern> <!-- OPC --> 747</bitset> 748 749<bitset name="atomic.s.inc" extends="#instruction-cat6-a3xx-atomic-global-a5xx"> 750 <gen min="500"/> 751 <pattern low="54" high="58">10011</pattern> <!-- OPC --> 752</bitset> 753 754<bitset name="atomic.s.dec" extends="#instruction-cat6-a3xx-atomic-global-a5xx"> 755 <gen min="500"/> 756 <pattern low="54" high="58">10100</pattern> <!-- OPC --> 757</bitset> 758 759<bitset name="atomic.s.cmpxchg" extends="#instruction-cat6-a3xx-atomic-global-a5xx"> 760 <gen min="500"/> 761 <pattern low="54" high="58">10101</pattern> <!-- OPC --> 762</bitset> 763 764<bitset name="atomic.s.min" extends="#instruction-cat6-a3xx-atomic-global-a5xx"> 765 <gen min="500"/> 766 <pattern low="54" high="58">10110</pattern> <!-- OPC --> 767</bitset> 768 769<bitset name="atomic.s.max" extends="#instruction-cat6-a3xx-atomic-global-a5xx"> 770 <gen min="500"/> 771 <pattern low="54" high="58">10111</pattern> <!-- OPC --> 772</bitset> 773 774<bitset name="atomic.s.and" extends="#instruction-cat6-a3xx-atomic-global-a5xx"> 775 <gen min="500"/> 776 <pattern low="54" high="58">11000</pattern> <!-- OPC --> 777</bitset> 778 779<bitset name="atomic.s.or" extends="#instruction-cat6-a3xx-atomic-global-a5xx"> 780 <gen min="500"/> 781 <pattern low="54" high="58">11001</pattern> <!-- OPC --> 782</bitset> 783 784<bitset name="atomic.s.xor" extends="#instruction-cat6-a3xx-atomic-global-a5xx"> 785 <gen min="500"/> 786 <pattern low="54" high="58">11010</pattern> <!-- OPC --> 787</bitset> 788 789<bitset name="#instruction-cat6-a6xx-atomic-global" extends="#instruction-cat6-a3xx-atomic"> 790 <doc> 791 a6xx+ global atomics which take iova in SRC1 792 </doc> 793 794 <gen min="600"/> 795 796 <display> 797 {SY}{JP}{NAME}.{TYPED}.{D}d.{TYPE}.{TYPE_SIZE}.g {DST}, {SRC1}, {SRC2} 798 </display> 799 800 <pattern pos="0" >1</pattern> 801 <pattern low="1" high="8" >00000000</pattern> <!-- SRC3 --> 802 <pattern low="41" high="48" >00000000</pattern> <!-- SSBO/image binding point --> 803 <pattern pos="52" >1</pattern> <!-- "G" --> 804 <pattern pos="53" >0</pattern> <!-- SSBO_IM --> 805</bitset> 806 807<bitset name="atomic.g.add" extends="#instruction-cat6-a6xx-atomic-global"> 808 <pattern low="54" high="58">10000</pattern> <!-- OPC --> 809</bitset> 810 811<bitset name="atomic.g.sub" extends="#instruction-cat6-a6xx-atomic-global"> 812 <pattern low="54" high="58">10001</pattern> <!-- OPC --> 813</bitset> 814 815<bitset name="atomic.g.xchg" extends="#instruction-cat6-a6xx-atomic-global"> 816 <pattern low="54" high="58">10010</pattern> <!-- OPC --> 817</bitset> 818 819<bitset name="atomic.g.inc" extends="#instruction-cat6-a6xx-atomic-global"> 820 <pattern low="54" high="58">10011</pattern> <!-- OPC --> 821</bitset> 822 823<bitset name="atomic.g.dec" extends="#instruction-cat6-a6xx-atomic-global"> 824 <pattern low="54" high="58">10100</pattern> <!-- OPC --> 825</bitset> 826 827<bitset name="atomic.g.cmpxchg" extends="#instruction-cat6-a6xx-atomic-global"> 828 <pattern low="54" high="58">10101</pattern> <!-- OPC --> 829</bitset> 830 831<bitset name="atomic.g.min" extends="#instruction-cat6-a6xx-atomic-global"> 832 <pattern low="54" high="58">10110</pattern> <!-- OPC --> 833</bitset> 834 835<bitset name="atomic.g.max" extends="#instruction-cat6-a6xx-atomic-global"> 836 <pattern low="54" high="58">10111</pattern> <!-- OPC --> 837</bitset> 838 839<bitset name="atomic.g.and" extends="#instruction-cat6-a6xx-atomic-global"> 840 <pattern low="54" high="58">11000</pattern> <!-- OPC --> 841</bitset> 842 843<bitset name="atomic.g.or" extends="#instruction-cat6-a6xx-atomic-global"> 844 <pattern low="54" high="58">11001</pattern> <!-- OPC --> 845</bitset> 846 847<bitset name="atomic.g.xor" extends="#instruction-cat6-a6xx-atomic-global"> 848 <pattern low="54" high="58">11010</pattern> <!-- OPC --> 849</bitset> 850 851<!-- 852 New a6xx+ encodings for potentially bindless image/ssbo: 853 --> 854 855<bitset name="#instruction-cat6-a6xx" extends="#instruction-cat6"> 856 <doc> 857 Base for new instruction encoding that started being used 858 with a6xx for instructions supporting bindless mode. 859 </doc> 860 <gen min="600"/> 861 862 <derived name="TYPE_SIZE" expr="#cat6-type-size" type="uint"/> 863 864 <field low="1" high="3" name="BASE" type="#cat6-base"> 865 <param name="BINDLESS"/> 866 </field> 867 <pattern low="4" high="5" >00</pattern> 868 <field low="6" high="7" name="MODE" type="#cat6-src-mode"/> 869 <field pos="8" name="BINDLESS" type="bool"/> 870 <field low="12" high="13" name="TYPE_SIZE_MINUS_ONE" type="uint"/> 871 <pattern pos="40" >0</pattern> 872 <pattern low="54" high="58">00000</pattern> 873 <encode> 874 <map name="MODE">extract_cat6_DESC_MODE(src)</map> 875 <map name="TYPE_SIZE_MINUS_ONE">src->cat6.iim_val - 1</map> 876 <map name="BINDLESS">!!(src->flags & IR3_INSTR_B)</map> 877 <map name="BASE">src</map> 878 </encode> 879</bitset> 880 881<bitset name="#cat6-ldc-common" extends="#instruction-cat6-a6xx"> 882 <pattern pos="0" >x</pattern> 883 <pattern pos="11" >x</pattern> <!-- TYPED --> 884 <pattern low="14" high="19">011110</pattern> <!-- OPC --> 885 <pattern low="20" high="22">1xx</pattern> 886 <field pos="23" name="SRC1_IM" type="bool"/> 887 <derived name="SRC2_IM" expr="#cat6-direct" type="bool"/> 888 <field low="41" high="48" name="SRC2" type="#cat6-src"> 889 <param name="SRC2_IM" as="SRC_IM"/> 890 </field> 891 <field low="24" high="31" name="SRC1" type="#cat6-src"> 892 <param name="SRC1_IM" as="SRC_IM"/> 893 </field> 894 <pattern low="49" high="51">x11</pattern> <!-- TYPE --> 895 <encode> 896 <map name="SRC1_IM">!!(src->srcs[1]->flags & IR3_REG_IMMED)</map> 897 <map name="SRC1">src->srcs[1]</map> 898 <map name="SRC2">src->srcs[0]</map> 899 </encode> 900</bitset> 901 902<bitset name="ldc.k" extends="#cat6-ldc-common"> 903 <doc> 904 ldc.k copies a series of UBO values to constants. In other 905 words, it acts the same as a series of ldc followed by stc. It's 906 also similar to a CP_LOAD_STATE with a UBO source but executed 907 in the shader. 908 909 Like CP_LOAD_STATE, the UBO offset and const file offset must be 910 a multiple of 4 vec4's but it can load any number of vec4's. The 911 UBO descriptor and offset are the same as a normal ldc. The 912 const file offset is specified in a1.x and is in units of 913 components, and the number of vec4's to copy is specified in 914 LOAD_SIZE. 915 </doc> 916 <display> 917 {SY}{JP}ldc.{LOAD_SIZE}.k.{MODE}{BASE} c[a1.x], {SRC1}, {SRC2} 918 </display> 919 920 <derived name="LOAD_SIZE" expr="#cat6-load-size" type="uint"/> 921 922 <field low="32" high="39" name="LOAD_SIZE_MINUS_ONE" type="uint"/> 923 <pattern low="9" high="10">xx</pattern> <!-- D_MINUS_ONE --> 924 <pattern low="52" high="53">11</pattern> 925 926 <encode> 927 <map name="LOAD_SIZE_MINUS_ONE">src->cat6.iim_val - 1</map> 928 </encode> 929</bitset> 930 931<bitset name="ldc" extends="#cat6-ldc-common"> 932 <doc> 933 LoaD Constant - UBO load 934 </doc> 935 <!-- 936 TODO are these *really* all bindless? Or does that bit have a different 937 meaning? Maybe I don't have enough ldc examples from deqp-glesN 938 --> 939 <display> 940 {SY}{JP}{NAME}.offset{OFFSET}.{TYPE_SIZE}.{MODE}{BASE} {DST}, {SRC1}, {SRC2} 941 </display> 942 <field low="9" high="10" name="OFFSET" type="uint"/> <!-- D_MINUS_ONE --> 943 <field low="32" high="39" name="DST" type="#reg-gpr"/> 944 <pattern low="52" high="53">10</pattern> 945 <encode> 946 <map name="OFFSET">src->cat6.d</map> 947 </encode> 948</bitset> 949 950<bitset name="getspid" extends="#instruction-cat6-a6xx"> 951 <doc> 952 GET Shader Processor ID? 953 </doc> 954 <display> 955 {SY}{JP}{NAME}.{TYPE} {DST} 956 </display> 957 958 <pattern pos="0" >0</pattern> 959 <pattern low="9" high="10">xx</pattern> <!-- D_MINUS_ONE --> 960 <pattern pos="11" >x</pattern> <!-- TYPED --> 961 <pattern low="14" high="19">100100</pattern> <!-- OPC --> 962 <pattern low="20" high="23">x1xx</pattern> 963 <pattern low="24" high="31">xxxxxxxx</pattern> <!-- SRC2 --> 964 <field low="32" high="39" name="DST" type="#reg-gpr"/> 965 <pattern low="41" high="48">xxxxxxxx</pattern> <!-- SSBO/image binding point --> 966 <field low="49" high="51" name="TYPE" type="#type"/> 967 <pattern low="52" high="53">1x</pattern> 968</bitset> 969 970<bitset name="getwid" extends="#instruction-cat6-a6xx"> 971 <doc> 972 GET Wavefront ID 973 </doc> 974 <display> 975 {SY}{JP}{NAME}.{TYPE} {DST} 976 </display> 977 978 <pattern pos="0" >0</pattern> 979 <pattern low="9" high="10">xx</pattern> <!-- D_MINUS_ONE --> 980 <pattern pos="11" >x</pattern> <!-- TYPED --> 981 <pattern low="14" high="19">100101</pattern> <!-- OPC --> 982 <pattern low="20" high="23">x1xx</pattern> 983 <pattern low="24" high="31">xxxxxxxx</pattern> <!-- SRC2 --> 984 <field low="32" high="39" name="DST" type="#reg-gpr"/> 985 <pattern low="41" high="48">xxxxxxxx</pattern> <!-- SSBO/image binding point --> 986 <field low="49" high="51" name="TYPE" type="#type"/> 987 <pattern low="52" high="53">1x</pattern> 988</bitset> 989 990<bitset name="getfiberid" extends="#instruction-cat6-a6xx"> 991 <doc> 992 GET Fiber ID (gl_SubgroupID) 993 </doc> 994 995 <gen min="600"/> 996 997 <display> 998 {SY}{JP}{NAME}.{TYPE} {DST} 999 </display> 1000 1001 <pattern pos="0" >0</pattern> 1002 <pattern low="9" high="10">xx</pattern> <!-- D_MINUS_ONE --> 1003 <pattern pos="11" >x</pattern> <!-- TYPED --> 1004 <pattern low="14" high="19">100110</pattern> <!-- OPC --> 1005 <pattern low="20" high="23">11xx</pattern> 1006 <pattern low="24" high="31">xxxxxxxx</pattern> <!-- SRC2 --> 1007 <field low="32" high="39" name="DST" type="#reg-gpr"/> 1008 <pattern low="41" high="48">xxxxxxxx</pattern> <!-- SSBO/image binding point --> 1009 <field low="49" high="51" name="TYPE" type="#type"/> 1010 <pattern low="52" high="53">1x</pattern> 1011</bitset> 1012 1013<bitset name="resinfo.b" extends="#instruction-cat6-a6xx"> 1014 <doc> 1015 RESourceINFO - returns image/ssbo dimensions (3 components) 1016 </doc> 1017 <display> 1018 {SY}{JP}{NAME}.{TYPED}.{D}d.{TYPE}.{TYPE_SIZE}.{MODE}{BASE} {DST}, {SSBO} 1019 </display> 1020 1021 <derived name="D" expr="#cat6-d" type="uint"/> 1022 <derived name="TRUE" expr="#true" type="bool"/> 1023 1024 <pattern pos="0" >0</pattern> 1025 <field low="9" high="10" name="D_MINUS_ONE" type="uint"/> 1026 <field pos="11" name="TYPED" type="#cat6-typed"/> 1027 <pattern low="14" high="19">001111</pattern> <!-- OPC --> 1028 <pattern low="20" high="23">0110</pattern> 1029 <pattern low="24" high="31">xxxxxxxx</pattern> <!-- SRC2 --> 1030 <field low="32" high="39" name="DST" type="#reg-gpr"/> 1031 <field low="41" high="48" name="SSBO" type="#cat6-src"> <!-- SSBO/image binding point --> 1032 <param name="SSBO_IM" as="SRC_IM"/> 1033 </field> 1034 <derived name="SSBO_IM" expr="#cat6-direct" type="bool"/> 1035 <field low="49" high="51" name="TYPE" type="#type"/> 1036 <pattern low="52" high="53">1x</pattern> 1037 <encode> 1038 <map name="D_MINUS_ONE">src->cat6.d - 1</map> 1039 <map name="TYPED">src</map> 1040 <map name="SSBO">src->srcs[0]</map> 1041 <map name="SRC1">src->srcs[1]</map> 1042 </encode> 1043</bitset> 1044 1045<bitset name="#instruction-cat6-a6xx-ibo" extends="#instruction-cat6-a6xx"> 1046 <doc> 1047 IBO (ie. Image/SSBO) instructions 1048 </doc> 1049 <display> 1050 {SY}{JP}{NAME}.{TYPED}.{D}d.{TYPE}.{TYPE_SIZE}.{MODE}{BASE} {TYPE_HALF}{SRC1}, {SRC2}, {SSBO} 1051 </display> 1052 1053 <derived name="D" expr="#cat6-d" type="uint"/> 1054 <derived name="TRUE" expr="#true" type="bool"/> 1055 1056 <field low="9" high="10" name="D_MINUS_ONE" type="uint"/> 1057 <field pos="11" name="TYPED" type="#cat6-typed"/> 1058 <pattern low="20" high="23">0110</pattern> 1059 <field low="24" high="31" name="SRC2" type="#reg-gpr"/> 1060 <field low="32" high="39" name="SRC1" type="#reg-gpr"/> 1061 <field low="41" high="48" name="SSBO" type="#cat6-src"> <!-- SSBO/image binding point --> 1062 <param name="SSBO_IM" as="SRC_IM"/> 1063 </field> 1064 <derived name="SSBO_IM" expr="#cat6-direct" type="bool"/> 1065 <field low="49" high="51" name="TYPE" type="#type"/> 1066 <encode> 1067 <map name="TYPED">src</map> 1068 <map name="D_MINUS_ONE">src->cat6.d - 1</map> 1069 <map name="SSBO">src->srcs[0]</map> 1070 <map name="SRC1">src->srcs[2]</map> 1071 <map name="SRC2">src->srcs[1]</map> 1072 </encode> 1073</bitset> 1074 1075<bitset name="stib.b" extends="#instruction-cat6-a6xx-ibo"> 1076 <doc> 1077 STore IBo 1078 </doc> 1079 <pattern pos="0" >0</pattern> 1080 <pattern low="14" high="19">011101</pattern> <!-- OPC --> 1081 <pattern low="52" high="53">10</pattern> 1082</bitset> 1083 1084<bitset name="ldib.b" extends="#instruction-cat6-a6xx-ibo"> 1085 <doc> 1086 LoaD IBo 1087 </doc> 1088 <pattern pos="0" >x</pattern> <!-- blob seems to set randomly? --> 1089 <pattern low="14" high="19">000110</pattern> <!-- OPC --> 1090 <pattern low="52" high="53">10</pattern> 1091 <encode> 1092 <map name="SRC1">src->dsts[0]</map> 1093 </encode> 1094</bitset> 1095 1096<bitset name="atomic.b.add" extends="#instruction-cat6-a6xx-ibo"> 1097 <pattern pos="0" >x</pattern> 1098 <pattern low="14" high="19">010000</pattern> <!-- OPC --> 1099 <pattern low="52" high="53">11</pattern> 1100</bitset> 1101 1102<bitset name="atomic.b.sub" extends="#instruction-cat6-a6xx-ibo"> 1103 <pattern pos="0" >x</pattern> 1104 <pattern low="14" high="19">010001</pattern> <!-- OPC --> 1105 <pattern low="52" high="53">11</pattern> 1106</bitset> 1107 1108<bitset name="atomic.b.xchg" extends="#instruction-cat6-a6xx-ibo"> 1109 <pattern pos="0" >x</pattern> 1110 <pattern low="14" high="19">010010</pattern> <!-- OPC --> 1111 <pattern low="52" high="53">11</pattern> 1112</bitset> 1113 1114<!-- inc/dec? --> 1115 1116<bitset name="atomic.b.cmpxchg" extends="#instruction-cat6-a6xx-ibo"> 1117 <pattern pos="0" >x</pattern> 1118 <pattern low="14" high="19">010101</pattern> <!-- OPC --> 1119 <pattern low="52" high="53">11</pattern> 1120</bitset> 1121 1122<bitset name="atomic.b.min" extends="#instruction-cat6-a6xx-ibo"> 1123 <pattern pos="0" >x</pattern> 1124 <pattern low="14" high="19">010110</pattern> <!-- OPC --> 1125 <pattern low="52" high="53">11</pattern> 1126</bitset> 1127 1128<bitset name="atomic.b.max" extends="#instruction-cat6-a6xx-ibo"> 1129 <pattern pos="0" >x</pattern> 1130 <pattern low="14" high="19">010111</pattern> <!-- OPC --> 1131 <pattern low="52" high="53">11</pattern> 1132</bitset> 1133 1134<bitset name="atomic.b.and" extends="#instruction-cat6-a6xx-ibo"> 1135 <pattern pos="0" >x</pattern> 1136 <pattern low="14" high="19">011000</pattern> <!-- OPC --> 1137 <pattern low="52" high="53">11</pattern> 1138</bitset> 1139 1140<bitset name="atomic.b.or" extends="#instruction-cat6-a6xx-ibo"> 1141 <pattern pos="0" >x</pattern> 1142 <pattern low="14" high="19">011001</pattern> <!-- OPC --> 1143 <pattern low="52" high="53">11</pattern> 1144</bitset> 1145 1146<bitset name="atomic.b.xor" extends="#instruction-cat6-a6xx-ibo"> 1147 <pattern pos="0" >x</pattern> 1148 <pattern low="14" high="19">011010</pattern> <!-- OPC --> 1149 <pattern low="52" high="53">11</pattern> 1150</bitset> 1151 1152 1153 1154<expr name="#cat6-d"> 1155 {D_MINUS_ONE} + 1 1156</expr> 1157 1158<expr name="#cat6-type-size"> 1159 {TYPE_SIZE_MINUS_ONE} + 1 1160</expr> 1161 1162<expr name="#cat6-load-size"> 1163 {LOAD_SIZE_MINUS_ONE} + 1 1164</expr> 1165 1166<bitset name="#cat6-typed" size="1"> 1167 <override> 1168 <expr>{TYPED}</expr> 1169 <display> 1170 typed 1171 </display> 1172 </override> 1173 <display> 1174 untyped 1175 </display> 1176 <field name="TYPED" pos="0" type="bool"/> 1177 <encode type="struct ir3_instruction *"> 1178 <map name="TYPED" force="true">src->cat6.typed</map> 1179 </encode> 1180</bitset> 1181 1182<bitset name="#cat6-base" size="3"> 1183 <override> 1184 <expr>{BINDLESS}</expr> 1185 <display> 1186 .base{BASE} 1187 </display> 1188 </override> 1189 <display/> 1190 <field name="BASE" low="0" high="2" type="uint"/> 1191 <encode type="struct ir3_instruction *"> 1192 <map name="BASE">src->cat6.base</map> 1193 </encode> 1194</bitset> 1195 1196<bitset name="#cat6-src" size="8"> 1197 <doc> 1198 Source value that can be either immed or gpr 1199 </doc> 1200 <override> 1201 <expr>{SRC_IM}</expr> 1202 <display> 1203 {IMMED} 1204 </display> 1205 <field name="IMMED" low="0" high="7" type="uint"/> 1206 </override> 1207 <display> 1208 r{GPR}.{SWIZ} 1209 </display> 1210 <field name="SWIZ" low="0" high="1" type="#swiz"/> 1211 <field name="GPR" low="2" high="7" type="uint"/> 1212 <encode type="struct ir3_register *"> 1213 <map name="GPR">src->num >> 2</map> 1214 <map name="SWIZ">src->num & 0x3</map> 1215 <map name="IMMED">extract_reg_iim(src)</map> 1216 </encode> 1217</bitset> 1218 1219<expr name="#cat6-direct"> 1220 {MODE} == 0 1221</expr> 1222 1223<enum name="#cat6-src-mode"> 1224 <doc> 1225 Source mode for "new" a6xx+ instruction encodings 1226 </doc> 1227 <value val="0" display="imm"> 1228 <doc> 1229 Immediate index. 1230 </doc> 1231 </value> 1232 <value val="1" display="uniform"> 1233 <doc> 1234 Index from a uniform register (ie. does not depend on flow control) 1235 </doc> 1236 </value> 1237 <value val="2" display="nonuniform"> 1238 <doc> 1239 Index from a non-uniform register (ie. potentially depends on flow control) 1240 </doc> 1241 </value> 1242</enum> 1243 1244</isa> 1245