1 /*
2 * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Rob Clark <robclark@freedesktop.org>
25 */
26
27 #ifndef FD4_DRAW_H_
28 #define FD4_DRAW_H_
29
30 #include "pipe/p_context.h"
31
32 #include "freedreno_draw.h"
33
34 void fd4_draw_init(struct pipe_context *pctx);
35
36 /* draw packet changed on a4xx, so cannot reuse one from a2xx/a3xx.. */
37
38 static inline uint32_t
DRAW4(enum pc_di_primtype prim_type,enum pc_di_src_sel source_select,enum a4xx_index_size index_size,enum pc_di_vis_cull_mode vis_cull_mode)39 DRAW4(enum pc_di_primtype prim_type, enum pc_di_src_sel source_select,
40 enum a4xx_index_size index_size, enum pc_di_vis_cull_mode vis_cull_mode)
41 {
42 return CP_DRAW_INDX_OFFSET_0_PRIM_TYPE(prim_type) |
43 CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT(source_select) |
44 CP_DRAW_INDX_OFFSET_0_INDEX_SIZE(index_size) |
45 CP_DRAW_INDX_OFFSET_0_VIS_CULL(vis_cull_mode);
46 }
47
48 static inline void
fd4_draw(struct fd_batch * batch,struct fd_ringbuffer * ring,enum pc_di_primtype primtype,enum pc_di_vis_cull_mode vismode,enum pc_di_src_sel src_sel,uint32_t count,uint32_t instances,enum a4xx_index_size idx_type,uint32_t max_indices,uint32_t idx_offset,struct pipe_resource * idx_buffer)49 fd4_draw(struct fd_batch *batch, struct fd_ringbuffer *ring,
50 enum pc_di_primtype primtype, enum pc_di_vis_cull_mode vismode,
51 enum pc_di_src_sel src_sel, uint32_t count, uint32_t instances,
52 enum a4xx_index_size idx_type, uint32_t max_indices,
53 uint32_t idx_offset, struct pipe_resource *idx_buffer)
54 {
55 /* for debug after a lock up, write a unique counter value
56 * to scratch7 for each draw, to make it easier to match up
57 * register dumps to cmdstream. The combination of IB
58 * (scratch6) and DRAW is enough to "triangulate" the
59 * particular draw that caused lockup.
60 */
61 emit_marker(ring, 7);
62
63 OUT_PKT3(ring, CP_DRAW_INDX_OFFSET, idx_buffer ? 6 : 3);
64 if (vismode == USE_VISIBILITY) {
65 /* leave vis mode blank for now, it will be patched up when
66 * we know if we are binning or not
67 */
68 OUT_RINGP(ring, DRAW4(primtype, src_sel, idx_type, 0),
69 &batch->draw_patches);
70 } else {
71 OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode));
72 }
73 OUT_RING(ring, instances); /* NumInstances */
74 OUT_RING(ring, count); /* NumIndices */
75 if (idx_buffer) {
76 OUT_RING(ring, 0x0); /* XXX */
77 OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0);
78 OUT_RING(ring, max_indices);
79 }
80
81 emit_marker(ring, 7);
82
83 fd_reset_wfi(batch);
84 }
85
86 static inline void
fd4_draw_emit(struct fd_batch * batch,struct fd_ringbuffer * ring,enum pc_di_primtype primtype,enum pc_di_vis_cull_mode vismode,const struct pipe_draw_info * info,const struct pipe_draw_indirect_info * indirect,const struct pipe_draw_start_count_bias * draw,unsigned index_offset)87 fd4_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
88 enum pc_di_primtype primtype, enum pc_di_vis_cull_mode vismode,
89 const struct pipe_draw_info *info,
90 const struct pipe_draw_indirect_info *indirect,
91 const struct pipe_draw_start_count_bias *draw, unsigned index_offset)
92 {
93 struct pipe_resource *idx_buffer = NULL;
94 enum a4xx_index_size idx_type;
95 enum pc_di_src_sel src_sel;
96 uint32_t idx_size, idx_offset;
97
98 if (indirect && indirect->buffer) {
99 struct fd_resource *ind = fd_resource(indirect->buffer);
100
101 emit_marker(ring, 7);
102
103 if (info->index_size) {
104 struct pipe_resource *idx = info->index.resource;
105
106 OUT_PKT3(ring, CP_DRAW_INDX_INDIRECT, 4);
107 OUT_RINGP(ring,
108 DRAW4(primtype, DI_SRC_SEL_DMA,
109 fd4_size2indextype(info->index_size), 0),
110 &batch->draw_patches);
111 OUT_RELOC(ring, fd_resource(idx)->bo, index_offset, 0, 0);
112 OUT_RING(ring, A4XX_CP_DRAW_INDX_INDIRECT_2_INDX_SIZE(idx->width0 -
113 index_offset));
114 OUT_RELOC(ring, ind->bo, indirect->offset, 0, 0);
115 } else {
116 OUT_PKT3(ring, CP_DRAW_INDIRECT, 2);
117 OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_AUTO_INDEX, 0, 0),
118 &batch->draw_patches);
119 OUT_RELOC(ring, ind->bo, indirect->offset, 0, 0);
120 }
121
122 emit_marker(ring, 7);
123 fd_reset_wfi(batch);
124
125 return;
126 }
127
128 if (info->index_size) {
129 assert(!info->has_user_indices);
130
131 idx_buffer = info->index.resource;
132 idx_type = fd4_size2indextype(info->index_size);
133 idx_size = info->index_size * draw->count;
134 idx_offset = index_offset + draw->start * info->index_size;
135 src_sel = DI_SRC_SEL_DMA;
136 } else {
137 idx_buffer = NULL;
138 idx_type = INDEX4_SIZE_32_BIT;
139 idx_size = 0;
140 idx_offset = 0;
141 src_sel = DI_SRC_SEL_AUTO_INDEX;
142 }
143
144 fd4_draw(batch, ring, primtype, vismode, src_sel, draw->count,
145 info->instance_count, idx_type, idx_size, idx_offset, idx_buffer);
146 }
147
148 #endif /* FD4_DRAW_H_ */
149