Lines Matching refs:efr
291 u8 efr; in mxser_enable_must_enchance_mode() local
296 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); in mxser_enable_must_enchance_mode()
297 efr |= MOXA_MUST_EFR_EFRB_ENABLE; in mxser_enable_must_enchance_mode()
299 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); in mxser_enable_must_enchance_mode()
307 u8 efr; in mxser_disable_must_enchance_mode() local
312 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); in mxser_disable_must_enchance_mode()
313 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE; in mxser_disable_must_enchance_mode()
315 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); in mxser_disable_must_enchance_mode()
323 u8 efr; in mxser_set_must_xon1_value() local
328 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); in mxser_set_must_xon1_value()
329 efr &= ~MOXA_MUST_EFR_BANK_MASK; in mxser_set_must_xon1_value()
330 efr |= MOXA_MUST_EFR_BANK0; in mxser_set_must_xon1_value()
332 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); in mxser_set_must_xon1_value()
340 u8 efr; in mxser_set_must_xoff1_value() local
345 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); in mxser_set_must_xoff1_value()
346 efr &= ~MOXA_MUST_EFR_BANK_MASK; in mxser_set_must_xoff1_value()
347 efr |= MOXA_MUST_EFR_BANK0; in mxser_set_must_xoff1_value()
349 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); in mxser_set_must_xoff1_value()
357 u8 efr; in mxser_set_must_fifo_value() local
362 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER); in mxser_set_must_fifo_value()
363 efr &= ~MOXA_MUST_EFR_BANK_MASK; in mxser_set_must_fifo_value()
364 efr |= MOXA_MUST_EFR_BANK1; in mxser_set_must_fifo_value()
366 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER); in mxser_set_must_fifo_value()
376 u8 efr; in mxser_set_must_enum_value() local
381 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); in mxser_set_must_enum_value()
382 efr &= ~MOXA_MUST_EFR_BANK_MASK; in mxser_set_must_enum_value()
383 efr |= MOXA_MUST_EFR_BANK2; in mxser_set_must_enum_value()
385 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); in mxser_set_must_enum_value()
394 u8 efr; in mxser_get_must_hardware_id() local
399 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); in mxser_get_must_hardware_id()
400 efr &= ~MOXA_MUST_EFR_BANK_MASK; in mxser_get_must_hardware_id()
401 efr |= MOXA_MUST_EFR_BANK2; in mxser_get_must_hardware_id()
403 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); in mxser_get_must_hardware_id()
412 u8 efr; in SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL() local
417 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); in SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL()
418 efr &= ~MOXA_MUST_EFR_SF_MASK; in SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL()
420 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); in SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL()
427 u8 efr; in mxser_enable_must_tx_software_flow_control() local
432 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); in mxser_enable_must_tx_software_flow_control()
433 efr &= ~MOXA_MUST_EFR_SF_TX_MASK; in mxser_enable_must_tx_software_flow_control()
434 efr |= MOXA_MUST_EFR_SF_TX1; in mxser_enable_must_tx_software_flow_control()
436 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); in mxser_enable_must_tx_software_flow_control()
443 u8 efr; in mxser_disable_must_tx_software_flow_control() local
448 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); in mxser_disable_must_tx_software_flow_control()
449 efr &= ~MOXA_MUST_EFR_SF_TX_MASK; in mxser_disable_must_tx_software_flow_control()
451 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); in mxser_disable_must_tx_software_flow_control()
458 u8 efr; in mxser_enable_must_rx_software_flow_control() local
463 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); in mxser_enable_must_rx_software_flow_control()
464 efr &= ~MOXA_MUST_EFR_SF_RX_MASK; in mxser_enable_must_rx_software_flow_control()
465 efr |= MOXA_MUST_EFR_SF_RX1; in mxser_enable_must_rx_software_flow_control()
467 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); in mxser_enable_must_rx_software_flow_control()
474 u8 efr; in mxser_disable_must_rx_software_flow_control() local
479 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); in mxser_disable_must_rx_software_flow_control()
480 efr &= ~MOXA_MUST_EFR_SF_RX_MASK; in mxser_disable_must_rx_software_flow_control()
482 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); in mxser_disable_must_rx_software_flow_control()