1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
4 *
5 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
6 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
7 *
8 * This code is loosely based on the 1.8 moxa driver which is based on
9 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
10 * others.
11 *
12 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
13 * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
14 * www.moxa.com.
15 * - Fixed x86_64 cleanness
16 */
17
18 #include <linux/module.h>
19 #include <linux/errno.h>
20 #include <linux/signal.h>
21 #include <linux/sched.h>
22 #include <linux/timer.h>
23 #include <linux/interrupt.h>
24 #include <linux/tty.h>
25 #include <linux/tty_flip.h>
26 #include <linux/serial.h>
27 #include <linux/serial_reg.h>
28 #include <linux/major.h>
29 #include <linux/string.h>
30 #include <linux/fcntl.h>
31 #include <linux/ptrace.h>
32 #include <linux/ioport.h>
33 #include <linux/mm.h>
34 #include <linux/delay.h>
35 #include <linux/pci.h>
36 #include <linux/bitops.h>
37 #include <linux/slab.h>
38 #include <linux/ratelimit.h>
39
40 #include <asm/io.h>
41 #include <asm/irq.h>
42 #include <linux/uaccess.h>
43
44 #include "mxser.h"
45
46 #define MXSER_VERSION "2.0.5" /* 1.14 */
47 #define MXSERMAJOR 174
48
49 #define MXSER_BOARDS 4 /* Max. boards */
50 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
51 #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
52 #define MXSER_ISR_PASS_LIMIT 100
53
54 /*CheckIsMoxaMust return value*/
55 #define MOXA_OTHER_UART 0x00
56 #define MOXA_MUST_MU150_HWID 0x01
57 #define MOXA_MUST_MU860_HWID 0x02
58
59 #define WAKEUP_CHARS 256
60
61 #define UART_MCR_AFE 0x20
62 #define UART_LSR_SPECIAL 0x1E
63
64 #define PCI_DEVICE_ID_POS104UL 0x1044
65 #define PCI_DEVICE_ID_CB108 0x1080
66 #define PCI_DEVICE_ID_CP102UF 0x1023
67 #define PCI_DEVICE_ID_CP112UL 0x1120
68 #define PCI_DEVICE_ID_CB114 0x1142
69 #define PCI_DEVICE_ID_CP114UL 0x1143
70 #define PCI_DEVICE_ID_CB134I 0x1341
71 #define PCI_DEVICE_ID_CP138U 0x1380
72
73
74 #define C168_ASIC_ID 1
75 #define C104_ASIC_ID 2
76 #define C102_ASIC_ID 0xB
77 #define CI132_ASIC_ID 4
78 #define CI134_ASIC_ID 3
79 #define CI104J_ASIC_ID 5
80
81 #define MXSER_HIGHBAUD 1
82 #define MXSER_HAS2 2
83
84 /* This is only for PCI */
85 static const struct {
86 int type;
87 int tx_fifo;
88 int rx_fifo;
89 int xmit_fifo_size;
90 int rx_high_water;
91 int rx_trigger;
92 int rx_low_water;
93 long max_baud;
94 } Gpci_uart_info[] = {
95 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
96 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
97 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
98 };
99 #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
100
101 struct mxser_cardinfo {
102 char *name;
103 unsigned int nports;
104 unsigned int flags;
105 };
106
107 static const struct mxser_cardinfo mxser_cards[] = {
108 /* 0*/ { "C168 series", 8, },
109 { "C104 series", 4, },
110 { "CI-104J series", 4, },
111 { "C168H/PCI series", 8, },
112 { "C104H/PCI series", 4, },
113 /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
114 { "CI-132 series", 4, MXSER_HAS2 },
115 { "CI-134 series", 4, },
116 { "CP-132 series", 2, },
117 { "CP-114 series", 4, },
118 /*10*/ { "CT-114 series", 4, },
119 { "CP-102 series", 2, MXSER_HIGHBAUD },
120 { "CP-104U series", 4, },
121 { "CP-168U series", 8, },
122 { "CP-132U series", 2, },
123 /*15*/ { "CP-134U series", 4, },
124 { "CP-104JU series", 4, },
125 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
126 { "CP-118U series", 8, },
127 { "CP-102UL series", 2, },
128 /*20*/ { "CP-102U series", 2, },
129 { "CP-118EL series", 8, },
130 { "CP-168EL series", 8, },
131 { "CP-104EL series", 4, },
132 { "CB-108 series", 8, },
133 /*25*/ { "CB-114 series", 4, },
134 { "CB-134I series", 4, },
135 { "CP-138U series", 8, },
136 { "POS-104UL series", 4, },
137 { "CP-114UL series", 4, },
138 /*30*/ { "CP-102UF series", 2, },
139 { "CP-112UL series", 2, },
140 };
141
142 /* driver_data correspond to the lines in the structure above
143 see also ISA probe function before you change something */
144 static const struct pci_device_id mxser_pcibrds[] = {
145 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
146 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
147 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
148 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
149 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 },
171 { }
172 };
173 MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
174
175 static unsigned long ioaddr[MXSER_BOARDS];
176 static int ttymajor = MXSERMAJOR;
177
178 /* Variables for insmod */
179
180 MODULE_AUTHOR("Casper Yang");
181 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
182 module_param_hw_array(ioaddr, ulong, ioport, NULL, 0);
183 MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
184 module_param(ttymajor, int, 0);
185 MODULE_LICENSE("GPL");
186
187 struct mxser_log {
188 int tick;
189 unsigned long rxcnt[MXSER_PORTS];
190 unsigned long txcnt[MXSER_PORTS];
191 };
192
193 struct mxser_mon {
194 unsigned long rxcnt;
195 unsigned long txcnt;
196 unsigned long up_rxcnt;
197 unsigned long up_txcnt;
198 int modem_status;
199 unsigned char hold_reason;
200 };
201
202 struct mxser_mon_ext {
203 unsigned long rx_cnt[32];
204 unsigned long tx_cnt[32];
205 unsigned long up_rxcnt[32];
206 unsigned long up_txcnt[32];
207 int modem_status[32];
208
209 long baudrate[32];
210 int databits[32];
211 int stopbits[32];
212 int parity[32];
213 int flowctrl[32];
214 int fifo[32];
215 int iftype[32];
216 };
217
218 struct mxser_board;
219
220 struct mxser_port {
221 struct tty_port port;
222 struct mxser_board *board;
223
224 unsigned long ioaddr;
225 unsigned long opmode_ioaddr;
226 int max_baud;
227
228 int rx_high_water;
229 int rx_trigger; /* Rx fifo trigger level */
230 int rx_low_water;
231 int baud_base; /* max. speed */
232 int type; /* UART type */
233
234 int x_char; /* xon/xoff character */
235 int IER; /* Interrupt Enable Register */
236 int MCR; /* Modem control register */
237
238 unsigned char stop_rx;
239 unsigned char ldisc_stop_rx;
240
241 int custom_divisor;
242 unsigned char err_shadow;
243
244 struct async_icount icount; /* kernel counters for 4 input interrupts */
245 unsigned int timeout;
246
247 int read_status_mask;
248 int ignore_status_mask;
249 unsigned int xmit_fifo_size;
250 int xmit_head;
251 int xmit_tail;
252 int xmit_cnt;
253 int closing;
254
255 struct ktermios normal_termios;
256
257 struct mxser_mon mon_data;
258
259 spinlock_t slock;
260 };
261
262 struct mxser_board {
263 unsigned int idx;
264 int irq;
265 const struct mxser_cardinfo *info;
266 unsigned long vector;
267 unsigned long vector_mask;
268
269 int chip_flag;
270 int uart_type;
271
272 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
273 };
274
275 struct mxser_mstatus {
276 tcflag_t cflag;
277 int cts;
278 int dsr;
279 int ri;
280 int dcd;
281 };
282
283 static struct mxser_board mxser_boards[MXSER_BOARDS];
284 static struct tty_driver *mxvar_sdriver;
285 static struct mxser_log mxvar_log;
286 static int mxser_set_baud_method[MXSER_PORTS + 1];
287
mxser_enable_must_enchance_mode(unsigned long baseio)288 static void mxser_enable_must_enchance_mode(unsigned long baseio)
289 {
290 u8 oldlcr;
291 u8 efr;
292
293 oldlcr = inb(baseio + UART_LCR);
294 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
295
296 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
297 efr |= MOXA_MUST_EFR_EFRB_ENABLE;
298
299 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
300 outb(oldlcr, baseio + UART_LCR);
301 }
302
303 #ifdef CONFIG_PCI
mxser_disable_must_enchance_mode(unsigned long baseio)304 static void mxser_disable_must_enchance_mode(unsigned long baseio)
305 {
306 u8 oldlcr;
307 u8 efr;
308
309 oldlcr = inb(baseio + UART_LCR);
310 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
311
312 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
313 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
314
315 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
316 outb(oldlcr, baseio + UART_LCR);
317 }
318 #endif
319
mxser_set_must_xon1_value(unsigned long baseio,u8 value)320 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
321 {
322 u8 oldlcr;
323 u8 efr;
324
325 oldlcr = inb(baseio + UART_LCR);
326 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
327
328 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
329 efr &= ~MOXA_MUST_EFR_BANK_MASK;
330 efr |= MOXA_MUST_EFR_BANK0;
331
332 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
333 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
334 outb(oldlcr, baseio + UART_LCR);
335 }
336
mxser_set_must_xoff1_value(unsigned long baseio,u8 value)337 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
338 {
339 u8 oldlcr;
340 u8 efr;
341
342 oldlcr = inb(baseio + UART_LCR);
343 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
344
345 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
346 efr &= ~MOXA_MUST_EFR_BANK_MASK;
347 efr |= MOXA_MUST_EFR_BANK0;
348
349 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
350 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
351 outb(oldlcr, baseio + UART_LCR);
352 }
353
mxser_set_must_fifo_value(struct mxser_port * info)354 static void mxser_set_must_fifo_value(struct mxser_port *info)
355 {
356 u8 oldlcr;
357 u8 efr;
358
359 oldlcr = inb(info->ioaddr + UART_LCR);
360 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
361
362 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
363 efr &= ~MOXA_MUST_EFR_BANK_MASK;
364 efr |= MOXA_MUST_EFR_BANK1;
365
366 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
367 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
368 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
369 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
370 outb(oldlcr, info->ioaddr + UART_LCR);
371 }
372
mxser_set_must_enum_value(unsigned long baseio,u8 value)373 static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
374 {
375 u8 oldlcr;
376 u8 efr;
377
378 oldlcr = inb(baseio + UART_LCR);
379 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
380
381 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
382 efr &= ~MOXA_MUST_EFR_BANK_MASK;
383 efr |= MOXA_MUST_EFR_BANK2;
384
385 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
386 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
387 outb(oldlcr, baseio + UART_LCR);
388 }
389
390 #ifdef CONFIG_PCI
mxser_get_must_hardware_id(unsigned long baseio,u8 * pId)391 static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
392 {
393 u8 oldlcr;
394 u8 efr;
395
396 oldlcr = inb(baseio + UART_LCR);
397 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
398
399 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
400 efr &= ~MOXA_MUST_EFR_BANK_MASK;
401 efr |= MOXA_MUST_EFR_BANK2;
402
403 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
404 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
405 outb(oldlcr, baseio + UART_LCR);
406 }
407 #endif
408
SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)409 static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
410 {
411 u8 oldlcr;
412 u8 efr;
413
414 oldlcr = inb(baseio + UART_LCR);
415 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
416
417 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
418 efr &= ~MOXA_MUST_EFR_SF_MASK;
419
420 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
421 outb(oldlcr, baseio + UART_LCR);
422 }
423
mxser_enable_must_tx_software_flow_control(unsigned long baseio)424 static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
425 {
426 u8 oldlcr;
427 u8 efr;
428
429 oldlcr = inb(baseio + UART_LCR);
430 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
431
432 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
433 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
434 efr |= MOXA_MUST_EFR_SF_TX1;
435
436 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
437 outb(oldlcr, baseio + UART_LCR);
438 }
439
mxser_disable_must_tx_software_flow_control(unsigned long baseio)440 static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
441 {
442 u8 oldlcr;
443 u8 efr;
444
445 oldlcr = inb(baseio + UART_LCR);
446 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
447
448 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
449 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
450
451 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
452 outb(oldlcr, baseio + UART_LCR);
453 }
454
mxser_enable_must_rx_software_flow_control(unsigned long baseio)455 static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
456 {
457 u8 oldlcr;
458 u8 efr;
459
460 oldlcr = inb(baseio + UART_LCR);
461 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
462
463 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
464 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
465 efr |= MOXA_MUST_EFR_SF_RX1;
466
467 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
468 outb(oldlcr, baseio + UART_LCR);
469 }
470
mxser_disable_must_rx_software_flow_control(unsigned long baseio)471 static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
472 {
473 u8 oldlcr;
474 u8 efr;
475
476 oldlcr = inb(baseio + UART_LCR);
477 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
478
479 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
480 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
481
482 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
483 outb(oldlcr, baseio + UART_LCR);
484 }
485
486 #ifdef CONFIG_PCI
CheckIsMoxaMust(unsigned long io)487 static int CheckIsMoxaMust(unsigned long io)
488 {
489 u8 oldmcr, hwid;
490 int i;
491
492 outb(0, io + UART_LCR);
493 mxser_disable_must_enchance_mode(io);
494 oldmcr = inb(io + UART_MCR);
495 outb(0, io + UART_MCR);
496 mxser_set_must_xon1_value(io, 0x11);
497 if ((hwid = inb(io + UART_MCR)) != 0) {
498 outb(oldmcr, io + UART_MCR);
499 return MOXA_OTHER_UART;
500 }
501
502 mxser_get_must_hardware_id(io, &hwid);
503 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
504 if (hwid == Gpci_uart_info[i].type)
505 return (int)hwid;
506 }
507 return MOXA_OTHER_UART;
508 }
509 #endif
510
process_txrx_fifo(struct mxser_port * info)511 static void process_txrx_fifo(struct mxser_port *info)
512 {
513 int i;
514
515 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
516 info->rx_trigger = 1;
517 info->rx_high_water = 1;
518 info->rx_low_water = 1;
519 info->xmit_fifo_size = 1;
520 } else
521 for (i = 0; i < UART_INFO_NUM; i++)
522 if (info->board->chip_flag == Gpci_uart_info[i].type) {
523 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
524 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
525 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
526 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
527 break;
528 }
529 }
530
mxser_get_msr(int baseaddr,int mode,int port)531 static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
532 {
533 static unsigned char mxser_msr[MXSER_PORTS + 1];
534 unsigned char status = 0;
535
536 status = inb(baseaddr + UART_MSR);
537
538 mxser_msr[port] &= 0x0F;
539 mxser_msr[port] |= status;
540 status = mxser_msr[port];
541 if (mode)
542 mxser_msr[port] = 0;
543
544 return status;
545 }
546
mxser_carrier_raised(struct tty_port * port)547 static int mxser_carrier_raised(struct tty_port *port)
548 {
549 struct mxser_port *mp = container_of(port, struct mxser_port, port);
550 return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
551 }
552
mxser_dtr_rts(struct tty_port * port,int on)553 static void mxser_dtr_rts(struct tty_port *port, int on)
554 {
555 struct mxser_port *mp = container_of(port, struct mxser_port, port);
556 unsigned long flags;
557
558 spin_lock_irqsave(&mp->slock, flags);
559 if (on)
560 outb(inb(mp->ioaddr + UART_MCR) |
561 UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
562 else
563 outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS),
564 mp->ioaddr + UART_MCR);
565 spin_unlock_irqrestore(&mp->slock, flags);
566 }
567
mxser_set_baud(struct tty_struct * tty,long newspd)568 static int mxser_set_baud(struct tty_struct *tty, long newspd)
569 {
570 struct mxser_port *info = tty->driver_data;
571 unsigned int quot = 0, baud;
572 unsigned char cval;
573 u64 timeout;
574
575 if (!info->ioaddr)
576 return -1;
577
578 if (newspd > info->max_baud)
579 return -1;
580
581 if (newspd == 134) {
582 quot = 2 * info->baud_base / 269;
583 tty_encode_baud_rate(tty, 134, 134);
584 } else if (newspd) {
585 quot = info->baud_base / newspd;
586 if (quot == 0)
587 quot = 1;
588 baud = info->baud_base/quot;
589 tty_encode_baud_rate(tty, baud, baud);
590 } else {
591 quot = 0;
592 }
593
594 /*
595 * worst case (128 * 1000 * 10 * 18432) needs 35 bits, so divide in the
596 * u64 domain
597 */
598 timeout = (u64)info->xmit_fifo_size * HZ * 10 * quot;
599 do_div(timeout, info->baud_base);
600 info->timeout = timeout + HZ / 50; /* Add .02 seconds of slop */
601
602 if (quot) {
603 info->MCR |= UART_MCR_DTR;
604 outb(info->MCR, info->ioaddr + UART_MCR);
605 } else {
606 info->MCR &= ~UART_MCR_DTR;
607 outb(info->MCR, info->ioaddr + UART_MCR);
608 return 0;
609 }
610
611 cval = inb(info->ioaddr + UART_LCR);
612
613 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
614
615 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
616 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
617 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
618
619 #ifdef BOTHER
620 if (C_BAUD(tty) == BOTHER) {
621 quot = info->baud_base % newspd;
622 quot *= 8;
623 if (quot % newspd > newspd / 2) {
624 quot /= newspd;
625 quot++;
626 } else
627 quot /= newspd;
628
629 mxser_set_must_enum_value(info->ioaddr, quot);
630 } else
631 #endif
632 mxser_set_must_enum_value(info->ioaddr, 0);
633
634 return 0;
635 }
636
637 /*
638 * This routine is called to set the UART divisor registers to match
639 * the specified baud rate for a serial port.
640 */
mxser_change_speed(struct tty_struct * tty)641 static void mxser_change_speed(struct tty_struct *tty)
642 {
643 struct mxser_port *info = tty->driver_data;
644 unsigned cflag, cval, fcr;
645 unsigned char status;
646
647 cflag = tty->termios.c_cflag;
648 if (!info->ioaddr)
649 return;
650
651 if (mxser_set_baud_method[tty->index] == 0)
652 mxser_set_baud(tty, tty_get_baud_rate(tty));
653
654 /* byte size and parity */
655 switch (cflag & CSIZE) {
656 case CS5:
657 cval = 0x00;
658 break;
659 case CS6:
660 cval = 0x01;
661 break;
662 case CS7:
663 cval = 0x02;
664 break;
665 case CS8:
666 cval = 0x03;
667 break;
668 default:
669 cval = 0x00;
670 break; /* too keep GCC shut... */
671 }
672 if (cflag & CSTOPB)
673 cval |= 0x04;
674 if (cflag & PARENB)
675 cval |= UART_LCR_PARITY;
676 if (!(cflag & PARODD))
677 cval |= UART_LCR_EPAR;
678 if (cflag & CMSPAR)
679 cval |= UART_LCR_SPAR;
680
681 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
682 if (info->board->chip_flag) {
683 fcr = UART_FCR_ENABLE_FIFO;
684 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
685 mxser_set_must_fifo_value(info);
686 } else
687 fcr = 0;
688 } else {
689 fcr = UART_FCR_ENABLE_FIFO;
690 if (info->board->chip_flag) {
691 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
692 mxser_set_must_fifo_value(info);
693 } else {
694 switch (info->rx_trigger) {
695 case 1:
696 fcr |= UART_FCR_TRIGGER_1;
697 break;
698 case 4:
699 fcr |= UART_FCR_TRIGGER_4;
700 break;
701 case 8:
702 fcr |= UART_FCR_TRIGGER_8;
703 break;
704 default:
705 fcr |= UART_FCR_TRIGGER_14;
706 break;
707 }
708 }
709 }
710
711 /* CTS flow control flag and modem status interrupts */
712 info->IER &= ~UART_IER_MSI;
713 info->MCR &= ~UART_MCR_AFE;
714 tty_port_set_cts_flow(&info->port, cflag & CRTSCTS);
715 if (cflag & CRTSCTS) {
716 info->IER |= UART_IER_MSI;
717 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
718 info->MCR |= UART_MCR_AFE;
719 } else {
720 status = inb(info->ioaddr + UART_MSR);
721 if (tty->hw_stopped) {
722 if (status & UART_MSR_CTS) {
723 tty->hw_stopped = 0;
724 if (info->type != PORT_16550A &&
725 !info->board->chip_flag) {
726 outb(info->IER & ~UART_IER_THRI,
727 info->ioaddr +
728 UART_IER);
729 info->IER |= UART_IER_THRI;
730 outb(info->IER, info->ioaddr +
731 UART_IER);
732 }
733 tty_wakeup(tty);
734 }
735 } else {
736 if (!(status & UART_MSR_CTS)) {
737 tty->hw_stopped = 1;
738 if ((info->type != PORT_16550A) &&
739 (!info->board->chip_flag)) {
740 info->IER &= ~UART_IER_THRI;
741 outb(info->IER, info->ioaddr +
742 UART_IER);
743 }
744 }
745 }
746 }
747 }
748 outb(info->MCR, info->ioaddr + UART_MCR);
749 tty_port_set_check_carrier(&info->port, ~cflag & CLOCAL);
750 if (~cflag & CLOCAL)
751 info->IER |= UART_IER_MSI;
752 outb(info->IER, info->ioaddr + UART_IER);
753
754 /*
755 * Set up parity check flag
756 */
757 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
758 if (I_INPCK(tty))
759 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
760 if (I_BRKINT(tty) || I_PARMRK(tty))
761 info->read_status_mask |= UART_LSR_BI;
762
763 info->ignore_status_mask = 0;
764
765 if (I_IGNBRK(tty)) {
766 info->ignore_status_mask |= UART_LSR_BI;
767 info->read_status_mask |= UART_LSR_BI;
768 /*
769 * If we're ignore parity and break indicators, ignore
770 * overruns too. (For real raw support).
771 */
772 if (I_IGNPAR(tty)) {
773 info->ignore_status_mask |=
774 UART_LSR_OE |
775 UART_LSR_PE |
776 UART_LSR_FE;
777 info->read_status_mask |=
778 UART_LSR_OE |
779 UART_LSR_PE |
780 UART_LSR_FE;
781 }
782 }
783 if (info->board->chip_flag) {
784 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
785 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
786 if (I_IXON(tty)) {
787 mxser_enable_must_rx_software_flow_control(
788 info->ioaddr);
789 } else {
790 mxser_disable_must_rx_software_flow_control(
791 info->ioaddr);
792 }
793 if (I_IXOFF(tty)) {
794 mxser_enable_must_tx_software_flow_control(
795 info->ioaddr);
796 } else {
797 mxser_disable_must_tx_software_flow_control(
798 info->ioaddr);
799 }
800 }
801
802
803 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
804 outb(cval, info->ioaddr + UART_LCR);
805 }
806
mxser_check_modem_status(struct tty_struct * tty,struct mxser_port * port,int status)807 static void mxser_check_modem_status(struct tty_struct *tty,
808 struct mxser_port *port, int status)
809 {
810 /* update input line counters */
811 if (status & UART_MSR_TERI)
812 port->icount.rng++;
813 if (status & UART_MSR_DDSR)
814 port->icount.dsr++;
815 if (status & UART_MSR_DDCD)
816 port->icount.dcd++;
817 if (status & UART_MSR_DCTS)
818 port->icount.cts++;
819 port->mon_data.modem_status = status;
820 wake_up_interruptible(&port->port.delta_msr_wait);
821
822 if (tty_port_check_carrier(&port->port) && (status & UART_MSR_DDCD)) {
823 if (status & UART_MSR_DCD)
824 wake_up_interruptible(&port->port.open_wait);
825 }
826
827 if (tty_port_cts_enabled(&port->port)) {
828 if (tty->hw_stopped) {
829 if (status & UART_MSR_CTS) {
830 tty->hw_stopped = 0;
831
832 if ((port->type != PORT_16550A) &&
833 (!port->board->chip_flag)) {
834 outb(port->IER & ~UART_IER_THRI,
835 port->ioaddr + UART_IER);
836 port->IER |= UART_IER_THRI;
837 outb(port->IER, port->ioaddr +
838 UART_IER);
839 }
840 tty_wakeup(tty);
841 }
842 } else {
843 if (!(status & UART_MSR_CTS)) {
844 tty->hw_stopped = 1;
845 if (port->type != PORT_16550A &&
846 !port->board->chip_flag) {
847 port->IER &= ~UART_IER_THRI;
848 outb(port->IER, port->ioaddr +
849 UART_IER);
850 }
851 }
852 }
853 }
854 }
855
mxser_activate(struct tty_port * port,struct tty_struct * tty)856 static int mxser_activate(struct tty_port *port, struct tty_struct *tty)
857 {
858 struct mxser_port *info = container_of(port, struct mxser_port, port);
859 unsigned long page;
860 unsigned long flags;
861 int ret;
862
863 page = __get_free_page(GFP_KERNEL);
864 if (!page)
865 return -ENOMEM;
866
867 spin_lock_irqsave(&info->slock, flags);
868
869 if (!info->ioaddr || !info->type) {
870 set_bit(TTY_IO_ERROR, &tty->flags);
871 spin_unlock_irqrestore(&info->slock, flags);
872 ret = 0;
873 goto err_free_xmit;
874 }
875 info->port.xmit_buf = (unsigned char *) page;
876
877 /*
878 * Clear the FIFO buffers and disable them
879 * (they will be reenabled in mxser_change_speed())
880 */
881 if (info->board->chip_flag)
882 outb((UART_FCR_CLEAR_RCVR |
883 UART_FCR_CLEAR_XMIT |
884 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
885 else
886 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
887 info->ioaddr + UART_FCR);
888
889 /*
890 * At this point there's no way the LSR could still be 0xFF;
891 * if it is, then bail out, because there's likely no UART
892 * here.
893 */
894 if (inb(info->ioaddr + UART_LSR) == 0xff) {
895 spin_unlock_irqrestore(&info->slock, flags);
896 if (capable(CAP_SYS_ADMIN)) {
897 set_bit(TTY_IO_ERROR, &tty->flags);
898 return 0;
899 }
900
901 ret = -ENODEV;
902 goto err_free_xmit;
903 }
904
905 /*
906 * Clear the interrupt registers.
907 */
908 (void) inb(info->ioaddr + UART_LSR);
909 (void) inb(info->ioaddr + UART_RX);
910 (void) inb(info->ioaddr + UART_IIR);
911 (void) inb(info->ioaddr + UART_MSR);
912
913 /*
914 * Now, initialize the UART
915 */
916 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
917 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
918 outb(info->MCR, info->ioaddr + UART_MCR);
919
920 /*
921 * Finally, enable interrupts
922 */
923 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
924
925 if (info->board->chip_flag)
926 info->IER |= MOXA_MUST_IER_EGDAI;
927 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
928
929 /*
930 * And clear the interrupt registers again for luck.
931 */
932 (void) inb(info->ioaddr + UART_LSR);
933 (void) inb(info->ioaddr + UART_RX);
934 (void) inb(info->ioaddr + UART_IIR);
935 (void) inb(info->ioaddr + UART_MSR);
936
937 clear_bit(TTY_IO_ERROR, &tty->flags);
938 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
939
940 /*
941 * and set the speed of the serial port
942 */
943 mxser_change_speed(tty);
944 spin_unlock_irqrestore(&info->slock, flags);
945
946 return 0;
947 err_free_xmit:
948 free_page(page);
949 info->port.xmit_buf = NULL;
950 return ret;
951 }
952
953 /*
954 * This routine will shutdown a serial port
955 */
mxser_shutdown_port(struct tty_port * port)956 static void mxser_shutdown_port(struct tty_port *port)
957 {
958 struct mxser_port *info = container_of(port, struct mxser_port, port);
959 unsigned long flags;
960
961 spin_lock_irqsave(&info->slock, flags);
962
963 /*
964 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
965 * here so the queue might never be waken up
966 */
967 wake_up_interruptible(&info->port.delta_msr_wait);
968
969 /*
970 * Free the xmit buffer, if necessary
971 */
972 if (info->port.xmit_buf) {
973 free_page((unsigned long) info->port.xmit_buf);
974 info->port.xmit_buf = NULL;
975 }
976
977 info->IER = 0;
978 outb(0x00, info->ioaddr + UART_IER);
979
980 /* clear Rx/Tx FIFO's */
981 if (info->board->chip_flag)
982 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
983 MOXA_MUST_FCR_GDA_MODE_ENABLE,
984 info->ioaddr + UART_FCR);
985 else
986 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
987 info->ioaddr + UART_FCR);
988
989 /* read data port to reset things */
990 (void) inb(info->ioaddr + UART_RX);
991
992
993 if (info->board->chip_flag)
994 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
995
996 spin_unlock_irqrestore(&info->slock, flags);
997 }
998
999 /*
1000 * This routine is called whenever a serial port is opened. It
1001 * enables interrupts for a serial port, linking in its async structure into
1002 * the IRQ chain. It also performs the serial-specific
1003 * initialization for the tty structure.
1004 */
mxser_open(struct tty_struct * tty,struct file * filp)1005 static int mxser_open(struct tty_struct *tty, struct file *filp)
1006 {
1007 struct mxser_port *info;
1008 int line;
1009
1010 line = tty->index;
1011 if (line == MXSER_PORTS)
1012 return 0;
1013 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1014 if (!info->ioaddr)
1015 return -ENODEV;
1016
1017 tty->driver_data = info;
1018 return tty_port_open(&info->port, tty, filp);
1019 }
1020
mxser_flush_buffer(struct tty_struct * tty)1021 static void mxser_flush_buffer(struct tty_struct *tty)
1022 {
1023 struct mxser_port *info = tty->driver_data;
1024 char fcr;
1025 unsigned long flags;
1026
1027
1028 spin_lock_irqsave(&info->slock, flags);
1029 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1030
1031 fcr = inb(info->ioaddr + UART_FCR);
1032 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1033 info->ioaddr + UART_FCR);
1034 outb(fcr, info->ioaddr + UART_FCR);
1035
1036 spin_unlock_irqrestore(&info->slock, flags);
1037
1038 tty_wakeup(tty);
1039 }
1040
1041
mxser_close_port(struct tty_port * port)1042 static void mxser_close_port(struct tty_port *port)
1043 {
1044 struct mxser_port *info = container_of(port, struct mxser_port, port);
1045 unsigned long timeout;
1046 /*
1047 * At this point we stop accepting input. To do this, we
1048 * disable the receive line status interrupts, and tell the
1049 * interrupt driver to stop checking the data ready bit in the
1050 * line status register.
1051 */
1052 info->IER &= ~UART_IER_RLSI;
1053 if (info->board->chip_flag)
1054 info->IER &= ~MOXA_MUST_RECV_ISR;
1055
1056 outb(info->IER, info->ioaddr + UART_IER);
1057 /*
1058 * Before we drop DTR, make sure the UART transmitter
1059 * has completely drained; this is especially
1060 * important if there is a transmit FIFO!
1061 */
1062 timeout = jiffies + HZ;
1063 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
1064 schedule_timeout_interruptible(5);
1065 if (time_after(jiffies, timeout))
1066 break;
1067 }
1068 }
1069
1070 /*
1071 * This routine is called when the serial port gets closed. First, we
1072 * wait for the last remaining data to be sent. Then, we unlink its
1073 * async structure from the interrupt chain if necessary, and we free
1074 * that IRQ if nothing is left in the chain.
1075 */
mxser_close(struct tty_struct * tty,struct file * filp)1076 static void mxser_close(struct tty_struct *tty, struct file *filp)
1077 {
1078 struct mxser_port *info = tty->driver_data;
1079 struct tty_port *port = &info->port;
1080
1081 if (tty->index == MXSER_PORTS || info == NULL)
1082 return;
1083 if (tty_port_close_start(port, tty, filp) == 0)
1084 return;
1085 info->closing = 1;
1086 mutex_lock(&port->mutex);
1087 mxser_close_port(port);
1088 mxser_flush_buffer(tty);
1089 if (tty_port_initialized(port) && C_HUPCL(tty))
1090 tty_port_lower_dtr_rts(port);
1091 mxser_shutdown_port(port);
1092 tty_port_set_initialized(port, 0);
1093 mutex_unlock(&port->mutex);
1094 info->closing = 0;
1095 /* Right now the tty_port set is done outside of the close_end helper
1096 as we don't yet have everyone using refcounts */
1097 tty_port_close_end(port, tty);
1098 tty_port_tty_set(port, NULL);
1099 }
1100
mxser_write(struct tty_struct * tty,const unsigned char * buf,int count)1101 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1102 {
1103 int c, total = 0;
1104 struct mxser_port *info = tty->driver_data;
1105 unsigned long flags;
1106
1107 if (!info->port.xmit_buf)
1108 return 0;
1109
1110 while (1) {
1111 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1112 SERIAL_XMIT_SIZE - info->xmit_head));
1113 if (c <= 0)
1114 break;
1115
1116 memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
1117 spin_lock_irqsave(&info->slock, flags);
1118 info->xmit_head = (info->xmit_head + c) &
1119 (SERIAL_XMIT_SIZE - 1);
1120 info->xmit_cnt += c;
1121 spin_unlock_irqrestore(&info->slock, flags);
1122
1123 buf += c;
1124 count -= c;
1125 total += c;
1126 }
1127
1128 if (info->xmit_cnt && !tty->stopped) {
1129 if (!tty->hw_stopped ||
1130 (info->type == PORT_16550A) ||
1131 (info->board->chip_flag)) {
1132 spin_lock_irqsave(&info->slock, flags);
1133 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1134 UART_IER);
1135 info->IER |= UART_IER_THRI;
1136 outb(info->IER, info->ioaddr + UART_IER);
1137 spin_unlock_irqrestore(&info->slock, flags);
1138 }
1139 }
1140 return total;
1141 }
1142
mxser_put_char(struct tty_struct * tty,unsigned char ch)1143 static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
1144 {
1145 struct mxser_port *info = tty->driver_data;
1146 unsigned long flags;
1147
1148 if (!info->port.xmit_buf)
1149 return 0;
1150
1151 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1152 return 0;
1153
1154 spin_lock_irqsave(&info->slock, flags);
1155 info->port.xmit_buf[info->xmit_head++] = ch;
1156 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1157 info->xmit_cnt++;
1158 spin_unlock_irqrestore(&info->slock, flags);
1159 if (!tty->stopped) {
1160 if (!tty->hw_stopped ||
1161 (info->type == PORT_16550A) ||
1162 info->board->chip_flag) {
1163 spin_lock_irqsave(&info->slock, flags);
1164 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1165 info->IER |= UART_IER_THRI;
1166 outb(info->IER, info->ioaddr + UART_IER);
1167 spin_unlock_irqrestore(&info->slock, flags);
1168 }
1169 }
1170 return 1;
1171 }
1172
1173
mxser_flush_chars(struct tty_struct * tty)1174 static void mxser_flush_chars(struct tty_struct *tty)
1175 {
1176 struct mxser_port *info = tty->driver_data;
1177 unsigned long flags;
1178
1179 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
1180 (tty->hw_stopped && info->type != PORT_16550A &&
1181 !info->board->chip_flag))
1182 return;
1183
1184 spin_lock_irqsave(&info->slock, flags);
1185
1186 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1187 info->IER |= UART_IER_THRI;
1188 outb(info->IER, info->ioaddr + UART_IER);
1189
1190 spin_unlock_irqrestore(&info->slock, flags);
1191 }
1192
mxser_write_room(struct tty_struct * tty)1193 static int mxser_write_room(struct tty_struct *tty)
1194 {
1195 struct mxser_port *info = tty->driver_data;
1196 int ret;
1197
1198 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1199 return ret < 0 ? 0 : ret;
1200 }
1201
mxser_chars_in_buffer(struct tty_struct * tty)1202 static int mxser_chars_in_buffer(struct tty_struct *tty)
1203 {
1204 struct mxser_port *info = tty->driver_data;
1205 return info->xmit_cnt;
1206 }
1207
1208 /*
1209 * ------------------------------------------------------------
1210 * friends of mxser_ioctl()
1211 * ------------------------------------------------------------
1212 */
mxser_get_serial_info(struct tty_struct * tty,struct serial_struct * ss)1213 static int mxser_get_serial_info(struct tty_struct *tty,
1214 struct serial_struct *ss)
1215 {
1216 struct mxser_port *info = tty->driver_data;
1217 struct tty_port *port = &info->port;
1218
1219 if (tty->index == MXSER_PORTS)
1220 return -ENOTTY;
1221
1222 mutex_lock(&port->mutex);
1223 ss->type = info->type,
1224 ss->line = tty->index,
1225 ss->port = info->ioaddr,
1226 ss->irq = info->board->irq,
1227 ss->flags = info->port.flags,
1228 ss->baud_base = info->baud_base,
1229 ss->close_delay = info->port.close_delay,
1230 ss->closing_wait = info->port.closing_wait,
1231 ss->custom_divisor = info->custom_divisor,
1232 mutex_unlock(&port->mutex);
1233 return 0;
1234 }
1235
mxser_set_serial_info(struct tty_struct * tty,struct serial_struct * ss)1236 static int mxser_set_serial_info(struct tty_struct *tty,
1237 struct serial_struct *ss)
1238 {
1239 struct mxser_port *info = tty->driver_data;
1240 struct tty_port *port = &info->port;
1241 speed_t baud;
1242 unsigned long sl_flags;
1243 unsigned int flags;
1244 int retval = 0;
1245
1246 if (tty->index == MXSER_PORTS)
1247 return -ENOTTY;
1248 if (tty_io_error(tty))
1249 return -EIO;
1250
1251 mutex_lock(&port->mutex);
1252 if (!info->ioaddr) {
1253 mutex_unlock(&port->mutex);
1254 return -ENODEV;
1255 }
1256
1257 if (ss->irq != info->board->irq ||
1258 ss->port != info->ioaddr) {
1259 mutex_unlock(&port->mutex);
1260 return -EINVAL;
1261 }
1262
1263 flags = port->flags & ASYNC_SPD_MASK;
1264
1265 if (!capable(CAP_SYS_ADMIN)) {
1266 if ((ss->baud_base != info->baud_base) ||
1267 (ss->close_delay != info->port.close_delay) ||
1268 ((ss->flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK))) {
1269 mutex_unlock(&port->mutex);
1270 return -EPERM;
1271 }
1272 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
1273 (ss->flags & ASYNC_USR_MASK));
1274 } else {
1275 /*
1276 * OK, past this point, all the error checking has been done.
1277 * At this point, we start making changes.....
1278 */
1279 port->flags = ((port->flags & ~ASYNC_FLAGS) |
1280 (ss->flags & ASYNC_FLAGS));
1281 port->close_delay = ss->close_delay * HZ / 100;
1282 port->closing_wait = ss->closing_wait * HZ / 100;
1283 port->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
1284 if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
1285 (ss->baud_base != info->baud_base ||
1286 ss->custom_divisor !=
1287 info->custom_divisor)) {
1288 if (ss->custom_divisor == 0) {
1289 mutex_unlock(&port->mutex);
1290 return -EINVAL;
1291 }
1292 baud = ss->baud_base / ss->custom_divisor;
1293 tty_encode_baud_rate(tty, baud, baud);
1294 }
1295 }
1296
1297 info->type = ss->type;
1298
1299 process_txrx_fifo(info);
1300
1301 if (tty_port_initialized(port)) {
1302 if (flags != (port->flags & ASYNC_SPD_MASK)) {
1303 spin_lock_irqsave(&info->slock, sl_flags);
1304 mxser_change_speed(tty);
1305 spin_unlock_irqrestore(&info->slock, sl_flags);
1306 }
1307 } else {
1308 retval = mxser_activate(port, tty);
1309 if (retval == 0)
1310 tty_port_set_initialized(port, 1);
1311 }
1312 mutex_unlock(&port->mutex);
1313 return retval;
1314 }
1315
1316 /*
1317 * mxser_get_lsr_info - get line status register info
1318 *
1319 * Purpose: Let user call ioctl() to get info when the UART physically
1320 * is emptied. On bus types like RS485, the transmitter must
1321 * release the bus after transmitting. This must be done when
1322 * the transmit shift register is empty, not be done when the
1323 * transmit holding register is empty. This functionality
1324 * allows an RS485 driver to be written in user space.
1325 */
mxser_get_lsr_info(struct mxser_port * info,unsigned int __user * value)1326 static int mxser_get_lsr_info(struct mxser_port *info,
1327 unsigned int __user *value)
1328 {
1329 unsigned char status;
1330 unsigned int result;
1331 unsigned long flags;
1332
1333 spin_lock_irqsave(&info->slock, flags);
1334 status = inb(info->ioaddr + UART_LSR);
1335 spin_unlock_irqrestore(&info->slock, flags);
1336 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1337 return put_user(result, value);
1338 }
1339
mxser_tiocmget(struct tty_struct * tty)1340 static int mxser_tiocmget(struct tty_struct *tty)
1341 {
1342 struct mxser_port *info = tty->driver_data;
1343 unsigned char control, status;
1344 unsigned long flags;
1345
1346
1347 if (tty->index == MXSER_PORTS)
1348 return -ENOIOCTLCMD;
1349 if (tty_io_error(tty))
1350 return -EIO;
1351
1352 control = info->MCR;
1353
1354 spin_lock_irqsave(&info->slock, flags);
1355 status = inb(info->ioaddr + UART_MSR);
1356 if (status & UART_MSR_ANY_DELTA)
1357 mxser_check_modem_status(tty, info, status);
1358 spin_unlock_irqrestore(&info->slock, flags);
1359 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1360 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1361 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1362 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1363 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1364 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1365 }
1366
mxser_tiocmset(struct tty_struct * tty,unsigned int set,unsigned int clear)1367 static int mxser_tiocmset(struct tty_struct *tty,
1368 unsigned int set, unsigned int clear)
1369 {
1370 struct mxser_port *info = tty->driver_data;
1371 unsigned long flags;
1372
1373
1374 if (tty->index == MXSER_PORTS)
1375 return -ENOIOCTLCMD;
1376 if (tty_io_error(tty))
1377 return -EIO;
1378
1379 spin_lock_irqsave(&info->slock, flags);
1380
1381 if (set & TIOCM_RTS)
1382 info->MCR |= UART_MCR_RTS;
1383 if (set & TIOCM_DTR)
1384 info->MCR |= UART_MCR_DTR;
1385
1386 if (clear & TIOCM_RTS)
1387 info->MCR &= ~UART_MCR_RTS;
1388 if (clear & TIOCM_DTR)
1389 info->MCR &= ~UART_MCR_DTR;
1390
1391 outb(info->MCR, info->ioaddr + UART_MCR);
1392 spin_unlock_irqrestore(&info->slock, flags);
1393 return 0;
1394 }
1395
mxser_program_mode(int port)1396 static int __init mxser_program_mode(int port)
1397 {
1398 int id, i, j, n;
1399
1400 outb(0, port);
1401 outb(0, port);
1402 outb(0, port);
1403 (void)inb(port);
1404 (void)inb(port);
1405 outb(0, port);
1406 (void)inb(port);
1407
1408 id = inb(port + 1) & 0x1F;
1409 if ((id != C168_ASIC_ID) &&
1410 (id != C104_ASIC_ID) &&
1411 (id != C102_ASIC_ID) &&
1412 (id != CI132_ASIC_ID) &&
1413 (id != CI134_ASIC_ID) &&
1414 (id != CI104J_ASIC_ID))
1415 return -1;
1416 for (i = 0, j = 0; i < 4; i++) {
1417 n = inb(port + 2);
1418 if (n == 'M') {
1419 j = 1;
1420 } else if ((j == 1) && (n == 1)) {
1421 j = 2;
1422 break;
1423 } else
1424 j = 0;
1425 }
1426 if (j != 2)
1427 id = -2;
1428 return id;
1429 }
1430
mxser_normal_mode(int port)1431 static void __init mxser_normal_mode(int port)
1432 {
1433 int i, n;
1434
1435 outb(0xA5, port + 1);
1436 outb(0x80, port + 3);
1437 outb(12, port + 0); /* 9600 bps */
1438 outb(0, port + 1);
1439 outb(0x03, port + 3); /* 8 data bits */
1440 outb(0x13, port + 4); /* loop back mode */
1441 for (i = 0; i < 16; i++) {
1442 n = inb(port + 5);
1443 if ((n & 0x61) == 0x60)
1444 break;
1445 if ((n & 1) == 1)
1446 (void)inb(port);
1447 }
1448 outb(0x00, port + 4);
1449 }
1450
1451 #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1452 #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1453 #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1454 #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1455 #define EN_CCMD 0x000 /* Chip's command register */
1456 #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1457 #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1458 #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1459 #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1460 #define EN0_DCFG 0x00E /* Data configuration reg WR */
1461 #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1462 #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1463 #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
mxser_read_register(int port,unsigned short * regs)1464 static int __init mxser_read_register(int port, unsigned short *regs)
1465 {
1466 int i, k, value, id;
1467 unsigned int j;
1468
1469 id = mxser_program_mode(port);
1470 if (id < 0)
1471 return id;
1472 for (i = 0; i < 14; i++) {
1473 k = (i & 0x3F) | 0x180;
1474 for (j = 0x100; j > 0; j >>= 1) {
1475 outb(CHIP_CS, port);
1476 if (k & j) {
1477 outb(CHIP_CS | CHIP_DO, port);
1478 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1479 } else {
1480 outb(CHIP_CS, port);
1481 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1482 }
1483 }
1484 (void)inb(port);
1485 value = 0;
1486 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1487 outb(CHIP_CS, port);
1488 outb(CHIP_CS | CHIP_SK, port);
1489 if (inb(port) & CHIP_DI)
1490 value |= j;
1491 }
1492 regs[i] = value;
1493 outb(0, port);
1494 }
1495 mxser_normal_mode(port);
1496 return id;
1497 }
1498
mxser_ioctl_special(unsigned int cmd,void __user * argp)1499 static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1500 {
1501 struct mxser_port *ip;
1502 struct tty_port *port;
1503 struct tty_struct *tty;
1504 int result, status;
1505 unsigned int i, j;
1506 int ret = 0;
1507
1508 switch (cmd) {
1509 case MOXA_GET_MAJOR:
1510 printk_ratelimited(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
1511 "%x (GET_MAJOR), fix your userspace\n",
1512 current->comm, cmd);
1513 return put_user(ttymajor, (int __user *)argp);
1514
1515 case MOXA_CHKPORTENABLE:
1516 result = 0;
1517 for (i = 0; i < MXSER_BOARDS; i++)
1518 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1519 if (mxser_boards[i].ports[j].ioaddr)
1520 result |= (1 << i);
1521 return put_user(result, (unsigned long __user *)argp);
1522 case MOXA_GETDATACOUNT:
1523 /* The receive side is locked by port->slock but it isn't
1524 clear that an exact snapshot is worth copying here */
1525 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1526 ret = -EFAULT;
1527 return ret;
1528 case MOXA_GETMSTATUS: {
1529 struct mxser_mstatus ms, __user *msu = argp;
1530 for (i = 0; i < MXSER_BOARDS; i++)
1531 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1532 ip = &mxser_boards[i].ports[j];
1533 port = &ip->port;
1534 memset(&ms, 0, sizeof(ms));
1535
1536 mutex_lock(&port->mutex);
1537 if (!ip->ioaddr)
1538 goto copy;
1539
1540 tty = tty_port_tty_get(port);
1541
1542 if (!tty)
1543 ms.cflag = ip->normal_termios.c_cflag;
1544 else
1545 ms.cflag = tty->termios.c_cflag;
1546 tty_kref_put(tty);
1547 spin_lock_irq(&ip->slock);
1548 status = inb(ip->ioaddr + UART_MSR);
1549 spin_unlock_irq(&ip->slock);
1550 if (status & UART_MSR_DCD)
1551 ms.dcd = 1;
1552 if (status & UART_MSR_DSR)
1553 ms.dsr = 1;
1554 if (status & UART_MSR_CTS)
1555 ms.cts = 1;
1556 copy:
1557 mutex_unlock(&port->mutex);
1558 if (copy_to_user(msu, &ms, sizeof(ms)))
1559 return -EFAULT;
1560 msu++;
1561 }
1562 return 0;
1563 }
1564 case MOXA_ASPP_MON_EXT: {
1565 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
1566 unsigned int cflag, iflag, p;
1567 u8 opmode;
1568
1569 me = kzalloc(sizeof(*me), GFP_KERNEL);
1570 if (!me)
1571 return -ENOMEM;
1572
1573 for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
1574 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
1575 if (p >= ARRAY_SIZE(me->rx_cnt)) {
1576 i = MXSER_BOARDS;
1577 break;
1578 }
1579 ip = &mxser_boards[i].ports[j];
1580 port = &ip->port;
1581
1582 mutex_lock(&port->mutex);
1583 if (!ip->ioaddr) {
1584 mutex_unlock(&port->mutex);
1585 continue;
1586 }
1587
1588 spin_lock_irq(&ip->slock);
1589 status = mxser_get_msr(ip->ioaddr, 0, p);
1590
1591 if (status & UART_MSR_TERI)
1592 ip->icount.rng++;
1593 if (status & UART_MSR_DDSR)
1594 ip->icount.dsr++;
1595 if (status & UART_MSR_DDCD)
1596 ip->icount.dcd++;
1597 if (status & UART_MSR_DCTS)
1598 ip->icount.cts++;
1599
1600 ip->mon_data.modem_status = status;
1601 me->rx_cnt[p] = ip->mon_data.rxcnt;
1602 me->tx_cnt[p] = ip->mon_data.txcnt;
1603 me->up_rxcnt[p] = ip->mon_data.up_rxcnt;
1604 me->up_txcnt[p] = ip->mon_data.up_txcnt;
1605 me->modem_status[p] =
1606 ip->mon_data.modem_status;
1607 spin_unlock_irq(&ip->slock);
1608
1609 tty = tty_port_tty_get(&ip->port);
1610
1611 if (!tty) {
1612 cflag = ip->normal_termios.c_cflag;
1613 iflag = ip->normal_termios.c_iflag;
1614 me->baudrate[p] = tty_termios_baud_rate(&ip->normal_termios);
1615 } else {
1616 cflag = tty->termios.c_cflag;
1617 iflag = tty->termios.c_iflag;
1618 me->baudrate[p] = tty_get_baud_rate(tty);
1619 }
1620 tty_kref_put(tty);
1621
1622 me->databits[p] = cflag & CSIZE;
1623 me->stopbits[p] = cflag & CSTOPB;
1624 me->parity[p] = cflag & (PARENB | PARODD |
1625 CMSPAR);
1626
1627 if (cflag & CRTSCTS)
1628 me->flowctrl[p] |= 0x03;
1629
1630 if (iflag & (IXON | IXOFF))
1631 me->flowctrl[p] |= 0x0C;
1632
1633 if (ip->type == PORT_16550A)
1634 me->fifo[p] = 1;
1635
1636 if (ip->board->chip_flag == MOXA_MUST_MU860_HWID) {
1637 opmode = inb(ip->opmode_ioaddr)>>((p % 4) * 2);
1638 opmode &= OP_MODE_MASK;
1639 } else {
1640 opmode = RS232_MODE;
1641 }
1642 me->iftype[p] = opmode;
1643 mutex_unlock(&port->mutex);
1644 }
1645 }
1646 if (copy_to_user(argp, me, sizeof(*me)))
1647 ret = -EFAULT;
1648 kfree(me);
1649 return ret;
1650 }
1651 default:
1652 return -ENOIOCTLCMD;
1653 }
1654 return 0;
1655 }
1656
mxser_cflags_changed(struct mxser_port * info,unsigned long arg,struct async_icount * cprev)1657 static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1658 struct async_icount *cprev)
1659 {
1660 struct async_icount cnow;
1661 unsigned long flags;
1662 int ret;
1663
1664 spin_lock_irqsave(&info->slock, flags);
1665 cnow = info->icount; /* atomic copy */
1666 spin_unlock_irqrestore(&info->slock, flags);
1667
1668 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1669 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1670 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1671 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1672
1673 *cprev = cnow;
1674
1675 return ret;
1676 }
1677
mxser_ioctl(struct tty_struct * tty,unsigned int cmd,unsigned long arg)1678 static int mxser_ioctl(struct tty_struct *tty,
1679 unsigned int cmd, unsigned long arg)
1680 {
1681 struct mxser_port *info = tty->driver_data;
1682 struct async_icount cnow;
1683 unsigned long flags;
1684 void __user *argp = (void __user *)arg;
1685
1686 if (tty->index == MXSER_PORTS)
1687 return mxser_ioctl_special(cmd, argp);
1688
1689 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1690 int p;
1691 unsigned long opmode;
1692 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1693 int shiftbit;
1694 unsigned char val, mask;
1695
1696 if (info->board->chip_flag != MOXA_MUST_MU860_HWID)
1697 return -EFAULT;
1698
1699 p = tty->index % 4;
1700 if (cmd == MOXA_SET_OP_MODE) {
1701 if (get_user(opmode, (int __user *) argp))
1702 return -EFAULT;
1703 if (opmode != RS232_MODE &&
1704 opmode != RS485_2WIRE_MODE &&
1705 opmode != RS422_MODE &&
1706 opmode != RS485_4WIRE_MODE)
1707 return -EFAULT;
1708 mask = ModeMask[p];
1709 shiftbit = p * 2;
1710 spin_lock_irq(&info->slock);
1711 val = inb(info->opmode_ioaddr);
1712 val &= mask;
1713 val |= (opmode << shiftbit);
1714 outb(val, info->opmode_ioaddr);
1715 spin_unlock_irq(&info->slock);
1716 } else {
1717 shiftbit = p * 2;
1718 spin_lock_irq(&info->slock);
1719 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1720 spin_unlock_irq(&info->slock);
1721 opmode &= OP_MODE_MASK;
1722 if (put_user(opmode, (int __user *)argp))
1723 return -EFAULT;
1724 }
1725 return 0;
1726 }
1727
1728 if (cmd != TIOCMIWAIT && tty_io_error(tty))
1729 return -EIO;
1730
1731 switch (cmd) {
1732 case TIOCSERGETLSR: /* Get line status register */
1733 return mxser_get_lsr_info(info, argp);
1734 /*
1735 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1736 * - mask passed in arg for lines of interest
1737 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1738 * Caller should use TIOCGICOUNT to see which one it was
1739 */
1740 case TIOCMIWAIT:
1741 spin_lock_irqsave(&info->slock, flags);
1742 cnow = info->icount; /* note the counters on entry */
1743 spin_unlock_irqrestore(&info->slock, flags);
1744
1745 return wait_event_interruptible(info->port.delta_msr_wait,
1746 mxser_cflags_changed(info, arg, &cnow));
1747 case MOXA_HighSpeedOn:
1748 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1749 case MOXA_SDS_RSTICOUNTER:
1750 spin_lock_irq(&info->slock);
1751 info->mon_data.rxcnt = 0;
1752 info->mon_data.txcnt = 0;
1753 spin_unlock_irq(&info->slock);
1754 return 0;
1755
1756 case MOXA_ASPP_OQUEUE:{
1757 int len, lsr;
1758
1759 len = mxser_chars_in_buffer(tty);
1760 spin_lock_irq(&info->slock);
1761 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE;
1762 spin_unlock_irq(&info->slock);
1763 len += (lsr ? 0 : 1);
1764
1765 return put_user(len, (int __user *)argp);
1766 }
1767 case MOXA_ASPP_MON: {
1768 int mcr, status;
1769
1770 spin_lock_irq(&info->slock);
1771 status = mxser_get_msr(info->ioaddr, 1, tty->index);
1772 mxser_check_modem_status(tty, info, status);
1773
1774 mcr = inb(info->ioaddr + UART_MCR);
1775 spin_unlock_irq(&info->slock);
1776
1777 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1778 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1779 else
1780 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1781
1782 if (mcr & MOXA_MUST_MCR_TX_XON)
1783 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1784 else
1785 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1786
1787 if (tty->hw_stopped)
1788 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1789 else
1790 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1791
1792 if (copy_to_user(argp, &info->mon_data,
1793 sizeof(struct mxser_mon)))
1794 return -EFAULT;
1795
1796 return 0;
1797 }
1798 case MOXA_ASPP_LSTATUS: {
1799 if (put_user(info->err_shadow, (unsigned char __user *)argp))
1800 return -EFAULT;
1801
1802 info->err_shadow = 0;
1803 return 0;
1804 }
1805 case MOXA_SET_BAUD_METHOD: {
1806 int method;
1807
1808 if (get_user(method, (int __user *)argp))
1809 return -EFAULT;
1810 mxser_set_baud_method[tty->index] = method;
1811 return put_user(method, (int __user *)argp);
1812 }
1813 default:
1814 return -ENOIOCTLCMD;
1815 }
1816 return 0;
1817 }
1818
1819 /*
1820 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1821 * Return: write counters to the user passed counter struct
1822 * NB: both 1->0 and 0->1 transitions are counted except for
1823 * RI where only 0->1 is counted.
1824 */
1825
mxser_get_icount(struct tty_struct * tty,struct serial_icounter_struct * icount)1826 static int mxser_get_icount(struct tty_struct *tty,
1827 struct serial_icounter_struct *icount)
1828
1829 {
1830 struct mxser_port *info = tty->driver_data;
1831 struct async_icount cnow;
1832 unsigned long flags;
1833
1834 spin_lock_irqsave(&info->slock, flags);
1835 cnow = info->icount;
1836 spin_unlock_irqrestore(&info->slock, flags);
1837
1838 icount->frame = cnow.frame;
1839 icount->brk = cnow.brk;
1840 icount->overrun = cnow.overrun;
1841 icount->buf_overrun = cnow.buf_overrun;
1842 icount->parity = cnow.parity;
1843 icount->rx = cnow.rx;
1844 icount->tx = cnow.tx;
1845 icount->cts = cnow.cts;
1846 icount->dsr = cnow.dsr;
1847 icount->rng = cnow.rng;
1848 icount->dcd = cnow.dcd;
1849 return 0;
1850 }
1851
mxser_stoprx(struct tty_struct * tty)1852 static void mxser_stoprx(struct tty_struct *tty)
1853 {
1854 struct mxser_port *info = tty->driver_data;
1855
1856 info->ldisc_stop_rx = 1;
1857 if (I_IXOFF(tty)) {
1858 if (info->board->chip_flag) {
1859 info->IER &= ~MOXA_MUST_RECV_ISR;
1860 outb(info->IER, info->ioaddr + UART_IER);
1861 } else {
1862 info->x_char = STOP_CHAR(tty);
1863 outb(0, info->ioaddr + UART_IER);
1864 info->IER |= UART_IER_THRI;
1865 outb(info->IER, info->ioaddr + UART_IER);
1866 }
1867 }
1868
1869 if (C_CRTSCTS(tty)) {
1870 info->MCR &= ~UART_MCR_RTS;
1871 outb(info->MCR, info->ioaddr + UART_MCR);
1872 }
1873 }
1874
1875 /*
1876 * This routine is called by the upper-layer tty layer to signal that
1877 * incoming characters should be throttled.
1878 */
mxser_throttle(struct tty_struct * tty)1879 static void mxser_throttle(struct tty_struct *tty)
1880 {
1881 mxser_stoprx(tty);
1882 }
1883
mxser_unthrottle(struct tty_struct * tty)1884 static void mxser_unthrottle(struct tty_struct *tty)
1885 {
1886 struct mxser_port *info = tty->driver_data;
1887
1888 /* startrx */
1889 info->ldisc_stop_rx = 0;
1890 if (I_IXOFF(tty)) {
1891 if (info->x_char)
1892 info->x_char = 0;
1893 else {
1894 if (info->board->chip_flag) {
1895 info->IER |= MOXA_MUST_RECV_ISR;
1896 outb(info->IER, info->ioaddr + UART_IER);
1897 } else {
1898 info->x_char = START_CHAR(tty);
1899 outb(0, info->ioaddr + UART_IER);
1900 info->IER |= UART_IER_THRI;
1901 outb(info->IER, info->ioaddr + UART_IER);
1902 }
1903 }
1904 }
1905
1906 if (C_CRTSCTS(tty)) {
1907 info->MCR |= UART_MCR_RTS;
1908 outb(info->MCR, info->ioaddr + UART_MCR);
1909 }
1910 }
1911
1912 /*
1913 * mxser_stop() and mxser_start()
1914 *
1915 * This routines are called before setting or resetting tty->stopped.
1916 * They enable or disable transmitter interrupts, as necessary.
1917 */
mxser_stop(struct tty_struct * tty)1918 static void mxser_stop(struct tty_struct *tty)
1919 {
1920 struct mxser_port *info = tty->driver_data;
1921 unsigned long flags;
1922
1923 spin_lock_irqsave(&info->slock, flags);
1924 if (info->IER & UART_IER_THRI) {
1925 info->IER &= ~UART_IER_THRI;
1926 outb(info->IER, info->ioaddr + UART_IER);
1927 }
1928 spin_unlock_irqrestore(&info->slock, flags);
1929 }
1930
mxser_start(struct tty_struct * tty)1931 static void mxser_start(struct tty_struct *tty)
1932 {
1933 struct mxser_port *info = tty->driver_data;
1934 unsigned long flags;
1935
1936 spin_lock_irqsave(&info->slock, flags);
1937 if (info->xmit_cnt && info->port.xmit_buf) {
1938 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1939 info->IER |= UART_IER_THRI;
1940 outb(info->IER, info->ioaddr + UART_IER);
1941 }
1942 spin_unlock_irqrestore(&info->slock, flags);
1943 }
1944
mxser_set_termios(struct tty_struct * tty,struct ktermios * old_termios)1945 static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1946 {
1947 struct mxser_port *info = tty->driver_data;
1948 unsigned long flags;
1949
1950 spin_lock_irqsave(&info->slock, flags);
1951 mxser_change_speed(tty);
1952 spin_unlock_irqrestore(&info->slock, flags);
1953
1954 if ((old_termios->c_cflag & CRTSCTS) && !C_CRTSCTS(tty)) {
1955 tty->hw_stopped = 0;
1956 mxser_start(tty);
1957 }
1958
1959 /* Handle sw stopped */
1960 if ((old_termios->c_iflag & IXON) && !I_IXON(tty)) {
1961 tty->stopped = 0;
1962
1963 if (info->board->chip_flag) {
1964 spin_lock_irqsave(&info->slock, flags);
1965 mxser_disable_must_rx_software_flow_control(
1966 info->ioaddr);
1967 spin_unlock_irqrestore(&info->slock, flags);
1968 }
1969
1970 mxser_start(tty);
1971 }
1972 }
1973
1974 /*
1975 * mxser_wait_until_sent() --- wait until the transmitter is empty
1976 */
mxser_wait_until_sent(struct tty_struct * tty,int timeout)1977 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1978 {
1979 struct mxser_port *info = tty->driver_data;
1980 unsigned long orig_jiffies, char_time;
1981 unsigned long flags;
1982 int lsr;
1983
1984 if (info->type == PORT_UNKNOWN)
1985 return;
1986
1987 if (info->xmit_fifo_size == 0)
1988 return; /* Just in case.... */
1989
1990 orig_jiffies = jiffies;
1991 /*
1992 * Set the check interval to be 1/5 of the estimated time to
1993 * send a single character, and make it at least 1. The check
1994 * interval should also be less than the timeout.
1995 *
1996 * Note: we have to use pretty tight timings here to satisfy
1997 * the NIST-PCTS.
1998 */
1999 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
2000 char_time = char_time / 5;
2001 if (char_time == 0)
2002 char_time = 1;
2003 if (timeout && timeout < char_time)
2004 char_time = timeout;
2005 /*
2006 * If the transmitter hasn't cleared in twice the approximate
2007 * amount of time to send the entire FIFO, it probably won't
2008 * ever clear. This assumes the UART isn't doing flow
2009 * control, which is currently the case. Hence, if it ever
2010 * takes longer than info->timeout, this is probably due to a
2011 * UART bug of some kind. So, we clamp the timeout parameter at
2012 * 2*info->timeout.
2013 */
2014 if (!timeout || timeout > 2 * info->timeout)
2015 timeout = 2 * info->timeout;
2016
2017 spin_lock_irqsave(&info->slock, flags);
2018 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
2019 spin_unlock_irqrestore(&info->slock, flags);
2020 schedule_timeout_interruptible(char_time);
2021 spin_lock_irqsave(&info->slock, flags);
2022 if (signal_pending(current))
2023 break;
2024 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2025 break;
2026 }
2027 spin_unlock_irqrestore(&info->slock, flags);
2028 set_current_state(TASK_RUNNING);
2029 }
2030
2031 /*
2032 * This routine is called by tty_hangup() when a hangup is signaled.
2033 */
mxser_hangup(struct tty_struct * tty)2034 static void mxser_hangup(struct tty_struct *tty)
2035 {
2036 struct mxser_port *info = tty->driver_data;
2037
2038 mxser_flush_buffer(tty);
2039 tty_port_hangup(&info->port);
2040 }
2041
2042 /*
2043 * mxser_rs_break() --- routine which turns the break handling on or off
2044 */
mxser_rs_break(struct tty_struct * tty,int break_state)2045 static int mxser_rs_break(struct tty_struct *tty, int break_state)
2046 {
2047 struct mxser_port *info = tty->driver_data;
2048 unsigned long flags;
2049
2050 spin_lock_irqsave(&info->slock, flags);
2051 if (break_state == -1)
2052 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2053 info->ioaddr + UART_LCR);
2054 else
2055 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2056 info->ioaddr + UART_LCR);
2057 spin_unlock_irqrestore(&info->slock, flags);
2058 return 0;
2059 }
2060
mxser_receive_chars(struct tty_struct * tty,struct mxser_port * port,int * status)2061 static void mxser_receive_chars(struct tty_struct *tty,
2062 struct mxser_port *port, int *status)
2063 {
2064 unsigned char ch, gdl;
2065 int ignored = 0;
2066 int cnt = 0;
2067 int recv_room;
2068 int max = 256;
2069
2070 recv_room = tty->receive_room;
2071 if (recv_room == 0 && !port->ldisc_stop_rx)
2072 mxser_stoprx(tty);
2073 if (port->board->chip_flag != MOXA_OTHER_UART) {
2074
2075 if (*status & UART_LSR_SPECIAL)
2076 goto intr_old;
2077 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2078 (*status & MOXA_MUST_LSR_RERR))
2079 goto intr_old;
2080 if (*status & MOXA_MUST_LSR_RERR)
2081 goto intr_old;
2082
2083 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2084
2085 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2086 gdl &= MOXA_MUST_GDL_MASK;
2087 if (gdl >= recv_room) {
2088 if (!port->ldisc_stop_rx)
2089 mxser_stoprx(tty);
2090 }
2091 while (gdl--) {
2092 ch = inb(port->ioaddr + UART_RX);
2093 tty_insert_flip_char(&port->port, ch, 0);
2094 cnt++;
2095 }
2096 goto end_intr;
2097 }
2098 intr_old:
2099
2100 do {
2101 if (max-- < 0)
2102 break;
2103
2104 ch = inb(port->ioaddr + UART_RX);
2105 if (port->board->chip_flag && (*status & UART_LSR_OE))
2106 outb(0x23, port->ioaddr + UART_FCR);
2107 *status &= port->read_status_mask;
2108 if (*status & port->ignore_status_mask) {
2109 if (++ignored > 100)
2110 break;
2111 } else {
2112 char flag = 0;
2113 if (*status & UART_LSR_SPECIAL) {
2114 if (*status & UART_LSR_BI) {
2115 flag = TTY_BREAK;
2116 port->icount.brk++;
2117
2118 if (port->port.flags & ASYNC_SAK)
2119 do_SAK(tty);
2120 } else if (*status & UART_LSR_PE) {
2121 flag = TTY_PARITY;
2122 port->icount.parity++;
2123 } else if (*status & UART_LSR_FE) {
2124 flag = TTY_FRAME;
2125 port->icount.frame++;
2126 } else if (*status & UART_LSR_OE) {
2127 flag = TTY_OVERRUN;
2128 port->icount.overrun++;
2129 } else
2130 flag = TTY_BREAK;
2131 }
2132 tty_insert_flip_char(&port->port, ch, flag);
2133 cnt++;
2134 if (cnt >= recv_room) {
2135 if (!port->ldisc_stop_rx)
2136 mxser_stoprx(tty);
2137 break;
2138 }
2139
2140 }
2141
2142 if (port->board->chip_flag)
2143 break;
2144
2145 *status = inb(port->ioaddr + UART_LSR);
2146 } while (*status & UART_LSR_DR);
2147
2148 end_intr:
2149 mxvar_log.rxcnt[tty->index] += cnt;
2150 port->mon_data.rxcnt += cnt;
2151 port->mon_data.up_rxcnt += cnt;
2152
2153 /*
2154 * We are called from an interrupt context with &port->slock
2155 * being held. Drop it temporarily in order to prevent
2156 * recursive locking.
2157 */
2158 spin_unlock(&port->slock);
2159 tty_flip_buffer_push(&port->port);
2160 spin_lock(&port->slock);
2161 }
2162
mxser_transmit_chars(struct tty_struct * tty,struct mxser_port * port)2163 static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
2164 {
2165 int count, cnt;
2166
2167 if (port->x_char) {
2168 outb(port->x_char, port->ioaddr + UART_TX);
2169 port->x_char = 0;
2170 mxvar_log.txcnt[tty->index]++;
2171 port->mon_data.txcnt++;
2172 port->mon_data.up_txcnt++;
2173 port->icount.tx++;
2174 return;
2175 }
2176
2177 if (port->port.xmit_buf == NULL)
2178 return;
2179
2180 if (port->xmit_cnt <= 0 || tty->stopped ||
2181 (tty->hw_stopped &&
2182 (port->type != PORT_16550A) &&
2183 (!port->board->chip_flag))) {
2184 port->IER &= ~UART_IER_THRI;
2185 outb(port->IER, port->ioaddr + UART_IER);
2186 return;
2187 }
2188
2189 cnt = port->xmit_cnt;
2190 count = port->xmit_fifo_size;
2191 do {
2192 outb(port->port.xmit_buf[port->xmit_tail++],
2193 port->ioaddr + UART_TX);
2194 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2195 if (--port->xmit_cnt <= 0)
2196 break;
2197 } while (--count > 0);
2198 mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
2199
2200 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2201 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2202 port->icount.tx += (cnt - port->xmit_cnt);
2203
2204 if (port->xmit_cnt < WAKEUP_CHARS)
2205 tty_wakeup(tty);
2206
2207 if (port->xmit_cnt <= 0) {
2208 port->IER &= ~UART_IER_THRI;
2209 outb(port->IER, port->ioaddr + UART_IER);
2210 }
2211 }
2212
2213 /*
2214 * This is the serial driver's generic interrupt routine
2215 */
mxser_interrupt(int irq,void * dev_id)2216 static irqreturn_t mxser_interrupt(int irq, void *dev_id)
2217 {
2218 int status, iir, i;
2219 struct mxser_board *brd = NULL;
2220 struct mxser_port *port;
2221 int max, irqbits, bits, msr;
2222 unsigned int int_cnt, pass_counter = 0;
2223 int handled = IRQ_NONE;
2224 struct tty_struct *tty;
2225
2226 for (i = 0; i < MXSER_BOARDS; i++)
2227 if (dev_id == &mxser_boards[i]) {
2228 brd = dev_id;
2229 break;
2230 }
2231
2232 if (i == MXSER_BOARDS)
2233 goto irq_stop;
2234 if (brd == NULL)
2235 goto irq_stop;
2236 max = brd->info->nports;
2237 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2238 irqbits = inb(brd->vector) & brd->vector_mask;
2239 if (irqbits == brd->vector_mask)
2240 break;
2241
2242 handled = IRQ_HANDLED;
2243 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2244 if (irqbits == brd->vector_mask)
2245 break;
2246 if (bits & irqbits)
2247 continue;
2248 port = &brd->ports[i];
2249
2250 int_cnt = 0;
2251 spin_lock(&port->slock);
2252 do {
2253 iir = inb(port->ioaddr + UART_IIR);
2254 if (iir & UART_IIR_NO_INT)
2255 break;
2256 iir &= MOXA_MUST_IIR_MASK;
2257 tty = tty_port_tty_get(&port->port);
2258 if (!tty || port->closing ||
2259 !tty_port_initialized(&port->port)) {
2260 status = inb(port->ioaddr + UART_LSR);
2261 outb(0x27, port->ioaddr + UART_FCR);
2262 inb(port->ioaddr + UART_MSR);
2263 tty_kref_put(tty);
2264 break;
2265 }
2266
2267 status = inb(port->ioaddr + UART_LSR);
2268
2269 if (status & UART_LSR_PE)
2270 port->err_shadow |= NPPI_NOTIFY_PARITY;
2271 if (status & UART_LSR_FE)
2272 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2273 if (status & UART_LSR_OE)
2274 port->err_shadow |=
2275 NPPI_NOTIFY_HW_OVERRUN;
2276 if (status & UART_LSR_BI)
2277 port->err_shadow |= NPPI_NOTIFY_BREAK;
2278
2279 if (port->board->chip_flag) {
2280 if (iir == MOXA_MUST_IIR_GDA ||
2281 iir == MOXA_MUST_IIR_RDA ||
2282 iir == MOXA_MUST_IIR_RTO ||
2283 iir == MOXA_MUST_IIR_LSR)
2284 mxser_receive_chars(tty, port,
2285 &status);
2286
2287 } else {
2288 status &= port->read_status_mask;
2289 if (status & UART_LSR_DR)
2290 mxser_receive_chars(tty, port,
2291 &status);
2292 }
2293 msr = inb(port->ioaddr + UART_MSR);
2294 if (msr & UART_MSR_ANY_DELTA)
2295 mxser_check_modem_status(tty, port, msr);
2296
2297 if (port->board->chip_flag) {
2298 if (iir == 0x02 && (status &
2299 UART_LSR_THRE))
2300 mxser_transmit_chars(tty, port);
2301 } else {
2302 if (status & UART_LSR_THRE)
2303 mxser_transmit_chars(tty, port);
2304 }
2305 tty_kref_put(tty);
2306 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2307 spin_unlock(&port->slock);
2308 }
2309 }
2310
2311 irq_stop:
2312 return handled;
2313 }
2314
2315 static const struct tty_operations mxser_ops = {
2316 .open = mxser_open,
2317 .close = mxser_close,
2318 .write = mxser_write,
2319 .put_char = mxser_put_char,
2320 .flush_chars = mxser_flush_chars,
2321 .write_room = mxser_write_room,
2322 .chars_in_buffer = mxser_chars_in_buffer,
2323 .flush_buffer = mxser_flush_buffer,
2324 .ioctl = mxser_ioctl,
2325 .throttle = mxser_throttle,
2326 .unthrottle = mxser_unthrottle,
2327 .set_termios = mxser_set_termios,
2328 .stop = mxser_stop,
2329 .start = mxser_start,
2330 .hangup = mxser_hangup,
2331 .break_ctl = mxser_rs_break,
2332 .wait_until_sent = mxser_wait_until_sent,
2333 .tiocmget = mxser_tiocmget,
2334 .tiocmset = mxser_tiocmset,
2335 .set_serial = mxser_set_serial_info,
2336 .get_serial = mxser_get_serial_info,
2337 .get_icount = mxser_get_icount,
2338 };
2339
2340 static const struct tty_port_operations mxser_port_ops = {
2341 .carrier_raised = mxser_carrier_raised,
2342 .dtr_rts = mxser_dtr_rts,
2343 .activate = mxser_activate,
2344 .shutdown = mxser_shutdown_port,
2345 };
2346
2347 /*
2348 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2349 */
2350
2351 static bool allow_overlapping_vector;
2352 module_param(allow_overlapping_vector, bool, S_IRUGO);
2353 MODULE_PARM_DESC(allow_overlapping_vector, "whether we allow ISA cards to be configured such that vector overlabs IO ports (default=no)");
2354
mxser_overlapping_vector(struct mxser_board * brd)2355 static bool mxser_overlapping_vector(struct mxser_board *brd)
2356 {
2357 return allow_overlapping_vector &&
2358 brd->vector >= brd->ports[0].ioaddr &&
2359 brd->vector < brd->ports[0].ioaddr + 8 * brd->info->nports;
2360 }
2361
mxser_request_vector(struct mxser_board * brd)2362 static int mxser_request_vector(struct mxser_board *brd)
2363 {
2364 if (mxser_overlapping_vector(brd))
2365 return 0;
2366 return request_region(brd->vector, 1, "mxser(vector)") ? 0 : -EIO;
2367 }
2368
mxser_release_vector(struct mxser_board * brd)2369 static void mxser_release_vector(struct mxser_board *brd)
2370 {
2371 if (mxser_overlapping_vector(brd))
2372 return;
2373 release_region(brd->vector, 1);
2374 }
2375
mxser_release_ISA_res(struct mxser_board * brd)2376 static void mxser_release_ISA_res(struct mxser_board *brd)
2377 {
2378 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2379 mxser_release_vector(brd);
2380 }
2381
mxser_initbrd(struct mxser_board * brd)2382 static int mxser_initbrd(struct mxser_board *brd)
2383 {
2384 struct mxser_port *info;
2385 unsigned int i;
2386 int retval;
2387
2388 printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
2389 brd->ports[0].max_baud);
2390
2391 for (i = 0; i < brd->info->nports; i++) {
2392 info = &brd->ports[i];
2393 tty_port_init(&info->port);
2394 info->port.ops = &mxser_port_ops;
2395 info->board = brd;
2396 info->stop_rx = 0;
2397 info->ldisc_stop_rx = 0;
2398
2399 /* Enhance mode enabled here */
2400 if (brd->chip_flag != MOXA_OTHER_UART)
2401 mxser_enable_must_enchance_mode(info->ioaddr);
2402
2403 info->type = brd->uart_type;
2404
2405 process_txrx_fifo(info);
2406
2407 info->custom_divisor = info->baud_base * 16;
2408 info->port.close_delay = 5 * HZ / 10;
2409 info->port.closing_wait = 30 * HZ;
2410 info->normal_termios = mxvar_sdriver->init_termios;
2411 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2412 info->err_shadow = 0;
2413 spin_lock_init(&info->slock);
2414
2415 /* before set INT ISR, disable all int */
2416 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2417 info->ioaddr + UART_IER);
2418 }
2419
2420 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2421 brd);
2422 if (retval) {
2423 for (i = 0; i < brd->info->nports; i++)
2424 tty_port_destroy(&brd->ports[i].port);
2425 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2426 "conflict with another device.\n",
2427 brd->info->name, brd->irq);
2428 }
2429
2430 return retval;
2431 }
2432
mxser_board_remove(struct mxser_board * brd)2433 static void mxser_board_remove(struct mxser_board *brd)
2434 {
2435 unsigned int i;
2436
2437 for (i = 0; i < brd->info->nports; i++) {
2438 tty_unregister_device(mxvar_sdriver, brd->idx + i);
2439 tty_port_destroy(&brd->ports[i].port);
2440 }
2441 free_irq(brd->irq, brd);
2442 }
2443
mxser_get_ISA_conf(int cap,struct mxser_board * brd)2444 static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
2445 {
2446 int id, i, bits, ret;
2447 unsigned short regs[16], irq;
2448 unsigned char scratch, scratch2;
2449
2450 brd->chip_flag = MOXA_OTHER_UART;
2451
2452 id = mxser_read_register(cap, regs);
2453 switch (id) {
2454 case C168_ASIC_ID:
2455 brd->info = &mxser_cards[0];
2456 break;
2457 case C104_ASIC_ID:
2458 brd->info = &mxser_cards[1];
2459 break;
2460 case CI104J_ASIC_ID:
2461 brd->info = &mxser_cards[2];
2462 break;
2463 case C102_ASIC_ID:
2464 brd->info = &mxser_cards[5];
2465 break;
2466 case CI132_ASIC_ID:
2467 brd->info = &mxser_cards[6];
2468 break;
2469 case CI134_ASIC_ID:
2470 brd->info = &mxser_cards[7];
2471 break;
2472 default:
2473 return 0;
2474 }
2475
2476 irq = 0;
2477 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2478 Flag-hack checks if configuration should be read as 2-port here. */
2479 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
2480 irq = regs[9] & 0xF000;
2481 irq = irq | (irq >> 4);
2482 if (irq != (regs[9] & 0xFF00))
2483 goto err_irqconflict;
2484 } else if (brd->info->nports == 4) {
2485 irq = regs[9] & 0xF000;
2486 irq = irq | (irq >> 4);
2487 irq = irq | (irq >> 8);
2488 if (irq != regs[9])
2489 goto err_irqconflict;
2490 } else if (brd->info->nports == 8) {
2491 irq = regs[9] & 0xF000;
2492 irq = irq | (irq >> 4);
2493 irq = irq | (irq >> 8);
2494 if ((irq != regs[9]) || (irq != regs[10]))
2495 goto err_irqconflict;
2496 }
2497
2498 if (!irq) {
2499 printk(KERN_ERR "mxser: interrupt number unset\n");
2500 return -EIO;
2501 }
2502 brd->irq = ((int)(irq & 0xF000) >> 12);
2503 for (i = 0; i < 8; i++)
2504 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
2505 if ((regs[12] & 0x80) == 0) {
2506 printk(KERN_ERR "mxser: invalid interrupt vector\n");
2507 return -EIO;
2508 }
2509 brd->vector = (int)regs[11]; /* interrupt vector */
2510 if (id == 1)
2511 brd->vector_mask = 0x00FF;
2512 else
2513 brd->vector_mask = 0x000F;
2514 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2515 if (regs[12] & bits) {
2516 brd->ports[i].baud_base = 921600;
2517 brd->ports[i].max_baud = 921600;
2518 } else {
2519 brd->ports[i].baud_base = 115200;
2520 brd->ports[i].max_baud = 115200;
2521 }
2522 }
2523 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2524 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2525 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2526 outb(scratch2, cap + UART_LCR);
2527 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2528 scratch = inb(cap + UART_IIR);
2529
2530 if (scratch & 0xC0)
2531 brd->uart_type = PORT_16550A;
2532 else
2533 brd->uart_type = PORT_16450;
2534 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
2535 "mxser(IO)")) {
2536 printk(KERN_ERR "mxser: can't request ports I/O region: "
2537 "0x%.8lx-0x%.8lx\n",
2538 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2539 8 * brd->info->nports - 1);
2540 return -EIO;
2541 }
2542
2543 ret = mxser_request_vector(brd);
2544 if (ret) {
2545 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2546 printk(KERN_ERR "mxser: can't request interrupt vector region: "
2547 "0x%.8lx-0x%.8lx\n",
2548 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2549 8 * brd->info->nports - 1);
2550 return ret;
2551 }
2552 return brd->info->nports;
2553
2554 err_irqconflict:
2555 printk(KERN_ERR "mxser: invalid interrupt number\n");
2556 return -EIO;
2557 }
2558
mxser_probe(struct pci_dev * pdev,const struct pci_device_id * ent)2559 static int mxser_probe(struct pci_dev *pdev,
2560 const struct pci_device_id *ent)
2561 {
2562 #ifdef CONFIG_PCI
2563 struct mxser_board *brd;
2564 unsigned int i, j;
2565 unsigned long ioaddress;
2566 struct device *tty_dev;
2567 int retval = -EINVAL;
2568
2569 for (i = 0; i < MXSER_BOARDS; i++)
2570 if (mxser_boards[i].info == NULL)
2571 break;
2572
2573 if (i >= MXSER_BOARDS) {
2574 dev_err(&pdev->dev, "too many boards found (maximum %d), board "
2575 "not configured\n", MXSER_BOARDS);
2576 goto err;
2577 }
2578
2579 brd = &mxser_boards[i];
2580 brd->idx = i * MXSER_PORTS_PER_BOARD;
2581 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
2582 mxser_cards[ent->driver_data].name,
2583 pdev->bus->number, PCI_SLOT(pdev->devfn));
2584
2585 retval = pci_enable_device(pdev);
2586 if (retval) {
2587 dev_err(&pdev->dev, "PCI enable failed\n");
2588 goto err;
2589 }
2590
2591 /* io address */
2592 ioaddress = pci_resource_start(pdev, 2);
2593 retval = pci_request_region(pdev, 2, "mxser(IO)");
2594 if (retval)
2595 goto err_dis;
2596
2597 brd->info = &mxser_cards[ent->driver_data];
2598 for (i = 0; i < brd->info->nports; i++)
2599 brd->ports[i].ioaddr = ioaddress + 8 * i;
2600
2601 /* vector */
2602 ioaddress = pci_resource_start(pdev, 3);
2603 retval = pci_request_region(pdev, 3, "mxser(vector)");
2604 if (retval)
2605 goto err_zero;
2606 brd->vector = ioaddress;
2607
2608 /* irq */
2609 brd->irq = pdev->irq;
2610
2611 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2612 brd->uart_type = PORT_16550A;
2613 brd->vector_mask = 0;
2614
2615 for (i = 0; i < brd->info->nports; i++) {
2616 for (j = 0; j < UART_INFO_NUM; j++) {
2617 if (Gpci_uart_info[j].type == brd->chip_flag) {
2618 brd->ports[i].max_baud =
2619 Gpci_uart_info[j].max_baud;
2620
2621 /* exception....CP-102 */
2622 if (brd->info->flags & MXSER_HIGHBAUD)
2623 brd->ports[i].max_baud = 921600;
2624 break;
2625 }
2626 }
2627 }
2628
2629 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2630 for (i = 0; i < brd->info->nports; i++) {
2631 if (i < 4)
2632 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2633 else
2634 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
2635 }
2636 outb(0, ioaddress + 4); /* default set to RS232 mode */
2637 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
2638 }
2639
2640 for (i = 0; i < brd->info->nports; i++) {
2641 brd->vector_mask |= (1 << i);
2642 brd->ports[i].baud_base = 921600;
2643 }
2644
2645 /* mxser_initbrd will hook ISR. */
2646 retval = mxser_initbrd(brd);
2647 if (retval)
2648 goto err_rel3;
2649
2650 for (i = 0; i < brd->info->nports; i++) {
2651 tty_dev = tty_port_register_device(&brd->ports[i].port,
2652 mxvar_sdriver, brd->idx + i, &pdev->dev);
2653 if (IS_ERR(tty_dev)) {
2654 retval = PTR_ERR(tty_dev);
2655 for (; i > 0; i--)
2656 tty_unregister_device(mxvar_sdriver,
2657 brd->idx + i - 1);
2658 goto err_relbrd;
2659 }
2660 }
2661
2662 pci_set_drvdata(pdev, brd);
2663
2664 return 0;
2665 err_relbrd:
2666 for (i = 0; i < brd->info->nports; i++)
2667 tty_port_destroy(&brd->ports[i].port);
2668 free_irq(brd->irq, brd);
2669 err_rel3:
2670 pci_release_region(pdev, 3);
2671 err_zero:
2672 brd->info = NULL;
2673 pci_release_region(pdev, 2);
2674 err_dis:
2675 pci_disable_device(pdev);
2676 err:
2677 return retval;
2678 #else
2679 return -ENODEV;
2680 #endif
2681 }
2682
mxser_remove(struct pci_dev * pdev)2683 static void mxser_remove(struct pci_dev *pdev)
2684 {
2685 #ifdef CONFIG_PCI
2686 struct mxser_board *brd = pci_get_drvdata(pdev);
2687
2688 mxser_board_remove(brd);
2689
2690 pci_release_region(pdev, 2);
2691 pci_release_region(pdev, 3);
2692 pci_disable_device(pdev);
2693 brd->info = NULL;
2694 #endif
2695 }
2696
2697 static struct pci_driver mxser_driver = {
2698 .name = "mxser",
2699 .id_table = mxser_pcibrds,
2700 .probe = mxser_probe,
2701 .remove = mxser_remove
2702 };
2703
mxser_module_init(void)2704 static int __init mxser_module_init(void)
2705 {
2706 struct mxser_board *brd;
2707 struct device *tty_dev;
2708 unsigned int b, i, m;
2709 int retval;
2710
2711 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2712 if (!mxvar_sdriver)
2713 return -ENOMEM;
2714
2715 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2716 MXSER_VERSION);
2717
2718 /* Initialize the tty_driver structure */
2719 mxvar_sdriver->name = "ttyMI";
2720 mxvar_sdriver->major = ttymajor;
2721 mxvar_sdriver->minor_start = 0;
2722 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2723 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2724 mxvar_sdriver->init_termios = tty_std_termios;
2725 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2726 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2727 tty_set_operations(mxvar_sdriver, &mxser_ops);
2728
2729 retval = tty_register_driver(mxvar_sdriver);
2730 if (retval) {
2731 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2732 "tty driver !\n");
2733 goto err_put;
2734 }
2735
2736 /* Start finding ISA boards here */
2737 for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
2738 if (!ioaddr[b])
2739 continue;
2740
2741 brd = &mxser_boards[m];
2742 retval = mxser_get_ISA_conf(ioaddr[b], brd);
2743 if (retval <= 0) {
2744 brd->info = NULL;
2745 continue;
2746 }
2747
2748 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
2749 brd->info->name, ioaddr[b]);
2750
2751 /* mxser_initbrd will hook ISR. */
2752 if (mxser_initbrd(brd) < 0) {
2753 mxser_release_ISA_res(brd);
2754 brd->info = NULL;
2755 continue;
2756 }
2757
2758 brd->idx = m * MXSER_PORTS_PER_BOARD;
2759 for (i = 0; i < brd->info->nports; i++) {
2760 tty_dev = tty_port_register_device(&brd->ports[i].port,
2761 mxvar_sdriver, brd->idx + i, NULL);
2762 if (IS_ERR(tty_dev)) {
2763 for (; i > 0; i--)
2764 tty_unregister_device(mxvar_sdriver,
2765 brd->idx + i - 1);
2766 for (i = 0; i < brd->info->nports; i++)
2767 tty_port_destroy(&brd->ports[i].port);
2768 free_irq(brd->irq, brd);
2769 mxser_release_ISA_res(brd);
2770 brd->info = NULL;
2771 break;
2772 }
2773 }
2774 if (brd->info == NULL)
2775 continue;
2776
2777 m++;
2778 }
2779
2780 retval = pci_register_driver(&mxser_driver);
2781 if (retval) {
2782 printk(KERN_ERR "mxser: can't register pci driver\n");
2783 if (!m) {
2784 retval = -ENODEV;
2785 goto err_unr;
2786 } /* else: we have some ISA cards under control */
2787 }
2788
2789 return 0;
2790 err_unr:
2791 tty_unregister_driver(mxvar_sdriver);
2792 err_put:
2793 put_tty_driver(mxvar_sdriver);
2794 return retval;
2795 }
2796
mxser_module_exit(void)2797 static void __exit mxser_module_exit(void)
2798 {
2799 unsigned int i;
2800
2801 pci_unregister_driver(&mxser_driver);
2802
2803 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2804 if (mxser_boards[i].info != NULL)
2805 mxser_board_remove(&mxser_boards[i]);
2806 tty_unregister_driver(mxvar_sdriver);
2807 put_tty_driver(mxvar_sdriver);
2808
2809 for (i = 0; i < MXSER_BOARDS; i++)
2810 if (mxser_boards[i].info != NULL)
2811 mxser_release_ISA_res(&mxser_boards[i]);
2812 }
2813
2814 module_init(mxser_module_init);
2815 module_exit(mxser_module_exit);
2816