Home
last modified time | relevance | path

Searched refs:IS_VALLEYVIEW (Results 1 – 25 of 39) sorted by relevance

12

/kernel/linux/linux-5.10/drivers/gpu/drm/i915/selftests/
Dintel_uncore.c155 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) { in live_forcewake_ops()
266 !IS_VALLEYVIEW(gt->i915) && in live_forcewake_domains()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
Dintel_dsi_vbt.c396 else if (IS_VALLEYVIEW(dev_priv)) in mipi_exec_gpio()
886 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_dsi_vbt_gpio_init()
892 if (IS_VALLEYVIEW(dev_priv) && mipi_config->pwm_blc == PPS_BLC_SOC) { in intel_dsi_vbt_gpio_init()
946 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_dsi_vbt_gpio_cleanup()
950 if (IS_VALLEYVIEW(dev_priv) && mipi_config->pwm_blc == PPS_BLC_SOC) { in intel_dsi_vbt_gpio_cleanup()
Dintel_pipe_crc.c416 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in get_new_crc_ctl_reg()
546 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_is_valid_crc_source()
621 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_crtc_set_crc_source()
Dintel_vga.c17 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_vga_cntrl_reg()
Dintel_cdclk.c443 if (IS_VALLEYVIEW(dev_priv) && min_cdclk > freq_320) in vlv_calc_cdclk()
455 if (IS_VALLEYVIEW(dev_priv)) { in vlv_calc_voltage_level()
490 if (IS_VALLEYVIEW(dev_priv)) in vlv_get_cdclk()
2050 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_crtc_compute_min_cdclk()
2059 IS_VALLEYVIEW(dev_priv)) in intel_crtc_compute_min_cdclk()
2646 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_update_max_cdclk()
2678 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_update_cdclk()
2795 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_read_rawclk()
2857 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_init_cdclk_hooks()
2874 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_init_cdclk_hooks()
Dintel_dp.c1068 !(IS_VALLEYVIEW(dev_priv) || in intel_power_sequencer_reset()
1117 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_pps_get_registers()
1166 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in edp_notify_handler()
1193 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in edp_have_panel_power()
1206 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in edp_have_panel_vdd()
1864 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_dp_set_clock()
3924 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_enable_dp()
3934 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_enable_dp()
4598 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_dp_link_down()
6642 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv) && in intel_dp_encoder_reset()
[all …]
Dintel_lpe_audio.c184 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in lpe_audio_detect()
Dintel_crt.c352 else if (IS_VALLEYVIEW(dev_priv)) in intel_crt_mode_valid()
563 if (IS_VALLEYVIEW(dev_priv)) in intel_crt_detect_hotplug()
1000 else if (IS_VALLEYVIEW(dev_priv)) in intel_crt_init()
Dintel_audio.c713 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in ilk_audio_codec_disable()
773 } else if (IS_VALLEYVIEW(dev_priv) || in ilk_audio_codec_enable()
933 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_init_audio_hooks()
Dintel_display_debugfs.c163 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_sr_status()
1443 else if (IS_VALLEYVIEW(dev_priv)) in wm_latency_show()
1460 IS_VALLEYVIEW(dev_priv) || in wm_latency_show()
1563 else if (IS_VALLEYVIEW(dev_priv)) in wm_latency_write()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
Dvlv_suspend.c395 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in vlv_suspend_complete()
440 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in vlv_resume_prepare()
470 if (!IS_VALLEYVIEW(i915)) in vlv_suspend_init()
Di915_sysfs.c587 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in i915_setup_sysfs()
611 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_setup_sysfs()
629 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_teardown_sysfs()
Dintel_sideband.c62 if (IS_VALLEYVIEW(i915)) { in __vlv_punit_get()
70 if (IS_VALLEYVIEW(i915)) in __vlv_punit_put()
Di915_irq.c160 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in intel_hpd_init_pins()
1463 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i9xx_hpd_irq_ack()
1502 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i9xx_hpd_irq_handler()
1517 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in i9xx_hpd_irq_handler()
3982 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_irq_init()
4032 else if (IS_VALLEYVIEW(dev_priv)) in intel_irq_handler()
4057 else if (IS_VALLEYVIEW(dev_priv)) in intel_irq_reset()
4080 else if (IS_VALLEYVIEW(dev_priv)) in intel_irq_postinstall()
Di915_drv.c157 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_setup_mchbar()
1553 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in intel_runtime_suspend()
1599 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in intel_runtime_resume()
Dintel_uncore.c354 if (IS_VALLEYVIEW(uncore->i915)) in __gen6_gt_wait_for_fifo()
1612 } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in intel_uncore_fw_domains_init()
1805 if (IS_VALLEYVIEW(i915)) { in uncore_forcewake_init()
1869 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_uncore_init_mmio()
Dintel_device_info.c428 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_device_info_runtime_init()
Di915_pmu.c127 IS_VALLEYVIEW(i915) ? in __get_rc6()
486 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in config_status()
Di915_debugfs.c538 } else if (IS_VALLEYVIEW(dev_priv)) { in i915_interrupt_info()
803 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in i915_frequency_info()
1159 if (INTEL_GEN(dev_priv) >= 8 || IS_VALLEYVIEW(dev_priv)) in i915_swizzle_info()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/
Dintel_rc6.c540 else if (IS_VALLEYVIEW(i915)) in intel_rc6_init()
578 else if (IS_VALLEYVIEW(i915)) in intel_rc6_enable()
743 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in intel_rc6_residency_ns()
Dintel_rps.c658 if (IS_VALLEYVIEW(gt->i915)) in rps_set_power()
792 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in rps_set()
1342 else if (IS_VALLEYVIEW(i915)) in intel_rps_enable()
1437 else if (IS_VALLEYVIEW(i915)) in intel_gpu_freq()
1452 else if (IS_VALLEYVIEW(i915)) in intel_freq_opcode()
1806 else if (IS_VALLEYVIEW(i915)) in intel_rps_init()
1865 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_rps_get_cagf()
1882 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in read_cagf()
Dselftest_rc6.c50 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) in live_rc6_manual()
Dintel_ggtt_fencing.c572 if (INTEL_GEN(i915) >= 8 || IS_VALLEYVIEW(i915)) { in detect_bit_6_swizzle()
845 !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))) in intel_ggtt_init_fences()
Ddebugfs_gt_pm.c230 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in drpc_show()
262 } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in frequency_show()
Dgen7_renderclear.c401 ((IS_IVB_GT1(i915) || IS_VALLEYVIEW(i915)) ? in emit_batch()

12