| /kernel/linux/linux-5.10/drivers/bus/ |
| D | omap_l3_smx.h | 29 static const u64 shift = 1; variable
31 #define L3_STATUS_0_MPUIA_BRST (shift << 0)
32 #define L3_STATUS_0_MPUIA_RSP (shift << 1)
33 #define L3_STATUS_0_MPUIA_INBAND (shift << 2)
34 #define L3_STATUS_0_IVAIA_BRST (shift << 6)
35 #define L3_STATUS_0_IVAIA_RSP (shift << 7)
36 #define L3_STATUS_0_IVAIA_INBAND (shift << 8)
37 #define L3_STATUS_0_SGXIA_BRST (shift << 9)
38 #define L3_STATUS_0_SGXIA_RSP (shift << 10)
39 #define L3_STATUS_0_SGXIA_MERROR (shift << 11)
[all …]
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| D | da8xx-mstpri.c | 55 int shift; member
62 .shift = 0,
67 .shift = 4,
72 .shift = 16,
77 .shift = 20,
82 .shift = 0,
87 .shift = 4,
92 .shift = 8,
97 .shift = 12,
102 .shift = 16,
[all …]
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| /kernel/linux/linux-5.10/arch/alpha/include/uapi/asm/ |
| D | compiler.h | 14 # define __kernel_insbl(val, shift) __builtin_alpha_insbl(val, shift) argument
15 # define __kernel_inswl(val, shift) __builtin_alpha_inswl(val, shift) argument
16 # define __kernel_insql(val, shift) __builtin_alpha_insql(val, shift) argument
17 # define __kernel_inslh(val, shift) __builtin_alpha_inslh(val, shift) argument
18 # define __kernel_extbl(val, shift) __builtin_alpha_extbl(val, shift) argument
19 # define __kernel_extwl(val, shift) __builtin_alpha_extwl(val, shift) argument
22 # define __kernel_insbl(val, shift) \ argument
24 __asm__("insbl %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \
26 # define __kernel_inswl(val, shift) \ argument
28 __asm__("inswl %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \
[all …]
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| /kernel/linux/linux-5.10/drivers/memory/tegra/ |
| D | tegra30.c | 49 .shift = 0,
63 .shift = 0,
77 .shift = 16,
91 .shift = 16,
105 .shift = 0,
119 .shift = 0,
133 .shift = 16,
147 .shift = 16,
161 .shift = 0,
175 .shift = 0,
[all …]
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| D | tegra210.c | 25 .shift = 0,
39 .shift = 0,
53 .shift = 16,
67 .shift = 16,
81 .shift = 0,
95 .shift = 0,
109 .shift = 0,
123 .shift = 0,
137 .shift = 0,
151 .shift = 0,
[all …]
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| D | tegra114.c | 28 .shift = 0,
42 .shift = 0,
56 .shift = 16,
70 .shift = 16,
84 .shift = 0,
98 .shift = 0,
112 .shift = 0,
126 .shift = 0,
140 .shift = 16,
154 .shift = 0,
[all …]
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| D | tegra124.c | 28 .shift = 0,
42 .shift = 0,
56 .shift = 16,
70 .shift = 16,
84 .shift = 0,
98 .shift = 0,
112 .shift = 0,
126 .shift = 0,
140 .shift = 0,
154 .shift = 0,
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/imx/ |
| D | clk.h | 81 #define imx_clk_gate_exclusive(name, parent, reg, shift, exclusive_mask) \ argument
82 to_clk(imx_clk_hw_gate_exclusive(name, parent, reg, shift, exclusive_mask))
90 #define imx_clk_divider(name, parent, reg, shift, width) \ argument
91 to_clk(imx_clk_hw_divider(name, parent, reg, shift, width))
93 #define imx_clk_divider2(name, parent, reg, shift, width) \ argument
94 to_clk(imx_clk_hw_divider2(name, parent, reg, shift, width))
96 #define imx_clk_divider_flags(name, parent, reg, shift, width, flags) \ argument
97 to_clk(imx_clk_hw_divider_flags(name, parent, reg, shift, width, flags))
99 #define imx_clk_gate(name, parent, reg, shift) \ argument
100 to_clk(imx_clk_hw_gate(name, parent, reg, shift))
[all …]
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| /kernel/linux/linux-5.10/drivers/mfd/ |
| D | atmel-smc.c | 94 unsigned int shift, unsigned int ncycles) in atmel_smc_cs_conf_set_timing() argument
99 if (shift != ATMEL_HSMC_TIMINGS_TCLR_SHIFT && in atmel_smc_cs_conf_set_timing()
100 shift != ATMEL_HSMC_TIMINGS_TADL_SHIFT && in atmel_smc_cs_conf_set_timing()
101 shift != ATMEL_HSMC_TIMINGS_TAR_SHIFT && in atmel_smc_cs_conf_set_timing()
102 shift != ATMEL_HSMC_TIMINGS_TRR_SHIFT && in atmel_smc_cs_conf_set_timing()
103 shift != ATMEL_HSMC_TIMINGS_TWB_SHIFT) in atmel_smc_cs_conf_set_timing()
113 conf->timings &= ~GENMASK(shift + 3, shift); in atmel_smc_cs_conf_set_timing()
114 conf->timings |= val << shift; in atmel_smc_cs_conf_set_timing()
136 unsigned int shift, unsigned int ncycles) in atmel_smc_cs_conf_set_setup() argument
141 if (shift != ATMEL_SMC_NWE_SHIFT && shift != ATMEL_SMC_NCS_WR_SHIFT && in atmel_smc_cs_conf_set_setup()
[all …]
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| D | tmio_core.c | 29 int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base) in tmio_core_mmc_enable() argument
32 sd_config_write16(cnf, shift, CNF_CMD, SDCREN); in tmio_core_mmc_enable()
33 sd_config_write32(cnf, shift, CNF_CTL_BASE, base & 0xfffe); in tmio_core_mmc_enable()
36 sd_config_write8(cnf, shift, CNF_PWR_CTL_3, 0x01); in tmio_core_mmc_enable()
39 sd_config_write8(cnf, shift, CNF_STOP_CLK_CTL, 0x1f); in tmio_core_mmc_enable()
42 sd_config_write8(cnf, shift, CNF_PWR_CTL_2, 0x00); in tmio_core_mmc_enable()
48 int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base) in tmio_core_mmc_resume() argument
52 sd_config_write16(cnf, shift, CNF_CMD, SDCREN); in tmio_core_mmc_resume()
53 sd_config_write32(cnf, shift, CNF_CTL_BASE, base & 0xfffe); in tmio_core_mmc_resume()
59 void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state) in tmio_core_mmc_pwr() argument
[all …]
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| /kernel/linux/linux-5.10/include/linux/ |
| D | bitops.h | 83 static inline __u64 rol64(__u64 word, unsigned int shift) in rol64() argument
85 return (word << (shift & 63)) | (word >> ((-shift) & 63)); in rol64()
93 static inline __u64 ror64(__u64 word, unsigned int shift) in ror64() argument
95 return (word >> (shift & 63)) | (word << ((-shift) & 63)); in ror64()
103 static inline __u32 rol32(__u32 word, unsigned int shift) in rol32() argument
105 return (word << (shift & 31)) | (word >> ((-shift) & 31)); in rol32()
113 static inline __u32 ror32(__u32 word, unsigned int shift) in ror32() argument
115 return (word >> (shift & 31)) | (word << ((-shift) & 31)); in ror32()
123 static inline __u16 rol16(__u16 word, unsigned int shift) in rol16() argument
125 return (word << (shift & 15)) | (word >> ((-shift) & 15)); in rol16()
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/meson/ |
| D | parm.h | 14 #define SETPMASK(width, shift) GENMASK(shift + width - 1, shift) argument
15 #define CLRPMASK(width, shift) (~SETPMASK(width, shift)) argument
17 #define PARM_GET(width, shift, reg) \ argument
18 (((reg) & SETPMASK(width, shift)) >> (shift))
19 #define PARM_SET(width, shift, reg, val) \ argument
20 (((reg) & CLRPMASK(width, shift)) | ((val) << (shift)))
26 u8 shift; member
35 return PARM_GET(p->width, p->shift, val); in meson_parm_read()
41 regmap_update_bits(map, p->reg_off, SETPMASK(p->width, p->shift), in meson_parm_write()
42 val << p->shift); in meson_parm_write()
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| /kernel/linux/linux-5.10/include/drm/ |
| D | drm_fixed.h | 99 unsigned shift, sign = (a >> 63) & 1; in drm_fixp_msbset() local
101 for (shift = 62; shift > 0; --shift) in drm_fixp_msbset()
102 if (((a >> shift) & 1) != sign) in drm_fixp_msbset()
103 return shift; in drm_fixp_msbset()
110 unsigned shift = drm_fixp_msbset(a) + drm_fixp_msbset(b); in drm_fixp_mul() local
113 if (shift > 61) { in drm_fixp_mul()
114 shift = shift - 61; in drm_fixp_mul()
115 a >>= (shift >> 1) + (shift & 1); in drm_fixp_mul()
116 b >>= shift >> 1; in drm_fixp_mul()
118 shift = 0; in drm_fixp_mul()
[all …]
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| /kernel/linux/linux-5.10/arch/mips/kernel/ |
| D | cmpxchg.c | 14 unsigned int shift; in __xchg_small() local
28 shift = (unsigned long)ptr & 0x3; in __xchg_small()
30 shift ^= sizeof(u32) - size; in __xchg_small()
31 shift *= BITS_PER_BYTE; in __xchg_small()
32 mask <<= shift; in __xchg_small()
43 new32 = (load32 & ~mask) | (val << shift); in __xchg_small()
47 return (load32 & mask) >> shift; in __xchg_small()
55 unsigned int shift; in __cmpxchg_small() local
70 shift = (unsigned long)ptr & 0x3; in __cmpxchg_small()
72 shift ^= sizeof(u32) - size; in __cmpxchg_small()
[all …]
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| /kernel/linux/linux-5.10/drivers/mtd/maps/ |
| D | physmap-bt1-rom.c | 34 unsigned long shift; in bt1_rom_map_read() local
39 shift = (unsigned long)src & 0x3; in bt1_rom_map_read()
40 data = readl_relaxed(src - shift); in bt1_rom_map_read()
41 if (!shift) { in bt1_rom_map_read()
45 ret.x[0] = data >> (shift * BITS_PER_BYTE); in bt1_rom_map_read()
48 shift = 4 - shift; in bt1_rom_map_read()
49 if (ofs + shift >= map->size) in bt1_rom_map_read()
52 data = readl_relaxed(src + shift); in bt1_rom_map_read()
53 ret.x[0] |= data << (shift * BITS_PER_BYTE); in bt1_rom_map_read()
63 ssize_t shift, chunk; in bt1_rom_map_copy_from() local
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | omap24xx-clocks.dtsi | 12 ti,bit-shift = <2>;
26 ti,bit-shift = <6>;
78 ti,bit-shift = <23>;
94 ti,bit-shift = <6>;
103 ti,bit-shift = <6>;
132 ti,bit-shift = <2>;
133 ti,idlest-shift = <8>;
142 ti,bit-shift = <6>;
143 ti,idlest-shift = <9>;
152 ti,bit-shift = <5>;
[all …]
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| D | omap3xxx-clocks.dtsi | 25 ti,bit-shift = <6>;
36 ti,bit-shift = <7>;
85 ti,bit-shift = <4>;
99 ti,bit-shift = <2>;
113 ti,bit-shift = <6>;
140 ti,bit-shift = <2>;
221 ti,bit-shift = <0x1b>;
245 ti,bit-shift = <16>;
263 ti,bit-shift = <0xc>;
292 ti,bit-shift = <27>;
[all …]
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| /kernel/linux/linux-5.10/arch/sparc/mm/ |
| D | hugetlbpage.c | 134 static pte_t sun4u_hugepage_shift_to_tte(pte_t entry, unsigned int shift) in sun4u_hugepage_shift_to_tte() argument
139 static pte_t sun4v_hugepage_shift_to_tte(pte_t entry, unsigned int shift) in sun4v_hugepage_shift_to_tte() argument
145 switch (shift) { in sun4v_hugepage_shift_to_tte()
165 WARN_ONCE(1, "unsupported hugepage shift=%u\n", shift); in sun4v_hugepage_shift_to_tte()
172 static pte_t hugepage_shift_to_tte(pte_t entry, unsigned int shift) in hugepage_shift_to_tte() argument
175 return sun4v_hugepage_shift_to_tte(entry, shift); in hugepage_shift_to_tte()
177 return sun4u_hugepage_shift_to_tte(entry, shift); in hugepage_shift_to_tte()
183 unsigned int shift = huge_page_shift(hstate_vma(vma)); in arch_make_huge_pte() local
186 pte = hugepage_shift_to_tte(entry, shift); in arch_make_huge_pte()
203 unsigned int shift; in sun4v_huge_tte_to_shift() local
[all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/ |
| D | phy_qmath.c | 98 s32 qm_shl32(s32 op, int shift) in qm_shl32() argument
103 if (shift > 31) in qm_shl32()
104 shift = 31; in qm_shl32()
105 else if (shift < -31) in qm_shl32()
106 shift = -31; in qm_shl32()
107 if (shift >= 0) { in qm_shl32()
108 for (i = 0; i < shift; i++) in qm_shl32()
111 result = result >> (-shift); in qm_shl32()
123 s16 qm_shl16(s16 op, int shift) in qm_shl16() argument
128 if (shift > 15) in qm_shl16()
[all …]
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| /kernel/linux/linux-5.10/drivers/video/fbdev/core/ |
| D | sysimgblt.c | 57 u32 color = 0, val, shift; in color_imageblit() local
67 shift = 0; in color_imageblit()
74 shift = start_index; in color_imageblit()
83 val |= FB_SHIFT_HIGH(p, color, shift); in color_imageblit()
84 if (shift >= null_bits) { in color_imageblit()
87 val = (shift == null_bits) ? 0 : in color_imageblit()
88 FB_SHIFT_LOW(p, color, 32 - shift); in color_imageblit()
90 shift += bpp; in color_imageblit()
91 shift &= (32 - 1); in color_imageblit()
94 if (shift) { in color_imageblit()
[all …]
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| D | cfbimgblt.c | 82 u32 color = 0, val, shift; in color_imageblit() local
93 shift = 0; in color_imageblit()
100 shift = start_index; in color_imageblit()
109 val |= FB_SHIFT_HIGH(p, color, shift ^ bswapmask); in color_imageblit()
110 if (shift >= null_bits) { in color_imageblit()
113 val = (shift == null_bits) ? 0 : in color_imageblit()
114 FB_SHIFT_LOW(p, color, 32 - shift); in color_imageblit()
116 shift += bpp; in color_imageblit()
117 shift &= (32 - 1); in color_imageblit()
120 if (shift) { in color_imageblit()
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/mm/ |
| D | init-common.c | 56 #define CTOR(shift) static void ctor_##shift(void *addr) \ argument
58 memset(addr, 0, sizeof(void *) << (shift)); \
64 static inline void (*ctor(int shift))(void *) in ctor() argument
68 switch (shift) { in ctor()
99 void pgtable_cache_add(unsigned int shift) in pgtable_cache_add() argument
102 unsigned long table_size = sizeof(void *) << shift; in pgtable_cache_add()
120 BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE); in pgtable_cache_add()
122 if (PGT_CACHE(shift)) in pgtable_cache_add()
126 name = kasprintf(GFP_KERNEL, "pgtable-2^%d", shift); in pgtable_cache_add()
127 new = kmem_cache_create(name, table_size, align, 0, ctor(shift)); in pgtable_cache_add()
[all …]
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| /kernel/linux/linux-5.10/drivers/soc/fsl/qe/ |
| D | ucc.c | 89 unsigned int *reg_num, unsigned int *shift) in get_cmxucr_reg() argument
95 *shift = 16 - 8 * (ucc_num & 2); in get_cmxucr_reg()
102 unsigned int shift; in ucc_mux_set_grant_tsa_bkpt() local
108 get_cmxucr_reg(ucc_num, &cmxucr, ®_num, &shift); in ucc_mux_set_grant_tsa_bkpt()
111 qe_setbits_be32(cmxucr, mask << shift); in ucc_mux_set_grant_tsa_bkpt()
113 qe_clrbits_be32(cmxucr, mask << shift); in ucc_mux_set_grant_tsa_bkpt()
123 unsigned int shift; in ucc_set_qe_mux_rxtx() local
134 get_cmxucr_reg(ucc_num, &cmxucr, ®_num, &shift); in ucc_set_qe_mux_rxtx()
207 shift += 4; in ucc_set_qe_mux_rxtx()
209 qe_clrsetbits_be32(cmxucr, QE_CMXUCR_TX_CLK_SRC_MASK << shift, in ucc_set_qe_mux_rxtx()
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/mm/nohash/ |
| D | tlb.c | 56 .shift = 12,
60 .shift = 21,
64 .shift = 22,
68 .shift = 24,
72 .shift = 26,
76 .shift = 28,
80 .shift = 30,
87 .shift = 12,
90 .shift = 14,
93 .shift = 19,
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/include/asm/book3s/64/ |
| D | hugetlb.h | 22 unsigned long shift; in hstate_get_psize() local
24 shift = huge_page_shift(hstate); in hstate_get_psize()
25 if (shift == mmu_psize_defs[MMU_PAGE_2M].shift) in hstate_get_psize()
27 else if (shift == mmu_psize_defs[MMU_PAGE_1G].shift) in hstate_get_psize()
29 else if (shift == mmu_psize_defs[MMU_PAGE_16M].shift) in hstate_get_psize()
31 else if (shift == mmu_psize_defs[MMU_PAGE_16G].shift) in hstate_get_psize()
109 static inline int check_and_get_huge_psize(int shift) in check_and_get_huge_psize() argument
113 if (shift > SLICE_HIGH_SHIFT) in check_and_get_huge_psize()
116 mmu_psize = shift_to_mmu_psize(shift); in check_and_get_huge_psize()
|