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Searched refs:DSCSR (Results 1 – 9 of 9) sorted by relevance

/third_party/cmsis/CMSIS/Core/Include/
Dcore_armv8mbl.h1004 …__IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status… member
1105 …__IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status… member
Dcore_cm23.h1079 …__IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status… member
1180 …__IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status… member
Dcore_armv8mml.h1767 …__IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status… member
1901 …__IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status… member
Dcore_cm35p.h1842 …__IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status… member
1976 …__IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status… member
Dcore_cm33.h1842 …__IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status… member
1976 …__IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status… member
Dcore_armv81mml.h2654 …__IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status… member
2825 …__IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status… member
Dcore_cm85.h3113 …__IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status… member
3284 …__IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status… member
Dcore_cm55.h3208 …__IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status… member
3379 …__IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status… member
Dcore_starmc1.h1903 …__IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status… member