/third_party/node/deps/v8/src/codegen/riscv64/ |
D | constants-riscv64.h | 1392 inline Instr InstructionBits() const { in InstructionBits() function 1405 inline int Bit(int nr) const { return (InstructionBits() >> nr) & 1; } in Bit() 1409 return (InstructionBits() >> lo) & ((2U << (hi - lo)) - 1); in Bits() 1420 return static_cast<Opcode>(InstructionBits() & kBaseOpcodeMask); in BaseOpcodeFieldRaw() 1424 inline int Funct7FieldRaw() const { return InstructionBits() & kFunct7Mask; } in Funct7FieldRaw() 1427 inline int Funct3FieldRaw() const { return InstructionBits() & kFunct3Mask; } in Funct3FieldRaw() 1431 return InstructionBits() & kRs1FieldMask; in Rs1FieldRawNoAssert() 1436 return InstructionBits() & kRs2FieldMask; in Rs2FieldRawNoAssert() 1441 return InstructionBits() & kRs3FieldMask; in Rs3FieldRawNoAssert() 1444 inline int32_t ITypeBits() const { return InstructionBits() & kITypeMask; } in ITypeBits() [all …]
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D | constants-riscv64.cc | 153 switch (InstructionBits() & kRvcOpcodeMask) { in InstructionType() 195 switch (InstructionBits() & kBaseOpcodeMask) { in InstructionType()
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/third_party/node/deps/v8/src/diagnostics/riscv64/ |
D | disasm-riscv64.cc | 263 if (Assembler::IsJalr(instr->InstructionBits())) { in PrintTarget() 264 if (Assembler::IsAuipc((instr - 4)->InstructionBits()) && in PrintTarget() 266 int32_t imm = Assembler::BrachlongOffset((instr - 4)->InstructionBits(), in PrintTarget() 267 instr->InstructionBits()); in PrintTarget() 870 switch (instr->InstructionBits() & kRTypeMask) { in DecodeRType() 995 switch (instr->InstructionBits() & kRATypeMask) { in DecodeRAType() 1075 switch (instr->InstructionBits() & kRFPTypeMask) { in DecodeRFPType() 1382 switch (instr->InstructionBits() & kR4TypeMask) { in DecodeR4Type() 1418 switch (instr->InstructionBits() & kITypeMask) { in DecodeIType() 1646 switch (instr->InstructionBits() & kSTypeMask) { in DecodeSType() [all …]
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/third_party/node/deps/v8/src/codegen/mips/ |
D | constants-mips.h | 1238 inline Instr InstructionBits() const { in InstructionBits() function 1248 inline int Bit(int nr) const { return (InstructionBits() >> nr) & 1; } in Bit() 1252 return (InstructionBits() >> lo) & ((2U << (hi - lo)) - 1); in Bits() 1305 return InstructionBits() & kFunctionFieldMask; in FunctionFieldRaw() 1310 return static_cast<Opcode>(InstructionBits() & kOpcodeMask); in OpcodeFieldRaw() 1315 return InstructionBits() & kRsFieldMask; in RsFieldRawNoAssert() 1318 inline int SaFieldRaw() const { return InstructionBits() & kSaFieldMask; } in SaFieldRaw() 1333 return (((this->InstructionBits() & kMsaI5I10Mask) == LDI) in MSAMinorOpcodeField() 1474 return static_cast<Opcode>(this->InstructionBits() & kOpcodeMask); in OpcodeFieldRaw() 1480 return this->InstructionBits() & kRsFieldMask; in RsFieldRaw() [all …]
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/third_party/node/deps/v8/src/codegen/mips64/ |
D | constants-mips64.h | 1287 inline Instr InstructionBits() const { in InstructionBits() function 1297 inline int Bit(int nr) const { return (InstructionBits() >> nr) & 1; } in Bit() 1301 return (InstructionBits() >> lo) & ((2U << (hi - lo)) - 1); in Bits() 1367 return InstructionBits() & kFunctionFieldMask; in FunctionFieldRaw() 1372 return static_cast<Opcode>(InstructionBits() & kOpcodeMask); in OpcodeFieldRaw() 1377 return InstructionBits() & kRsFieldMask; in RsFieldRawNoAssert() 1380 inline int SaFieldRaw() const { return InstructionBits() & kSaFieldMask; } in SaFieldRaw() 1395 return (((this->InstructionBits() & kMsaI5I10Mask) == LDI) in MSAMinorOpcodeField() 1541 return static_cast<Opcode>(this->InstructionBits() & kOpcodeMask); in OpcodeFieldRaw() 1547 return this->InstructionBits() & kRsFieldMask; in RsFieldRaw() [all …]
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/third_party/node/deps/v8/src/codegen/arm/ |
D | constants-arm.h | 438 inline Instr InstructionBits() const { in InstructionBits() function 449 inline int Bit(int nr) const { return (InstructionBits() >> nr) & 1; } in Bit() 454 return (InstructionBits() >> lo) & ((2 << (hi - lo)) - 1); in Bits() 459 return InstructionBits() & (((2 << (hi - lo)) - 1) << lo); in BitField() 567 return signed_bitextract_32(23, 0, InstructionBits()); in SImmed24Value() 582 SetInstructionBits((InstructionBits() & ~(kImm24Mask)) | in SetBranchOffset()
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/third_party/node/deps/v8/src/codegen/s390/ |
D | assembler-s390-inl.h | 59 Instruction::InstructionBits(reinterpret_cast<const byte*>(pc_)); in apply() 137 Instruction::InstructionBits(reinterpret_cast<const byte*>(pc)); in code_target_object_handle_at() 258 Instruction::InstructionBits(reinterpret_cast<const byte*>(pc)); in target_address_at() 270 SixByteInstr instr_2 = Instruction::InstructionBits( in target_address_at() 320 Instruction::InstructionBits(reinterpret_cast<const byte*>(pc)); in set_target_address_at() 340 SixByteInstr instr_2 = Instruction::InstructionBits( in set_target_address_at()
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D | constants-s390.h | 1843 inline T InstructionBits() const { in InstructionBits() function 1844 return Instruction::InstructionBits<T>(reinterpret_cast<const byte*>(this)); in InstructionBits() 1846 inline Instr InstructionBits() const { in InstructionBits() function 1861 inline int Bit(int nr) const { return (InstructionBits() >> nr) & 1; } in Bit() 1865 return (InstructionBits() >> lo) & ((2 << (hi - lo)) - 1); in Bits() 1871 return (InstructionBits<T>() >> lo) & ((2 << (hi - lo)) - 1); in Bits() 1876 return InstructionBits() & (((2 << (hi - lo)) - 1) << lo); in BitField() 1918 static inline uint64_t InstructionBits(const byte* instr) { in InstructionBits() function 1921 return static_cast<uint64_t>(InstructionBits<TwoByteInstr>(instr)); in InstructionBits() 1923 return static_cast<uint64_t>(InstructionBits<FourByteInstr>(instr)); in InstructionBits() [all …]
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/third_party/node/deps/v8/src/codegen/loong64/ |
D | constants-loong64.h | 724 inline Instr InstructionBits() const { in InstructionBits() function 734 inline int Bit(int nr) const { return (InstructionBits() >> nr) & 1; } in Bit() 738 return (InstructionBits() >> lo) & ((2U << (hi - lo)) - 1); in Bits() 743 return InstructionBits() & kRjFieldMask; in RjFieldRawNoAssert() 883 return this->InstructionBits() & kRjFieldMask; in RjFieldRaw() 887 return this->InstructionBits() & kRkFieldMask; in RkFieldRaw() 891 return this->InstructionBits() & kRdFieldMask; in RdFieldRaw()
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/third_party/node/deps/v8/src/codegen/arm64/ |
D | instructions-arm64.cc | 314 instrbits_ = instr->InstructionBits(); in NEONFormatDecoder() 320 instrbits_ = instr->InstructionBits(); in NEONFormatDecoder() 327 instrbits_ = instr->InstructionBits(); in NEONFormatDecoder() 335 instrbits_ = instr->InstructionBits(); in NEONFormatDecoder()
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D | instructions-arm64.h | 85 V8_INLINE Instr InstructionBits() const { in InstructionBits() function 95 int Bit(int pos) const { return (InstructionBits() >> pos) & 1; } in Bit() 98 return unsigned_bitextract_32(msb, lsb, InstructionBits()); in Bits() 108 Instr Mask(uint32_t mask) const { return InstructionBits() & mask; } in Mask()
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D | assembler-arm64-inl.h | 548 DCHECK_EQ(instr->InstructionBits(), 0); 566 DCHECK_EQ(instr->InstructionBits(), 0);
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/third_party/node/deps/v8/src/diagnostics/mips/ |
D | disasm-mips.cc | 577 uint32_t opcode = instr->InstructionBits() & kMsa3RFMask; in PrintMsaDataFormat() 1248 if (0x0 == static_cast<int>(instr->InstructionBits())) in DecodeTypeRegisterSPECIAL() 2016 uint32_t opcode = instr->InstructionBits() & kMsaI8Mask; in DecodeTypeMsaI8() 2055 uint32_t opcode = instr->InstructionBits() & kMsaI5Mask; in DecodeTypeMsaI5() 2097 uint32_t opcode = instr->InstructionBits() & kMsaI5Mask; in DecodeTypeMsaI10() 2106 uint32_t opcode = instr->InstructionBits() & kMsaELMMask; in DecodeTypeMsaELM() 2153 uint32_t opcode = instr->InstructionBits() & kMsaBITMask; in DecodeTypeMsaBIT() 2198 uint32_t opcode = instr->InstructionBits() & kMsaMI10Mask; in DecodeTypeMsaMI10() 2213 uint32_t opcode = instr->InstructionBits() & kMsa3RMask; in DecodeTypeMsa3R() 2410 uint32_t opcode = instr->InstructionBits() & kMsa3RFMask; in DecodeTypeMsa3RF() [all …]
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/third_party/node/deps/v8/src/diagnostics/mips64/ |
D | disasm-mips64.cc | 618 uint32_t opcode = instr->InstructionBits() & kMsa3RFMask; in PrintMsaDataFormat() 1383 if (0x0 == static_cast<int>(instr->InstructionBits())) in DecodeTypeRegisterSPECIAL() 2303 uint32_t opcode = instr->InstructionBits() & kMsaI8Mask; in DecodeTypeMsaI8() 2342 uint32_t opcode = instr->InstructionBits() & kMsaI5Mask; in DecodeTypeMsaI5() 2384 uint32_t opcode = instr->InstructionBits() & kMsaI5Mask; in DecodeTypeMsaI10() 2393 uint32_t opcode = instr->InstructionBits() & kMsaELMMask; in DecodeTypeMsaELM() 2440 uint32_t opcode = instr->InstructionBits() & kMsaBITMask; in DecodeTypeMsaBIT() 2485 uint32_t opcode = instr->InstructionBits() & kMsaMI10Mask; in DecodeTypeMsaMI10() 2500 uint32_t opcode = instr->InstructionBits() & kMsa3RMask; in DecodeTypeMsa3R() 2697 uint32_t opcode = instr->InstructionBits() & kMsa3RFMask; in DecodeTypeMsa3RF() [all …]
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/third_party/node/deps/v8/src/execution/riscv64/ |
D | simulator-riscv64.cc | 1457 DCHECK(instr->InstructionBits() == kBreakInstr); in get_ebreak_code() 1680 instr->InstructionBits() == rtCallRedirInstr) { in Debug() 2770 if (instr_.InstructionBits() == rtCallRedirInstr) { // ECALL in SoftwareInterrupt() 3022 if (instr->InstructionBits() != kBreakInstr) return false; in IsStopInstruction() 3089 switch (instr_.InstructionBits() & kRTypeMask) { in DecodeRVRType() 3525 switch (instr_.InstructionBits() & kRATypeMask) { in DecodeRVRAType() 3699 switch (instr_.InstructionBits() & kRFPTypeMask) { in DecodeRVRFPType() 4157 switch (instr_.InstructionBits() & kR4TypeMask) { in DecodeRVR4Type() 4272 instr_.InstructionBits() & (kRvvMopMask | kRvvNfMask | kBaseOpcodeMask); in DecodeRvvVL() 4274 if (!(instr_.InstructionBits() & (kRvvRs2Mask))) { in DecodeRvvVL() [all …]
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/third_party/node/deps/v8/src/diagnostics/ppc/ |
D | disasm-ppc.cc | 1554 "%08x ", instr->InstructionBits()); in InstructionDecode() 1562 instr->InstructionBits(), next_instr->InstructionBits()); in InstructionDecode() 1565 if (ABI_USES_FUNCTION_DESCRIPTORS && instr->InstructionBits() == 0) { in InstructionDecode()
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/third_party/node/deps/v8/src/diagnostics/s390/ |
D | disasm-s390.cc | 1020 instr->InstructionBits<TwoByteInstr>()); in InstructionDecode() 1024 instr->InstructionBits<FourByteInstr>()); in InstructionDecode() 1028 instr->InstructionBits<SixByteInstr>()); in InstructionDecode()
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/third_party/node/deps/v8/src/execution/mips/ |
D | simulator-mips.cc | 181 sim_->break_instr_ = breakpc->InstructionBits(); in SetBreakpoint() 371 instr->InstructionBits() == rtCallRedirInstr) { in Debug() 2222 if (instr_.InstructionBits() == rtCallRedirInstr) { in SoftwareInterrupt() 4298 uint32_t opcode = instr_.InstructionBits() & kMsa3RFMask; in DecodeMsaDataFormat() 4331 uint32_t opcode = instr_.InstructionBits() & kMsaI8Mask; in DecodeTypeMsaI8() 4481 uint32_t opcode = instr_.InstructionBits() & kMsaI5Mask; in DecodeTypeMsaI5() 4517 uint32_t opcode = instr_.InstructionBits() & kMsaI5Mask; in DecodeTypeMsaI10() 4554 uint32_t opcode = instr_.InstructionBits() & kMsaLongerELMMask; in DecodeTypeMsaELM() 4785 uint32_t opcode = instr_.InstructionBits() & kMsaBITMask; in DecodeTypeMsaBIT() 4826 uint32_t opcode = instr_.InstructionBits() & kMsaMI10Mask; in DecodeTypeMsaMI10() [all …]
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D | simulator-mips.h | 541 if (instr->InstructionBits() == nopInstr) { in BranchDelayInstructionDecode()
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/third_party/node/deps/v8/src/execution/mips64/ |
D | simulator-mips64.cc | 172 sim_->break_instr_ = breakpc->InstructionBits(); in SetBreakpoint() 346 instr->InstructionBits() == rtCallRedirInstr) { in Debug() 2241 if (instr_.InstructionBits() == rtCallRedirInstr) { in SoftwareInterrupt() 4571 uint32_t opcode = instr_.InstructionBits() & kMsa3RFMask; in DecodeMsaDataFormat() 4604 uint32_t opcode = instr_.InstructionBits() & kMsaI8Mask; in DecodeTypeMsaI8() 4754 uint32_t opcode = instr_.InstructionBits() & kMsaI5Mask; in DecodeTypeMsaI5() 4790 uint32_t opcode = instr_.InstructionBits() & kMsaI5Mask; in DecodeTypeMsaI10() 4827 uint32_t opcode = instr_.InstructionBits() & kMsaLongerELMMask; in DecodeTypeMsaELM() 5072 uint32_t opcode = instr_.InstructionBits() & kMsaBITMask; in DecodeTypeMsaBIT() 5113 uint32_t opcode = instr_.InstructionBits() & kMsaMI10Mask; in DecodeTypeMsaMI10() [all …]
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D | simulator-mips64.h | 564 if (instr->InstructionBits() == nopInstr) { in BranchDelayInstructionDecode()
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/third_party/node/deps/v8/src/codegen/ppc/ |
D | constants-ppc.h | 2942 inline Instr InstructionBits() const { in InstructionBits() function 2952 inline int Bit(int nr) const { return (InstructionBits() >> nr) & 1; } in Bit() 2956 return (InstructionBits() >> lo) & ((2 << (hi - lo)) - 1); in Bits() 2961 return InstructionBits() & (((2 << (hi - lo)) - 1) << lo); in BitField()
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/third_party/node/deps/v8/src/diagnostics/loong64/ |
D | disasm-loong64.cc | 178 uint32_t opcode = (instr->InstructionBits() >> 18) << 18; in PrintSa2() 1604 "%08x ", instr->InstructionBits()); in InstructionDecode()
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/third_party/vixl/src/aarch64/ |
D | instructions-aarch64.h | 228 VIXL_DEPRECATED("GetInstructionBits", Instr InstructionBits() const) {
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/third_party/node/deps/v8/src/diagnostics/arm/ |
D | disasm-arm.cc | 529 reinterpret_cast<byte*>(instr->InstructionBits() & 0x0FFFFFFF); in FormatOption() 2536 "%08x ", instr->InstructionBits()); in InstructionDecode()
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