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Searched refs:MASK0 (Results 1 – 4 of 4) sorted by relevance

/third_party/cmsis/CMSIS/Core/Include/
Dcore_sc300.h847 __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ member
Dcore_cm3.h862 __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ member
Dcore_cm4.h927 __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ member
Dcore_cm7.h1151 __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ member