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Searched refs:tcs_vertices_out (Results 1 – 25 of 46) sorted by relevance

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/third_party/mesa3d/src/intel/compiler/
Dbrw_vec4_tcs.cpp85 if (nir->info.tess.tcs_vertices_out % 2) { in emit_prolog()
87 brw_imm_ud(nir->info.tess.tcs_vertices_out), in emit_prolog()
102 if (nir->info.tess.tcs_vertices_out % 2) { in emit_thread_end()
398 nir->info.tess.tcs_vertices_out <= (devinfo->ver >= 12 ? 32 : 16) && in brw_compile_tcs()
407 prog_data->instances = nir->info.tess.tcs_vertices_out; in brw_compile_tcs()
413 DIV_ROUND_UP(nir->info.tess.tcs_vertices_out, verts_per_thread); in brw_compile_tcs()
433 output_size_bytes += nir->info.tess.tcs_vertices_out * in brw_compile_tcs()
/third_party/mesa3d/src/amd/vulkan/
Dradv_nir_lower_abi.c99 …insic_set_arg_upper_bound_u32_amd(load_arg, 2048 / MAX2(b->shader->info.tess.tcs_vertices_out, 1)); in lower_abi_instr()
109 return nir_imm_int(b, b->shader->info.tess.tcs_vertices_out); in lower_abi_instr()
201 unsigned out_vertices_per_patch = b->shader->info.tess.tcs_vertices_out; in lower_abi_instr()
Dradv_shader_info.c661 info->tcs.tcs_vertices_out = nir->info.tess.tcs_vertices_out; in radv_nir_shader_info_pass()
Dradv_pipeline.c3774 assert(tcs_info->tess.tcs_vertices_out == 0 || tes_info->tess.tcs_vertices_out == 0 || in merge_tess_info()
3775 tcs_info->tess.tcs_vertices_out == tes_info->tess.tcs_vertices_out); in merge_tess_info()
3776 tes_info->tess.tcs_vertices_out |= tcs_info->tess.tcs_vertices_out; in merge_tess_info()
3791 tcs_info->tess.tcs_vertices_out = tes_info->tess.tcs_vertices_out; in merge_tess_info()
3806 unsigned tess_out_patch_size = stages[MESA_SHADER_TESS_CTRL].nir->info.tess.tcs_vertices_out; in gather_tess_info()
3836 stages[MESA_SHADER_TESS_CTRL].info.tcs.tcs_vertices_out = tess_out_patch_size; in gather_tess_info()
3837 stages[MESA_SHADER_VERTEX].info.tcs.tcs_vertices_out = tess_out_patch_size; in gather_tess_info()
4732 stages[MESA_SHADER_TESS_CTRL].nir->info.tess.tcs_vertices_out, NULL); in radv_create_shaders()
6026 pipeline->base.shaders[MESA_SHADER_TESS_CTRL]->info.tcs.tcs_vertices_out; // TCS VERTICES OUT in radv_pipeline_emit_tess_state()
Dradv_shader.h362 unsigned tcs_vertices_out; member
/third_party/mesa3d/src/gallium/frontends/lavapipe/
Dlvp_pipeline.c555 assert(tcs_info->tess.tcs_vertices_out == 0 || in merge_tess_info()
556 tes_info->tess.tcs_vertices_out == 0 || in merge_tess_info()
557 tcs_info->tess.tcs_vertices_out == tes_info->tess.tcs_vertices_out); in merge_tess_info()
558 tes_info->tess.tcs_vertices_out |= tcs_info->tess.tcs_vertices_out; in merge_tess_info()
847 …HADER_TESS_EVAL], pipeline->pipeline_nir[MESA_SHADER_TESS_CTRL]->info.tess.tcs_vertices_out, NULL); in lvp_graphics_pipeline_init()
/third_party/mesa3d/src/gallium/drivers/d3d12/
Dd3d12_compiler.cpp758 if (expect->ds.tcs_vertices_out != have->ds.tcs_vertices_out || in d3d12_compare_shader_keys()
848 hash += key->ds.tcs_vertices_out; in d3d12_shader_key_hash()
994 key->ds.tcs_vertices_out = prev->current->nir->info.tess.tcs_vertices_out; in d3d12_fill_shader_key()
996 key->ds.tcs_vertices_out = 32; in d3d12_fill_shader_key()
1164 new_nir_variant->info.tess.tcs_vertices_out = key.ds.tcs_vertices_out; in select_shader_variant()
Dd3d12_compiler.h130 unsigned tcs_vertices_out; member
Dd3d12_tcs_variant.cpp134 nir->info.tess.tcs_vertices_out = key->vertices_out; in create_tess_ctrl_shader_variant()
/third_party/mesa3d/src/amd/common/
Dac_nir_lower_tess_io_to_mem.c330 … unsigned pervertex_output_patch_size = b->shader->info.tess.tcs_vertices_out * output_vertex_size; in hs_output_lds_offset()
370 ? nir_imm_int(b, b->shader->info.tess.tcs_vertices_out) in hs_per_vertex_output_vmem_offset()
733 .tcs_out_patch_fits_subgroup = wave_size % shader->info.tess.tcs_vertices_out == 0, in ac_nir_lower_hs_outputs_to_mem()
/third_party/mesa3d/src/compiler/
Dshader_info.h505 uint8_t tcs_vertices_out; member
/third_party/mesa3d/src/gallium/drivers/freedreno/a6xx/
Dfd6_program.c718 OUT_RING(ring, hs->tess.tcs_vertices_out); in setup_stateobj()
724 hs->tess.tcs_vertices_out)); in setup_stateobj()
733 hs->tess.tcs_vertices_out * vs->output_size / 4; in setup_stateobj()
741 const uint32_t patch_control_points = hs->tess.tcs_vertices_out; in setup_stateobj()
747 uint32_t prims_per_wave = wavesize / hs->tess.tcs_vertices_out; in setup_stateobj()
Dfd6_const.c159 emit->hs->tess.tcs_vertices_out}; in fd6_build_tess_consts()
/third_party/mesa3d/src/freedreno/ir3/
Dir3_nir_lower_tess.c203 slot_size = shader->info.tess.tcs_vertices_out * 4; in build_primitive_map()
400 return nir_imm_int(b, b->shader->info.tess.tcs_vertices_out); in build_tcs_out_vertices()
725 const uint32_t nvertices = shader->info.tess.tcs_vertices_out; in ir3_nir_lower_tess_ctrl()
Dir3_shader.c346 v->tess.tcs_vertices_out = info->tess.tcs_vertices_out; in alloc_variant()
Dir3_shader.h738 uint8_t tcs_vertices_out; member
/third_party/mesa3d/src/compiler/glsl/
Dlinker.cpp1809 gl_prog->info.tess.tcs_vertices_out = 0; in link_tcs_out_layout_qualifiers()
1825 if (gl_prog->info.tess.tcs_vertices_out != 0 && in link_tcs_out_layout_qualifiers()
1826 gl_prog->info.tess.tcs_vertices_out != in link_tcs_out_layout_qualifiers()
1830 gl_prog->info.tess.tcs_vertices_out, in link_tcs_out_layout_qualifiers()
1834 gl_prog->info.tess.tcs_vertices_out = in link_tcs_out_layout_qualifiers()
1843 if (gl_prog->info.tess.tcs_vertices_out == 0) { in link_tcs_out_layout_qualifiers()
2593 ? tcs->Program->info.tess.tcs_vertices_out in resize_tes_inputs()
/third_party/mesa3d/src/intel/vulkan/
Danv_pipeline.c857 assert(tcs_info->tess.tcs_vertices_out == 0 || in merge_tess_info()
858 tes_info->tess.tcs_vertices_out == 0 || in merge_tess_info()
859 tcs_info->tess.tcs_vertices_out == tes_info->tess.tcs_vertices_out); in merge_tess_info()
860 tes_info->tess.tcs_vertices_out |= tcs_info->tess.tcs_vertices_out; in merge_tess_info()
885 tcs_stage->nir->info.tess.tcs_vertices_out, in anv_pipeline_link_tcs()
/third_party/mesa3d/src/microsoft/compiler/
Ddxil_nir_tess.c135 …, nir_ige(b, state->count, nir_imm_int(b, b->impl->function->shader->info.tess.tcs_vertices_out))); in start_tcs_loop()
/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_shader_llvm_tess.c75 unsigned tcs_out_vertices = info->base.tess.tcs_vertices_out; in get_tcs_out_patch_stride()
99 ctx->shader->selector ? ctx->shader->selector->info.base.tess.tcs_vertices_out in si_get_num_tcs_out_vertices()
Dsi_shaderlib_nir.c346 b.shader->info.tess.tcs_vertices_out = sctx->patch_vertices; in si_create_passthrough_tcs()
Dsi_state_draw.cpp657 unsigned num_tcs_output_cp = tcs->info.base.tess.tcs_vertices_out; in si_emit_derived_tess_state()
2200 sctx->patch_vertices == tcs->info.base.tess.tcs_vertices_out; in si_draw()
2214 sctx->patch_vertices > tcs->info.base.tess.tcs_vertices_out; in si_draw()
2231 sctx->shader.tcs.cso->info.base.tess.tcs_vertices_out != sctx->patch_vertices) in si_draw()
/third_party/mesa3d/src/compiler/nir/
Dnir_range_analysis.c1371 res = shader->info.tess.tcs_vertices_out in nir_unsigned_upper_bound()
1372 ? (shader->info.tess.tcs_vertices_out - 1) in nir_unsigned_upper_bound()
1448 res = config->max_workgroup_invocations / MAX2(shader->info.tess.tcs_vertices_out, 1u); in nir_unsigned_upper_bound()
/third_party/mesa3d/src/gallium/auxiliary/nir/
Dnir_to_tgsi_info.c427 nir->info.tess.tcs_vertices_out; in nir_tgsi_scan_shader()
/third_party/mesa3d/src/mesa/state_tracker/
Dst_glsl_to_nir.cpp635 uint32_t tes_patch_verts = tcs_nir->info.tess.tcs_vertices_out; in st_lower_patch_vertices_in()

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