1 /*
2 * Copyright (c) 2022 Huawei Device Co., Ltd.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
17 */
18
19 #include "hi3516_aiao_impl.h"
20 #include <asm/io.h>
21 #include "hdf_base.h"
22 #include "audio_driver_log.h"
23 #include "audio_dai_base.h"
24 #include "osal_io.h"
25
26 #define HDF_LOG_TAG HDF_AUDIO_DRIVER
27
28 #define PERI_CRG103 0x1201019c // 0x12010000 + 0x019c
29
30 #define AOP_BUFF_SADDR_REG 0x2080
31 #define AOP_BUFF_SIZE_REG 0x2084
32 #define AOP_TRANS_SIZE_REG 0x2094
33 #define AOP_INF_ATTRI_REG 0x2000
34 #define AOP_CTRL_REG 0x2004
35 #define AIP_BUFF_SADDR_REG 0x1080
36 #define AIP_BUFF_SIZE_REG 0x1084
37 #define AIP_BUFF_RPTR_REG 0x108C
38 #define AIP_TRANS_SIZE_REG 0x1094
39 #define AIP_INF_ATTRI_REG 0x1000
40 #define AIP_CTRL_REG 0x1004
41 #define RX_INT_ENA 0x10a0
42 #define AIAO_INT_ENA 0x0000
43 #define RX_INT_CLR 0x10AC
44
45 #define GPIO_BASE1 0x2010
46 #define GPIO_BASE2 0x2400
47 #define GPIO_BASE3 0x2010
48
49 #define GPIO_BASE2_VAL 0x000000ff
50 #define GPIO_BASE3_VAL 0x00000000
51
52 #define IOCFG2_BASE_ADDR 0x112F0000
53 #define IOCFG3_BASE_ADDR 0x10FF0000
54 #define GPIO_BASE_ADDR 0x120D0000
55 #define BASE_ADDR_REMAP_SIZE 0x10000
56
57 #define I2S_IOCFG3_BASE1 0x44
58 #define I2S_IOCFG3_BASE1_VAL 0x0600
59
60 static void *g_regAiaoBase = NULL; // AIAO Reg Base Addr
61
62 #define HI3516_AI_DEV_MAX_NUM 3
63 #define HI3516_AO_DEV_MAX_NUM 3
64 #define HI3516_CHANNEL_ID_MAX 13
65
66 #define AI_ATTR_INIT_VAL 0xe4880014
67 #define AO_ATTR_INIT_VAL 0xe4000054
68 #define RX_INT_ENA_VAL 0x01
69 #define RX_CHO_INT_ENA 0x01
70
71 static const AiaoClkInfo g_aioClkInfo = {
72 .clkSelect = 0, /* 0 is Audio base clk; 1 is Audio spare clk. */
73 .mclkDiv48k256fs = 0x00152EF0, /* 48k * 256 */
74 .mclkDiv441k256fs = 0x00137653, /* 44.1k * 256 */
75 .mclkDiv32k256fs = 0x000E1F4B, /* 32k * 256 */
76 .mclkDiv48k320fs = 0x001A7AAC, /* 48k * 320 */
77 .mclkDiv441k320fs = 0x00185FA0, /* 44.1k * 320 */
78 .mclkDiv32k320fs = 0x0011A71E, /* 32k * 320 */
79 };
80
AiopRegCfg(const int reg,const int offset,uint32_t n)81 uint32_t AiopRegCfg(const int reg, const int offset, uint32_t n)
82 {
83 return reg + offset * n;
84 }
85
86 /* Mapping physical address to virtual address, for acodec and aiao */
AiaoHalSysInit(void)87 int32_t AiaoHalSysInit(void)
88 {
89 // AIAO REMAP
90 if (g_regAiaoBase == NULL) {
91 g_regAiaoBase = OsalIoRemap(AIAO_REG_BASE, AIAO_MAX_REG_SIZE);
92 if (g_regAiaoBase == NULL) {
93 return HDF_FAILURE;
94 }
95 }
96 return HDF_SUCCESS;
97 }
98
AiaoClockReset(void)99 int32_t AiaoClockReset(void)
100 {
101 volatile const uint32_t crgVal = 0xa; // AIAO CLOCK RESET
102
103 /* RESET AIAO */
104 volatile char *vAddr = OsalIoRemap(PERI_CRG103, sizeof(uint32_t));
105 if (vAddr == NULL) {
106 AUDIO_DEVICE_LOG_ERR("vAddr is null \n");
107 return HDF_FAILURE;
108 }
109
110 OSAL_WRITEL(crgVal, vAddr);
111 OsalIoUnmap((void *)((uintptr_t)(void*)vAddr));
112 return HDF_SUCCESS;
113 }
114
AiaoHalReadReg(uint32_t offset)115 uint32_t AiaoHalReadReg(uint32_t offset)
116 {
117 if (g_regAiaoBase == NULL) {
118 AUDIO_DEVICE_LOG_ERR("g_regAiaoBase is null.\n");
119 return 0x0;
120 }
121
122 return (*(volatile uint32_t *)((unsigned char *)g_regAiaoBase + (uint32_t)offset));
123 }
124
AiaoGetBclkSel(const uint32_t bclkDiv,uint32_t * bclkSel)125 static int32_t AiaoGetBclkSel(const uint32_t bclkDiv, uint32_t *bclkSel)
126 {
127 const int bclkDivReg[12][2] = {
128 {1, 0x00}, {2, 0x02}, {3, 0x01},
129 {4, 0x03}, {6, 0x04}, {8, 0x05},
130 {12, 0x06}, {16, 0x07}, {24, 0x08},
131 {32, 0x09}, {48, 0x0a}, {64, 0x0b},
132 }; // AIO_MCLK_TO_BCLK
133 if (bclkSel == NULL) {
134 AUDIO_DEVICE_LOG_ERR("bclkSel is null.");
135 return HDF_FAILURE;
136 }
137
138 for (int32_t num = 0; num < sizeof(bclkDivReg) / sizeof(bclkDivReg[0]); num++) {
139 if (bclkDivReg[num][0] == bclkDiv) {
140 *bclkSel = bclkDivReg[num][1];
141 return HDF_SUCCESS;
142 }
143 }
144 return HDF_FAILURE;
145 }
146
AiaoGetLrclkSel(const uint32_t lrclkDiv,uint32_t * lrclkSel)147 static int32_t AiaoGetLrclkSel(const uint32_t lrclkDiv, uint32_t *lrclkSel)
148 {
149 const int lrclkDivReg[6][2] = {
150 {16, 0x00}, {32, 0x01}, {48, 0x02},
151 {64, 0x03}, {128, 0x04}, {256, 0x05},
152 }; // AIO_BCLK_TO_FSCLK
153 if (lrclkSel == NULL) {
154 AUDIO_DEVICE_LOG_ERR("lrclkSel is null.\n");
155 return HDF_FAILURE;
156 }
157
158 for (int32_t num = 0; num < sizeof(lrclkDivReg) / sizeof(lrclkDivReg[0]); num++) {
159 if (lrclkDivReg[num][0] == lrclkDiv) {
160 *lrclkSel = lrclkDivReg[num][1];
161 return HDF_SUCCESS;
162 }
163 }
164 return HDF_FAILURE;
165 }
166
AiaoHalWriteReg(uint32_t offset,uint32_t value)167 static void AiaoHalWriteReg(uint32_t offset, uint32_t value)
168 {
169 if (g_regAiaoBase == NULL) {
170 AUDIO_DEVICE_LOG_ERR("g_aio_base is null.\n");
171 return;
172 }
173
174 *(volatile uint32_t *)((unsigned char *)(g_regAiaoBase) + (uint32_t)(offset)) = value;
175 }
176
AiaoSysPinMux(void)177 int32_t AiaoSysPinMux(void)
178 {
179 void *regIocfg3Base = OsalIoRemap(IOCFG3_BASE_ADDR, BASE_ADDR_REMAP_SIZE);
180 if (regIocfg3Base == NULL) {
181 AUDIO_DEVICE_LOG_ERR("regIocfg3Base is NULL.");
182 return HDF_FAILURE;
183 }
184
185 void *regGpioBase = OsalIoRemap(GPIO_BASE_ADDR, BASE_ADDR_REMAP_SIZE);
186 if (regGpioBase == NULL) {
187 OsalIoUnmap(regIocfg3Base);
188 AUDIO_DEVICE_LOG_ERR("regGpioBase is NULL.");
189 return HDF_FAILURE;
190 }
191
192 AUDIO_DEVICE_LOG_DEBUG("I2s0PinMuxAmpUnmute AmpUnmute");
193 SysWritel((uintptr_t)regIocfg3Base + I2S_IOCFG3_BASE1, I2S_IOCFG3_BASE1_VAL);
194 SysWritel((uintptr_t)regGpioBase + GPIO_BASE1, GPIO_BASE3_VAL);
195 SysWritel((uintptr_t)regGpioBase + GPIO_BASE2, GPIO_BASE2_VAL);
196 SysWritel((uintptr_t)regGpioBase + GPIO_BASE3, GPIO_BASE3_VAL);
197
198 OsalIoUnmap(regGpioBase);
199 OsalIoUnmap(regIocfg3Base);
200
201 return HDF_SUCCESS;
202 }
203
AipHalSetBufferAddr(uint32_t chnId,uint64_t value)204 static int32_t AipHalSetBufferAddr(uint32_t chnId, uint64_t value)
205 {
206 uint32_t saddr;
207
208 if (chnId >= HI3516_CHANNEL_ID_MAX) {
209 AUDIO_DEVICE_LOG_ERR("ai_dev%d is invalid!\n", chnId);
210 return HDF_FAILURE;
211 }
212
213 saddr = (uint32_t)(value & 0xffffffff);
214 AiaoHalWriteReg(AiopRegCfg(AIP_BUFF_SADDR_REG, OFFSET_MULTL, chnId), saddr); // buf start
215
216 return HDF_SUCCESS;
217 }
218
AipHalSetBuffWptr(uint32_t chnId,uint32_t value)219 int32_t AipHalSetBuffWptr(uint32_t chnId, uint32_t value)
220 {
221 UTxBuffWptr unTmp;
222
223 if (chnId >= HI3516_CHANNEL_ID_MAX) {
224 AUDIO_DEVICE_LOG_ERR("ao_dev%d is invalid!\n", chnId);
225 return HDF_FAILURE;
226 }
227 unTmp.u32 = AiaoHalReadReg(AiopRegCfg(AIP_BUFF_WPTR_REG, OFFSET_MULTL, chnId));
228 unTmp.Bits.txBuffWptr = value;
229 AiaoHalWriteReg(AiopRegCfg(AIP_BUFF_WPTR_REG, OFFSET_MULTL, chnId), unTmp.u32);
230
231 return HDF_SUCCESS;
232 }
233
AipHalSetBuffRptr(uint32_t chnId,uint32_t value)234 int32_t AipHalSetBuffRptr(uint32_t chnId, uint32_t value)
235 {
236 UTxBuffRptr unTmp;
237
238 if (chnId >= HI3516_AI_DEV_MAX_NUM) {
239 AUDIO_DEVICE_LOG_ERR("ai_dev%d is invalid!\n", chnId);
240 return HDF_FAILURE;
241 }
242
243 unTmp.u32 = AiaoHalReadReg(AiopRegCfg(AIP_BUFF_RPTR_REG, OFFSET_MULTL, chnId));
244 if (unTmp.Bits.txBuffRptr != value) {
245 unTmp.Bits.txBuffRptr = value;
246 AiaoHalWriteReg(AiopRegCfg(AIP_BUFF_RPTR_REG, OFFSET_MULTL, chnId), unTmp.u32);
247 }
248
249 return HDF_SUCCESS;
250 }
251
AipHalSetBufferSize(uint32_t chnId,uint32_t value)252 static int32_t AipHalSetBufferSize(uint32_t chnId, uint32_t value)
253 {
254 UTxBuffSize unTmp;
255
256 if (chnId >= HI3516_AO_DEV_MAX_NUM) {
257 AUDIO_DEVICE_LOG_ERR("ao_dev%d is invalid!\n", chnId);
258 return HDF_FAILURE;
259 }
260
261 unTmp.u32 = AiaoHalReadReg(AiopRegCfg(AIP_BUFF_SIZE_REG, OFFSET_MULTL, chnId));
262 unTmp.Bits.txBuffSize = value;
263 AiaoHalWriteReg(AiopRegCfg(AIP_BUFF_SIZE_REG, OFFSET_MULTL, chnId), unTmp.u32);
264
265 return HDF_SUCCESS;
266 }
267
AipHalSetTransSize(uint32_t chnId,uint32_t value)268 static int32_t AipHalSetTransSize(uint32_t chnId, uint32_t value)
269 {
270 UTxTransSize unTmp;
271
272 if (chnId >= HI3516_AO_DEV_MAX_NUM) {
273 AUDIO_DEVICE_LOG_ERR("ai_dev%d is invalid!\n", chnId);
274 return HDF_FAILURE;
275 }
276
277 unTmp.u32 = AiaoHalReadReg(AiopRegCfg(AIP_TRANS_SIZE_REG, OFFSET_MULTL, chnId));
278 unTmp.Bits.txTransSize = value;
279 AiaoHalWriteReg(AiopRegCfg(AIP_TRANS_SIZE_REG, OFFSET_MULTL, chnId), unTmp.u32);
280
281 return HDF_SUCCESS;
282 }
283
AipHalSetRxStart(uint32_t chnId,bool en)284 int32_t AipHalSetRxStart(uint32_t chnId, bool en)
285 {
286 URxDspCtrl unTmp;
287
288 if (chnId >= HI3516_AI_DEV_MAX_NUM) {
289 AUDIO_DEVICE_LOG_ERR("AipHalSetRxStart chnId %d is invalid!\n", chnId);
290 return -1;
291 }
292
293 unTmp.u32 = AiaoHalReadReg(AiopRegCfg(AIP_CTRL_REG, OFFSET_MULTL, chnId));
294
295 unTmp.Bits.rxDisableDone = 0;
296 unTmp.Bits.rxEnable = en;
297
298 AiaoHalWriteReg(AiopRegCfg(AIP_CTRL_REG, OFFSET_MULTL, chnId), unTmp.u32);
299
300 return 0;
301 }
302
AopSetCtrlReg(uint32_t chnId)303 static void AopSetCtrlReg(uint32_t chnId)
304 {
305 UTxDspCtrl aopCtrlReg;
306 aopCtrlReg.Bits.reserved0 = 0;
307 aopCtrlReg.Bits.volume = 0x79; /* 0db */
308 aopCtrlReg.Bits.txEnable = 0;
309 aopCtrlReg.Bits.reserved1 = 0;
310 aopCtrlReg.Bits.reserved2 = 0;
311
312 AiaoHalWriteReg(AiopRegCfg(AOP_CTRL_REG, OFFSET_MULTL, chnId), aopCtrlReg.u32);
313 AUDIO_DEVICE_LOG_DEBUG("[OHOS] AopSetCtrlReg AopSetAttrReg write = %08x\n", aopCtrlReg.u32);
314 }
315
AopHalSetBufferAddr(uint32_t chnId,uint64_t value)316 static int32_t AopHalSetBufferAddr(uint32_t chnId, uint64_t value)
317 {
318 uint32_t saddr;
319
320 if (chnId >= HI3516_CHANNEL_ID_MAX) {
321 AUDIO_DEVICE_LOG_ERR("ao_dev%d is invalid!\n", chnId);
322 return HDF_FAILURE;
323 }
324
325 saddr = (uint32_t)(value & 0xffffffff);
326 AiaoHalWriteReg(AiopRegCfg(AOP_BUFF_SADDR_REG, OFFSET_MULTL, chnId), saddr); // buf start
327
328 return HDF_SUCCESS;
329 }
330
AopHalSetBuffWptr(uint32_t chnId,uint32_t value)331 int32_t AopHalSetBuffWptr(uint32_t chnId, uint32_t value)
332 {
333 UTxBuffWptr unTmp;
334
335 if (chnId >= HI3516_CHANNEL_ID_MAX) {
336 AUDIO_DEVICE_LOG_ERR("ao_dev%d is invalid!\n", chnId);
337 return HDF_FAILURE;
338 }
339
340 unTmp.u32 = AiaoHalReadReg(AiopRegCfg(AOP_BUFF_WPTR_REG, OFFSET_MULTL, chnId));
341 unTmp.Bits.txBuffWptr = value;
342 AiaoHalWriteReg(AiopRegCfg(AOP_BUFF_WPTR_REG, OFFSET_MULTL, chnId), unTmp.u32);
343
344 return HDF_SUCCESS;
345 }
346
AopHalSetBuffRptr(uint32_t chnId,uint32_t value)347 int32_t AopHalSetBuffRptr(uint32_t chnId, uint32_t value)
348 {
349 UTxBuffRptr unTmp;
350
351 if (chnId >= HI3516_CHANNEL_ID_MAX) {
352 AUDIO_DEVICE_LOG_ERR("ao_dev%d is invalid!\n", chnId);
353 return HDF_FAILURE;
354 }
355
356 unTmp.u32 = AiaoHalReadReg(AiopRegCfg(AOP_BUFF_RPTR_REG, OFFSET_MULTL, chnId));
357
358 unTmp.Bits.txBuffRptr = value;
359 AiaoHalWriteReg(AiopRegCfg(AOP_BUFF_RPTR_REG, OFFSET_MULTL, chnId), unTmp.u32);
360 return HDF_SUCCESS;
361 }
362
AopHalSetBufferSize(uint32_t chnId,uint32_t value)363 static int32_t AopHalSetBufferSize(uint32_t chnId, uint32_t value)
364 {
365 UTxBuffSize unTmp;
366
367 if (chnId >= HI3516_AO_DEV_MAX_NUM) {
368 AUDIO_DEVICE_LOG_ERR("ao_dev%d is invalid!\n", chnId);
369 return HDF_FAILURE;
370 }
371
372 unTmp.u32 = AiaoHalReadReg(AiopRegCfg(AOP_BUFF_SIZE_REG, OFFSET_MULTL, chnId));
373
374 unTmp.Bits.txBuffSize = value;
375 AiaoHalWriteReg(AiopRegCfg(AOP_BUFF_SIZE_REG, OFFSET_MULTL, chnId), unTmp.u32);
376
377 return HDF_SUCCESS;
378 }
379
AopHalSetTransSize(uint32_t chnId,uint32_t value)380 static int32_t AopHalSetTransSize(uint32_t chnId, uint32_t value)
381 {
382 UTxTransSize unTmp;
383
384 if (chnId >= HI3516_AO_DEV_MAX_NUM) {
385 AUDIO_DEVICE_LOG_ERR("ao_dev%d is invalid!\n", chnId);
386 return HDF_FAILURE;
387 }
388
389 unTmp.u32 = AiaoHalReadReg(AiopRegCfg(AOP_TRANS_SIZE_REG, OFFSET_MULTL, chnId));
390
391 unTmp.Bits.txTransSize = value;
392 AiaoHalWriteReg(AiopRegCfg(AOP_TRANS_SIZE_REG, OFFSET_MULTL, chnId), unTmp.u32);
393
394 return HDF_SUCCESS;
395 }
396
AopHalSetTxStart(uint32_t chnId,bool en)397 int32_t AopHalSetTxStart(uint32_t chnId, bool en)
398 {
399 UTxDspCtrl unTmp;
400
401 if (chnId >= HI3516_AO_DEV_MAX_NUM) {
402 AUDIO_DEVICE_LOG_ERR("ao_dev%d is invalid!\n", chnId);
403 return HDF_FAILURE;
404 }
405
406 unTmp.u32 = AiaoHalReadReg(AiopRegCfg(AOP_CTRL_REG, OFFSET_MULTL, chnId));
407 unTmp.Bits.txEnable = en;
408
409 AiaoHalWriteReg(AiopRegCfg(AOP_CTRL_REG, OFFSET_MULTL, chnId), unTmp.u32);
410
411 return HDF_SUCCESS;
412 }
413
AopHalDevEnable(uint32_t chnId)414 int32_t AopHalDevEnable(uint32_t chnId)
415 {
416 int ret = AopHalSetTxStart(chnId, HI_TRUE);
417 if (ret != HDF_SUCCESS) {
418 return HDF_FAILURE;
419 }
420 return HDF_SUCCESS;
421 }
422
AiaoGetBclkFsclk(const uint32_t fsBit,const uint32_t rate,const int32_t mclkSel,int32_t * bclkSel,int32_t * lrclkSel)423 static int32_t AiaoGetBclkFsclk(const uint32_t fsBit, const uint32_t rate,
424 const int32_t mclkSel, int32_t *bclkSel, int32_t *lrclkSel)
425 {
426 int32_t ret;
427 uint32_t mclkRateNum;
428 const int aioFifoBitWidth256 = 256; // 256 is aiao fifo bit width
429 const int aioFifoBitWidth320 = 320; // 320 is aiao fifo bit width
430
431 if (g_aioClkInfo.mclkDiv48k256fs == mclkSel) {
432 mclkRateNum = AUDIO_SAMPLE_RATE_48000 * aioFifoBitWidth256;
433 } else if (g_aioClkInfo.mclkDiv32k256fs == mclkSel) {
434 mclkRateNum = AUDIO_SAMPLE_RATE_32000 * aioFifoBitWidth256;
435 } else if (g_aioClkInfo.mclkDiv441k256fs == mclkSel) {
436 mclkRateNum = AUDIO_SAMPLE_RATE_44100 * aioFifoBitWidth256;
437 } else if (g_aioClkInfo.mclkDiv48k320fs == mclkSel) {
438 mclkRateNum = AUDIO_SAMPLE_RATE_48000 * aioFifoBitWidth320;
439 } else if (g_aioClkInfo.mclkDiv32k320fs == mclkSel) {
440 mclkRateNum = AUDIO_SAMPLE_RATE_32000 * aioFifoBitWidth320;
441 } else if (g_aioClkInfo.mclkDiv441k320fs == mclkSel) {
442 mclkRateNum = AUDIO_SAMPLE_RATE_44100 * aioFifoBitWidth320;
443 } else {
444 AUDIO_DEVICE_LOG_ERR("not support this mclk\n");
445 return HDF_FAILURE;
446 }
447
448 if ((mclkRateNum % (fsBit * rate)) != 0) {
449 AUDIO_DEVICE_LOG_ERR("can not get the bclkDivision ratio\n");
450 return HDF_FAILURE;
451 }
452
453 ret = AiaoGetBclkSel(mclkRateNum / (fsBit * rate), bclkSel);
454 if (ret != HDF_SUCCESS) {
455 AUDIO_DEVICE_LOG_ERR("AiaoGetBclkSel error\n");
456 return ret;
457 }
458
459 ret = AiaoGetLrclkSel(fsBit, lrclkSel);
460
461 return ret;
462 }
463
AiaoGetMclk(uint32_t rate,uint32_t * mclkSel)464 int32_t AiaoGetMclk(uint32_t rate, uint32_t *mclkSel)
465 {
466 if (mclkSel == NULL) {
467 AUDIO_DEVICE_LOG_ERR("mclkSel is null");
468 return HDF_FAILURE;
469 }
470 switch (rate) {
471 case AUDIO_SAMPLE_RATE_8000:
472 case AUDIO_SAMPLE_RATE_16000:
473 case AUDIO_SAMPLE_RATE_32000:
474 case AUDIO_SAMPLE_RATE_64000: {
475 *mclkSel = g_aioClkInfo.mclkDiv32k256fs;
476 break;
477 }
478
479 case AUDIO_SAMPLE_RATE_12000:
480 case AUDIO_SAMPLE_RATE_24000:
481 case AUDIO_SAMPLE_RATE_48000:
482 case AUDIO_SAMPLE_RATE_96000: {
483 *mclkSel = g_aioClkInfo.mclkDiv48k256fs;
484 break;
485 }
486
487 case AUDIO_SAMPLE_RATE_11025:
488 case AUDIO_SAMPLE_RATE_22050:
489 case AUDIO_SAMPLE_RATE_44100: {
490 *mclkSel = g_aioClkInfo.mclkDiv441k256fs;
491 break;
492 }
493
494 default: {
495 AUDIO_DEVICE_LOG_ERR("not support this sample rate\n");
496 return HDF_FAILURE;
497 }
498 }
499
500 return HDF_SUCCESS;
501 }
502
AiaoGetBitCnt(uint32_t bitWidth)503 static uint32_t AiaoGetBitCnt(uint32_t bitWidth)
504 {
505 if (bitWidth == BIT_WIDTH8) {
506 return BIT_WIDTH8; /* 8:8bit */
507 } else if (bitWidth == BIT_WIDTH16) {
508 return BIT_WIDTH16; /* 16:16bit */
509 } else {
510 return BIT_WIDTH32; /* 32:32bit */
511 }
512 }
513
AiaoSetSysCtlRegValue(uint32_t mclkSel,uint32_t bitWidth,uint32_t rate,uint32_t * clkRegVal)514 int32_t AiaoSetSysCtlRegValue(uint32_t mclkSel, uint32_t bitWidth, uint32_t rate, uint32_t *clkRegVal)
515 {
516 int32_t ret;
517 uint32_t fsBit;
518 uint32_t bclkSel;
519 uint32_t lrClkSel;
520
521 if (clkRegVal == NULL) {
522 AUDIO_DEVICE_LOG_ERR("param is nullptr.");
523 return HDF_ERR_INVALID_PARAM;
524 }
525 fsBit = AiaoGetBitCnt(bitWidth) * 2; // 2 is bit width
526 (void)memset_s(&bclkSel, sizeof(uint32_t), 0, sizeof(uint32_t));
527 (void)memset_s(&lrClkSel, sizeof(uint32_t), 0, sizeof(uint32_t));
528 ret = AiaoGetBclkFsclk(fsBit, rate, mclkSel, &bclkSel, &lrClkSel);
529 if (ret != HDF_SUCCESS) {
530 AUDIO_DEVICE_LOG_ERR("AiaoGetBclkFsclk fail");
531 return HDF_FAILURE;
532 }
533
534 *clkRegVal = bclkSel | (lrClkSel << 4); /* 4:left shift 4 bit */
535
536 return HDF_SUCCESS;
537 }
538
AipSetCtrlReg(uint32_t chnId)539 static void AipSetCtrlReg(uint32_t chnId)
540 {
541 URxDspCtrl aipCtrlReg;
542 aipCtrlReg.Bits.reserved0 = 0;
543 aipCtrlReg.Bits.rxEnable = 0;
544 aipCtrlReg.Bits.rxDisableDone = 0;
545 aipCtrlReg.Bits.reserved1 = 0;
546 AiaoHalWriteReg(AiopRegCfg(AIP_CTRL_REG, OFFSET_MULTL, chnId), aipCtrlReg.u32);
547 }
548
AiaoRxIntClr(uint32_t chnId)549 int32_t AiaoRxIntClr(uint32_t chnId)
550 {
551 const uint32_t rxTransIntClear = 0x1;
552 AiaoHalWriteReg(AiopRegCfg(RX_INT_CLR, OFFSET_MULTL, chnId), rxTransIntClear);
553 return HDF_SUCCESS;
554 }
555
AiaoDeviceInit(uint32_t chnId)556 int32_t AiaoDeviceInit(uint32_t chnId)
557 {
558 AiaoHalWriteReg(AiopRegCfg(AIP_INF_ATTRI_REG, OFFSET_MULTL, chnId), AI_ATTR_INIT_VAL);
559 AiaoHalWriteReg(AiopRegCfg(AOP_INF_ATTRI_REG, OFFSET_MULTL, chnId), AO_ATTR_INIT_VAL);
560 AopSetCtrlReg(chnId);
561 AipSetCtrlReg(chnId);
562
563 AiaoHalWriteReg(AiopRegCfg(AIAO_INT_ENA, OFFSET_MULTL, chnId), RX_CHO_INT_ENA);
564 AiaoHalWriteReg(AiopRegCfg(RX_INT_ENA, OFFSET_MULTL, chnId), RX_INT_ENA_VAL);
565 return HDF_SUCCESS;
566 }
567
AudioAoInit(const struct PlatformData * platformData)568 int32_t AudioAoInit(const struct PlatformData *platformData)
569 {
570 int ret;
571
572 if (platformData == NULL || platformData->renderBufInfo.phyAddr == 0) {
573 AUDIO_DEVICE_LOG_ERR("input param is NULL.");
574 return HDF_FAILURE;
575 }
576
577 ret = AopHalSetBufferAddr(0, platformData->renderBufInfo.phyAddr);
578 if (ret != HDF_SUCCESS) {
579 AUDIO_DEVICE_LOG_ERR("AopHalSetBufferAddr fail.");
580 return HDF_FAILURE;
581 }
582
583 ret = AopHalSetBufferSize(0, platformData->renderBufInfo.cirBufSize);
584 if (ret != HDF_SUCCESS) {
585 AUDIO_DEVICE_LOG_ERR("AopHalSetBufferSize: failed.");
586 return HDF_FAILURE;
587 }
588
589 ret = AopHalSetTransSize(0, platformData->renderBufInfo.trafBufSize);
590 if (ret != HDF_SUCCESS) {
591 AUDIO_DEVICE_LOG_ERR("AopHalSetTransSize fail");
592 return HDF_FAILURE;
593 }
594
595 return HDF_SUCCESS;
596 }
597
AudioAiInit(const struct PlatformData * platformData)598 int32_t AudioAiInit(const struct PlatformData *platformData)
599 {
600 int ret;
601 if (platformData == NULL || platformData->captureBufInfo.phyAddr == 0) {
602 AUDIO_DEVICE_LOG_ERR("input param is NULL.");
603 return HDF_FAILURE;
604 }
605
606 ret = AipHalSetBufferAddr(0, platformData->captureBufInfo.phyAddr);
607 if (ret != HDF_SUCCESS) {
608 AUDIO_DEVICE_LOG_ERR("AipHalSetBufferAddr: failed.");
609 return HDF_FAILURE;
610 }
611
612 ret = AipHalSetBufferSize(0, platformData->captureBufInfo.cirBufSize);
613 if (ret != HDF_SUCCESS) {
614 AUDIO_DEVICE_LOG_ERR("AipHalSetBufferSize: failed.");
615 return HDF_FAILURE;
616 }
617
618 AUDIO_DEVICE_LOG_DEBUG("trafBufSize = 0x%x", platformData->captureBufInfo.trafBufSize);
619
620 ret = AipHalSetTransSize(0, platformData->captureBufInfo.trafBufSize);
621 if (ret != HDF_SUCCESS) {
622 AUDIO_DEVICE_LOG_ERR("AipHalSetTransSize fail.");
623 return HDF_FAILURE;
624 }
625 return HDF_SUCCESS;
626 }
627