1 /* 2 * 'Standard' SDIO HOST CONTROLLER driver 3 * 4 * Copyright (C) 1999-2019, Broadcom. 5 * 6 * Unless you and Broadcom execute a separate written software license 7 * agreement governing use of this software, this software is licensed to you 8 * under the terms of the GNU General Public License version 2 (the "GPL"), 9 * available at http://www.broadcom.com/licenses/GPLv2.php, with the 10 * following added to such license: 11 * 12 * As a special exception, the copyright holders of this software give you 13 * permission to link this software with independent modules, and to copy and 14 * distribute the resulting executable under terms of your choice, provided that 15 * you also meet, for each linked independent module, the terms and conditions 16 * of the license of that module. An independent module is a module which is 17 * not derived from this software. The special exception does not apply to any 18 * modifications of the software. 19 * 20 * Notwithstanding the above, under no circumstances may you combine this 21 * software in any way with any other Broadcom software provided under a license 22 * other than the GPL, without Broadcom's express prior written consent. 23 * 24 * 25 * <<Broadcom-WL-IPTag/Open:>> 26 * 27 * $Id: bcmsdstd.h 768214 2018-06-19 03:53:58Z $ 28 */ 29 #ifndef _BCM_SD_STD_H 30 #define _BCM_SD_STD_H 31 32 /* global msglevel for debug messages - bitvals come from sdiovar.h */ 33 #define sd_err(x) \ 34 do { \ 35 if (sd_msglevel & SDH_ERROR_VAL) \ 36 printf x; \ 37 } while (0) 38 #define sd_trace(x) 39 #define sd_info(x) 40 #define sd_debug(x) 41 #define sd_data(x) 42 #define sd_ctrl(x) 43 #define sd_dma(x) 44 45 #define sd_sync_dma(sd, read, nbytes) 46 #define sd_init_dma(sd) 47 #define sd_ack_intr(sd) 48 #define sd_wakeup(sd) ; 49 /* Allocate/init/free per-OS private data */ 50 extern int sdstd_osinit(sdioh_info_t *sd); 51 extern void sdstd_osfree(sdioh_info_t *sd); 52 53 #define sd_log(x) 54 55 #define SDIOH_ASSERT(exp) \ 56 do { \ 57 if (!(exp)) \ 58 printf("!!!ASSERT fail: file %s lines %d", __FILE__, __LINE__); \ 59 } while (0) 60 61 #define BLOCK_SIZE_4318 64 62 #define BLOCK_SIZE_4328 512 63 64 /* internal return code */ 65 #define SUCCESS 0 66 #define ERROR 1 67 68 /* private bus modes */ 69 #define SDIOH_MODE_SPI 0 70 #define SDIOH_MODE_SD1 1 71 #define SDIOH_MODE_SD4 2 72 73 #define MAX_SLOTS 6 /* For PCI: Only 6 BAR entries => 6 slots */ 74 #define SDIOH_REG_WINSZ \ 75 0x100 /* Number of registers in Standard Host Controller */ 76 77 #define SDIOH_TYPE_ARASAN_HDK 1 78 #define SDIOH_TYPE_BCM27XX 2 79 #define SDIOH_TYPE_TI_PCIXX21 4 /* TI PCIxx21 Standard Host Controller */ 80 #define SDIOH_TYPE_RICOH_R5C822 \ 81 5 /* Ricoh Co Ltd R5C822 SD/SDIO/MMC/MS/MSPro Host Adapter */ 82 #define SDIOH_TYPE_JMICRON 6 /* JMicron Standard SDIO Host Controller */ 83 84 /* For linux, allow yielding for dongle */ 85 #define BCMSDYIELD 86 87 /* Expected card status value for CMD7 */ 88 #define SDIOH_CMD7_EXP_STATUS 0x00001E00 89 90 #define RETRIES_LARGE 100000 91 #define sdstd_os_yield(sd) \ 92 do { \ 93 } while (0) 94 #define RETRIES_SMALL 100 95 96 #define USE_BLOCKMODE 0x2 /* Block mode can be single block or multi */ 97 #define USE_MULTIBLOCK 0x4 98 99 #define USE_FIFO 0x8 /* Fifo vs non-fifo */ 100 101 #define CLIENT_INTR 0x100 /* Get rid of this! */ 102 103 #define HC_INTR_RETUNING 0x1000 104 105 #ifdef BCMSDIOH_TXGLOM 106 /* Total glom pkt can not exceed 64K 107 * need one more slot for glom padding packet 108 */ 109 #define SDIOH_MAXGLOM_SIZE (40 + 1) 110 111 typedef struct glom_buf { 112 uint32 count; /* Total number of pkts queued */ 113 void *dma_buf_arr[SDIOH_MAXGLOM_SIZE]; /* Frame address */ 114 ulong dma_phys_arr[SDIOH_MAXGLOM_SIZE]; /* DMA_MAPed address of frames */ 115 uint16 nbytes[SDIOH_MAXGLOM_SIZE]; /* Size of each frame */ 116 } glom_buf_t; 117 #endif // endif 118 119 struct sdioh_info { 120 uint cfg_bar; /* pci cfg address for bar */ 121 uint32 caps; /* cached value of capabilities reg */ 122 uint32 curr_caps; /* max current capabilities reg */ 123 124 osl_t *osh; /* osh handler */ 125 volatile char *mem_space; /* pci device memory va */ 126 uint lockcount; /* nest count of sdstd_lock() calls */ 127 bool client_intr_enabled; /* interrupt connnected flag */ 128 bool intr_handler_valid; /* client driver interrupt handler valid */ 129 sdioh_cb_fn_t intr_handler; /* registered interrupt handler */ 130 void *intr_handler_arg; /* argument to call interrupt handler */ 131 bool initialized; /* card initialized */ 132 uint target_dev; /* Target device ID */ 133 uint16 intmask; /* Current active interrupts */ 134 void *sdos_info; /* Pointer to per-OS private data */ 135 void *bcmsdh; /* handler to upper layer stack (bcmsdh) */ 136 137 uint32 controller_type; /* Host controller type */ 138 uint8 version; /* Host Controller Spec Compliance Version */ 139 uint irq; /* Client irq */ 140 int intrcount; /* Client interrupts */ 141 int local_intrcount; /* Controller interrupts */ 142 bool host_init_done; /* Controller initted */ 143 bool card_init_done; /* Client SDIO interface initted */ 144 bool polled_mode; /* polling for command completion */ 145 146 bool sd_blockmode; /* sd_blockmode == FALSE => 64 Byte Cmd 53s. */ 147 /* Must be on for sd_multiblock to be effective */ 148 bool use_client_ints; /* If this is false, make sure to restore */ 149 /* polling hack in wl_linux.c:wl_timer() */ 150 int adapter_slot; /* Maybe dealing with multiple slots/controllers */ 151 int sd_mode; /* SD1/SD4/SPI */ 152 int client_block_size[SDIOD_MAX_IOFUNCS]; /* Blocksize */ 153 uint32 data_xfer_count; /* Current transfer */ 154 uint16 card_rca; /* Current Address */ 155 int8 sd_dma_mode; /* DMA Mode (PIO, SDMA, ... ADMA2) on CMD53 */ 156 uint8 num_funcs; /* Supported funcs on client */ 157 uint32 com_cis_ptr; 158 uint32 func_cis_ptr[SDIOD_MAX_IOFUNCS]; 159 void *dma_buf; /* DMA Buffer virtual address */ 160 ulong dma_phys; /* DMA Buffer physical address */ 161 void *adma2_dscr_buf; /* ADMA2 Descriptor Buffer virtual address */ 162 ulong adma2_dscr_phys; /* ADMA2 Descriptor Buffer physical address */ 163 164 /* adjustments needed to make the dma align properly */ 165 void *dma_start_buf; 166 ulong dma_start_phys; 167 uint alloced_dma_size; 168 void *adma2_dscr_start_buf; 169 ulong adma2_dscr_start_phys; 170 uint alloced_adma2_dscr_size; 171 172 int r_cnt; /* rx count */ 173 int t_cnt; /* tx_count */ 174 bool got_hcint; /* local interrupt flag */ 175 uint16 last_intrstatus; /* to cache intrstatus */ 176 int host_UHSISupported; /* whether UHSI is supported for HC. */ 177 int card_UHSI_voltage_Supported; /* whether UHSI is supported for 178 * Card in terms of Voltage [1.8 or 3.3]. 179 */ 180 int global_UHSI_Supp; /* type of UHSI support in both host and card. 181 * HOST_SDR_UNSUPP: capabilities not supported/matched 182 * HOST_SDR_12_25: SDR12 and SDR25 supported 183 * HOST_SDR_50_104_DDR: one of SDR50/SDR104 or DDR50 184 * supptd 185 */ 186 volatile int 187 sd3_dat_state; /* data transfer state used for retuning check */ 188 volatile int sd3_tun_state; /* tuning state used for retuning check */ 189 bool sd3_tuning_reqd; /* tuning requirement parameter */ 190 bool sd3_tuning_disable; /* tuning disable due to bus sleeping */ 191 uint32 caps3; /* cached value of 32 MSbits capabilities reg (SDIO 3.0) */ 192 #ifdef BCMSDIOH_TXGLOM 193 glom_buf_t glom_info; /* pkt information used for glomming */ 194 uint txglom_mode; /* Txglom mode: 0 - copy, 1 - multi-descriptor */ 195 #endif // endif 196 }; 197 198 #define DMA_MODE_NONE 0 199 #define DMA_MODE_SDMA 1 200 #define DMA_MODE_ADMA1 2 201 #define DMA_MODE_ADMA2 3 202 #define DMA_MODE_ADMA2_64 4 203 #define DMA_MODE_AUTO -1 204 205 #define USE_DMA(sd) ((bool)((sd->sd_dma_mode > 0) ? TRUE : FALSE)) 206 207 /* States for Tuning and corr data */ 208 #define TUNING_IDLE 0 209 #define TUNING_START 1 210 #define TUNING_START_AFTER_DAT 2 211 #define TUNING_ONGOING 3 212 213 #define DATA_TRANSFER_IDLE 0 214 #define DATA_TRANSFER_ONGOING 1 215 216 #define CHECK_TUNING_PRE_DATA 1 217 #define CHECK_TUNING_POST_DATA 2 218 219 #ifdef DHD_DEBUG 220 #define SD_DHD_DISABLE_PERIODIC_TUNING 0x01 221 #define SD_DHD_ENABLE_PERIODIC_TUNING 0x00 222 #endif // endif 223 224 /************************************************************ 225 * Internal interfaces: per-port references into bcmsdstd.c 226 */ 227 228 /* Global message bits */ 229 extern uint sd_msglevel; 230 231 /* OS-independent interrupt handler */ 232 extern bool check_client_intr(sdioh_info_t *sd); 233 234 /* Core interrupt enable/disable of device interrupts */ 235 extern void sdstd_devintr_on(sdioh_info_t *sd); 236 extern void sdstd_devintr_off(sdioh_info_t *sd); 237 238 /* Enable/disable interrupts for local controller events */ 239 extern void sdstd_intrs_on(sdioh_info_t *sd, uint16 norm, uint16 err); 240 extern void sdstd_intrs_off(sdioh_info_t *sd, uint16 norm, uint16 err); 241 242 /* Wait for specified interrupt and error bits to be set */ 243 extern void sdstd_spinbits(sdioh_info_t *sd, uint16 norm, uint16 err); 244 245 /************************************************************** 246 * Internal interfaces: bcmsdstd.c references to per-port code 247 */ 248 249 /* Register mapping routines */ 250 extern uint32 *sdstd_reg_map(osl_t *osh, ulong addr, int size); 251 extern void sdstd_reg_unmap(osl_t *osh, ulong addr, int size); 252 253 /* Interrupt (de)registration routines */ 254 extern int sdstd_register_irq(sdioh_info_t *sd, uint irq); 255 extern void sdstd_free_irq(uint irq, sdioh_info_t *sd); 256 257 /* OS-specific interrupt wrappers (atomic interrupt enable/disable) */ 258 extern void sdstd_lock(sdioh_info_t *sd); 259 extern void sdstd_unlock(sdioh_info_t *sd); 260 extern void sdstd_waitlockfree(sdioh_info_t *sd); 261 262 /* OS-specific wrappers for safe concurrent register access */ 263 extern void sdstd_os_lock_irqsave(sdioh_info_t *sd, ulong *flags); 264 extern void sdstd_os_unlock_irqrestore(sdioh_info_t *sd, ulong *flags); 265 266 /* OS-specific wait-for-interrupt-or-status */ 267 extern int sdstd_waitbits(sdioh_info_t *sd, uint16 norm, uint16 err, bool yield, 268 uint16 *bits); 269 270 /* used by bcmsdstd_linux [implemented in sdstd] */ 271 extern void sdstd_3_enable_retuning_int(sdioh_info_t *sd); 272 extern void sdstd_3_disable_retuning_int(sdioh_info_t *sd); 273 extern bool sdstd_3_is_retuning_int_set(sdioh_info_t *sd); 274 extern void sdstd_3_check_and_do_tuning(sdioh_info_t *sd, int tuning_param); 275 extern bool sdstd_3_check_and_set_retuning(sdioh_info_t *sd); 276 extern int sdstd_3_get_tune_state(sdioh_info_t *sd); 277 extern int sdstd_3_get_data_state(sdioh_info_t *sd); 278 extern void sdstd_3_set_tune_state(sdioh_info_t *sd, int state); 279 extern void sdstd_3_set_data_state(sdioh_info_t *sd, int state); 280 extern uint8 sdstd_3_get_tuning_exp(sdioh_info_t *sd); 281 extern uint32 sdstd_3_get_uhsi_clkmode(sdioh_info_t *sd); 282 extern int sdstd_3_clk_tuning(sdioh_info_t *sd, uint32 sd3ClkMode); 283 284 /* used by sdstd [implemented in bcmsdstd_linux/ndis] */ 285 extern void sdstd_3_start_tuning(sdioh_info_t *sd); 286 extern void sdstd_3_osinit_tuning(sdioh_info_t *sd); 287 extern void sdstd_3_osclean_tuning(sdioh_info_t *sd); 288 289 extern void sdstd_enable_disable_periodic_timer(sdioh_info_t *sd, uint val); 290 291 extern sdioh_info_t *sdioh_attach(osl_t *osh, void *bar0, uint irq); 292 extern SDIOH_API_RC sdioh_detach(osl_t *osh, sdioh_info_t *sd); 293 #endif /* _BCM_SD_STD_H */ 294