1 /* 2 * SD-SPI Protocol Conversion - BCMSDH->gSPI Translation Layer 3 * 4 * Copyright (C) 1999-2019, Broadcom. 5 * 6 * Unless you and Broadcom execute a separate written software license 7 * agreement governing use of this software, this software is licensed to you 8 * under the terms of the GNU General Public License version 2 (the "GPL"), 9 * available at http://www.broadcom.com/licenses/GPLv2.php, with the 10 * following added to such license: 11 * 12 * As a special exception, the copyright holders of this software give you 13 * permission to link this software with independent modules, and to copy and 14 * distribute the resulting executable under terms of your choice, provided that 15 * you also meet, for each linked independent module, the terms and conditions 16 * of the license of that module. An independent module is a module which is 17 * not derived from this software. The special exception does not apply to any 18 * modifications of the software. 19 * 20 * Notwithstanding the above, under no circumstances may you combine this 21 * software in any way with any other Broadcom software provided under a license 22 * other than the GPL, without Broadcom's express prior written consent. 23 * 24 * 25 * <<Broadcom-WL-IPTag/Open:>> 26 * 27 * $Id: bcmspibrcm.h 514727 2014-11-12 03:02:48Z $ 28 */ 29 #ifndef _BCM_SPI_BRCM_H 30 #define _BCM_SPI_BRCM_H 31 32 #ifndef SPI_MAX_IOFUNCS 33 /* Maximum number of I/O funcs */ 34 #define SPI_MAX_IOFUNCS 4 35 #endif // endif 36 /* global msglevel for debug messages - bitvals come from sdiovar.h */ 37 38 #if defined(DHD_DEBUG) 39 #define sd_err(x) \ 40 do { \ 41 if (sd_msglevel & SDH_ERROR_VAL) \ 42 printf x; \ 43 } while (0) 44 #define sd_trace(x) \ 45 do { \ 46 if (sd_msglevel & SDH_TRACE_VAL) \ 47 printf x; \ 48 } while (0) 49 #define sd_info(x) \ 50 do { \ 51 if (sd_msglevel & SDH_INFO_VAL) \ 52 printf x; \ 53 } while (0) 54 #define sd_debug(x) \ 55 do { \ 56 if (sd_msglevel & SDH_DEBUG_VAL) \ 57 printf x; \ 58 } while (0) 59 #define sd_data(x) \ 60 do { \ 61 if (sd_msglevel & SDH_DATA_VAL) \ 62 printf x; \ 63 } while (0) 64 #define sd_ctrl(x) \ 65 do { \ 66 if (sd_msglevel & SDH_CTRL_VAL) \ 67 printf x; \ 68 } while (0) 69 #else 70 #define sd_err(x) 71 #define sd_trace(x) 72 #define sd_info(x) 73 #define sd_debug(x) 74 #define sd_data(x) 75 #define sd_ctrl(x) 76 #endif // endif 77 78 #define sd_log(x) 79 80 #define SDIOH_ASSERT(exp) \ 81 do { \ 82 if (!(exp)) \ 83 printf("!!!ASSERT fail: file %s lines %d", __FILE__, __LINE__); \ 84 } while (0) 85 86 #define BLOCK_SIZE_F1 64 87 #define BLOCK_SIZE_F2 2048 88 #define BLOCK_SIZE_F3 2048 89 90 /* internal return code */ 91 #define SUCCESS 0 92 #undef ERROR 93 #define ERROR 1 94 #define ERROR_UF 2 95 #define ERROR_OF 3 96 97 /* private bus modes */ 98 #define SDIOH_MODE_SPI 0 99 100 #define USE_BLOCKMODE 0x2 /* Block mode can be single block or multi */ 101 #define USE_MULTIBLOCK 0x4 102 103 struct sdioh_info { 104 uint cfg_bar; /* pci cfg address for bar */ 105 uint32 caps; /* cached value of capabilities reg */ 106 #ifndef BCMSPI_ANDROID 107 void *bar0; /* BAR0 for PCI Device */ 108 #endif /* !BCMSPI_ANDROID */ 109 osl_t *osh; /* osh handler */ 110 void *controller; /* Pointer to SPI Controller's private data struct */ 111 uint lockcount; /* nest count of spi_lock() calls */ 112 bool client_intr_enabled; /* interrupt connnected flag */ 113 bool intr_handler_valid; /* client driver interrupt handler valid */ 114 sdioh_cb_fn_t intr_handler; /* registered interrupt handler */ 115 void *intr_handler_arg; /* argument to call interrupt handler */ 116 bool initialized; /* card initialized */ 117 uint32 target_dev; /* Target device ID */ 118 uint32 intmask; /* Current active interrupts */ 119 void *sdos_info; /* Pointer to per-OS private data */ 120 uint32 controller_type; /* Host controller type */ 121 uint8 version; /* Host Controller Spec Compliance Version */ 122 uint irq; /* Client irq */ 123 uint32 intrcount; /* Client interrupts */ 124 uint32 local_intrcount; /* Controller interrupts */ 125 bool host_init_done; /* Controller initted */ 126 bool card_init_done; /* Client SDIO interface initted */ 127 bool polled_mode; /* polling for command completion */ 128 129 bool sd_use_dma; /* DMA on CMD53 */ 130 bool sd_blockmode; /* sd_blockmode == FALSE => 64 Byte Cmd 53s. */ 131 /* Must be on for sd_multiblock to be effective */ 132 bool use_client_ints; /* If this is false, make sure to restore */ 133 /* polling hack in wl_linux.c:wl_timer() */ 134 int adapter_slot; /* Maybe dealing with multiple slots/controllers */ 135 int sd_mode; /* SD1/SD4/SPI */ 136 int client_block_size[SPI_MAX_IOFUNCS]; /* Blocksize */ 137 uint32 data_xfer_count; /* Current transfer */ 138 uint16 card_rca; /* Current Address */ 139 uint8 num_funcs; /* Supported funcs on client */ 140 uint32 card_dstatus; /* 32bit device status */ 141 uint32 com_cis_ptr; 142 uint32 func_cis_ptr[SPI_MAX_IOFUNCS]; 143 void *dma_buf; 144 ulong dma_phys; 145 int r_cnt; /* rx count */ 146 int t_cnt; /* tx_count */ 147 uint32 wordlen; /* host processor 16/32bits */ 148 uint32 prev_fun; 149 uint32 chip; 150 uint32 chiprev; 151 bool resp_delay_all; 152 bool dwordmode; 153 bool resp_delay_new; 154 155 struct spierrstats_t spierrstats; 156 }; 157 158 /************************************************************ 159 * Internal interfaces: per-port references into bcmspibrcm.c 160 */ 161 162 /* Global message bits */ 163 extern uint sd_msglevel; 164 165 /************************************************************** 166 * Internal interfaces: bcmspibrcm.c references to per-port code 167 */ 168 169 /* Interrupt (de)registration routines */ 170 extern int spi_register_irq(sdioh_info_t *sd, uint irq); 171 extern void spi_free_irq(uint irq, sdioh_info_t *sd); 172 173 /* OS-specific interrupt wrappers (atomic interrupt enable/disable) */ 174 extern void spi_lock(sdioh_info_t *sd); 175 extern void spi_unlock(sdioh_info_t *sd); 176 177 /* Allocate/init/free per-OS private data */ 178 extern int spi_osinit(sdioh_info_t *sd); 179 extern void spi_osfree(sdioh_info_t *sd); 180 181 #define SPI_RW_FLAG_M BITFIELD_MASK(1) /* Bit [31] - R/W Command Bit */ 182 #define SPI_RW_FLAG_S 31 183 #define SPI_ACCESS_M BITFIELD_MASK(1) /* Bit [30] - Fixed/Incr Access */ 184 #define SPI_ACCESS_S 30 185 #define SPI_FUNCTION_M BITFIELD_MASK(2) /* Bit [29:28] - Function Number */ 186 #define SPI_FUNCTION_S 28 187 #define SPI_REG_ADDR_M BITFIELD_MASK(17) /* Bit [27:11] - Address */ 188 #define SPI_REG_ADDR_S 11 189 #define SPI_LEN_M BITFIELD_MASK(11) /* Bit [10:0] - Packet length */ 190 #define SPI_LEN_S 0 191 192 #endif /* _BCM_SPI_BRCM_H */ 193