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1 /*
2  * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved.
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *   http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 /******************************************************************************
18  * @file     devices.c
19  * @brief    source file for the devices
20  * @version  V1.0
21  * @date     02. June 2017
22  ******************************************************************************/
23 #include "soc.h"
24 #include <csi_config.h>
25 #include <drv_usart.h>
26 #include <drv_timer.h>
27 #include <drv_gpio.h>
28 #include <stdio.h>
29 #include "pin_name.h"
30 
31 struct {
32     uint32_t base;
33     uint32_t irq;
34 }
35 const sg_usart_config[CONFIG_USART_NUM] = {
36     {CSKY_UART_BASE, UART_IRQn},
37 };
38 typedef struct {
39     int32_t    tx;
40     int32_t    rx;
41     uint16_t cfg_idx;    //idx of sg_usart_config[]
42 } usart_pin_map_t;
43 const static usart_pin_map_t s_usart_pin_map[] = {
44     {
45         PAD_UART0_SIN,
46         PAD_UART0_SOUT,
47         0
48     }
49 };
50 
51 /**
52   \param[in]   instance idx, must not exceed return value of target_get_usart_count()
53   \brief       get usart instance.
54   \return      pointer to usart instance
55 */
target_usart_init(int32_t idx,uint32_t * base,uint32_t * irq)56 int32_t target_usart_init(int32_t idx, uint32_t *base, uint32_t *irq)
57 {
58     if (idx >= sizeof(s_usart_pin_map) / sizeof(usart_pin_map_t)) {
59         return -1;
60     }
61 
62     *base = sg_usart_config[s_usart_pin_map[idx].cfg_idx].base;
63     *irq = sg_usart_config[s_usart_pin_map[idx].cfg_idx].irq;
64     return s_usart_pin_map[idx].cfg_idx;
65 }
66 
67 
68 struct {
69     uint32_t base;
70     uint32_t irq;
71 }
72 const sg_timer_config[CONFIG_TIMER_NUM] = {
73     {CSKY_TIMER0_BASE, TIM0_IRQn},
74     {CSKY_TIMER1_BASE, TIM1_IRQn},
75     {CSKY_TIMER2_BASE, TIM2_IRQn},
76     {CSKY_TIMER3_BASE, TIM3_IRQn},
77 };
78 
target_get_timer_count(void)79 int32_t target_get_timer_count(void)
80 {
81     return CONFIG_TIMER_NUM;
82 }
83 
target_get_timer(int32_t idx,uint32_t * base,uint32_t * irq)84 int32_t target_get_timer(int32_t idx, uint32_t *base, uint32_t *irq)
85 {
86     if (idx >= target_get_timer_count()) {
87         return NULL;
88     }
89 
90     *base = sg_timer_config[idx].base;
91     *irq = sg_timer_config[idx].irq;
92     return idx;
93 }
94 
95 struct {
96     uint32_t base;
97     uint32_t irq;
98     uint32_t pin_num;
99     port_name_e port;
100 }
101 const sg_gpio_config[CONFIG_GPIO_NUM] = {
102     {CSKY_GPIOA_BASE, GPIO0_IRQn, 0, PORTA},
103     {CSKY_GPIOA_BASE, GPIO1_IRQn, 0, PORTB},
104     {CSKY_GPIOA_BASE, GPIO2_IRQn, 0, PORTC},
105     {CSKY_GPIOA_BASE, GPIO3_IRQn, 0, PORTD},
106     {CSKY_GPIOA_BASE, GPIO4_IRQn, 0, PORTE},
107     {CSKY_GPIOA_BASE, GPIO5_IRQn, 0, PORTF},
108     {CSKY_GPIOA_BASE, GPIO6_IRQn, 0, PORTG},
109     {CSKY_GPIOA_BASE, GPIO7_IRQn, 0, PORTH},
110 };
111 
112 typedef struct {
113     int32_t    gpio_pin;
114     uint32_t cfg_idx;    //idx of sg_gpio_config[]
115 } gpio_pin_map_t;
116 const static gpio_pin_map_t s_gpio_pin_map[] = {
117     {PA0, 0},
118     {PA1, 1},
119     {PA2, 2},
120     {PA3, 3},
121     {PA4, 4},
122     {PA5, 5},
123     {PA6, 6},
124     {PA7, 7},
125 };
126 
target_gpio_port_init(port_name_e port,uint32_t * base,uint32_t * irq,uint32_t * pin_num)127 int32_t target_gpio_port_init(port_name_e port, uint32_t *base, uint32_t *irq, uint32_t *pin_num)
128 {
129     int i;
130 
131     for (i = 0; i < CONFIG_GPIO_NUM; i++) {
132         if (sg_gpio_config[i].port == port) {
133             *base = sg_gpio_config[i].base;
134             *irq = sg_gpio_config[i].irq;
135             *pin_num = sg_gpio_config[i].pin_num;
136             return i;
137         }
138     }
139 
140     return -1;
141 }
142 
143 /**
144   \param[in]   instance idx, must not exceed return value of target_get_gpio_count()
145   \brief       get gpio instance.
146   \return      pointer to gpio instance
147 */
target_gpio_pin_init(int32_t gpio_pin,uint32_t * port_idx)148 int32_t target_gpio_pin_init(int32_t gpio_pin, uint32_t *port_idx)
149 {
150     uint32_t idx;
151 
152     for (idx = 0; idx < sizeof(s_gpio_pin_map) / sizeof(gpio_pin_map_t); idx++) {
153         if (s_gpio_pin_map[idx].gpio_pin == gpio_pin) {
154             *port_idx = s_gpio_pin_map[idx].cfg_idx;
155             return idx;
156         }
157     }
158 
159     return -1;
160 }
161