1 /*
2 * Copyright (c) 2022 ASR Microelectronics (Shanghai) Co., Ltd. All rights reserved.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15
16 #include <stdio.h>
17 #include "board.h"
18 #include "duet_cm4.h"
19 #include "duet_common.h"
20 #include "duet_uart.h"
21 #include "duet_pinmux.h"
22 #include "lega_at_api.h"
23 #include "arch.h"
24 #ifdef _SPI_FLASH_ENABLE_
25 #include "duet_flash_alg.h"
26 #include "duet_flash.h"
27 #endif
28 #ifdef STAR_MPU_ENABLE
29 #include "panic_mpu.h"
30 #endif
31 #include "lega_wlan_api.h"
32 #include "los_interrupt.h"
33 #include "target_config.h"
34 #include "uart.h"
35 #include "board.h"
36 #include "los_arch_interrupt.h"
37 #include "lega_rtos.h"
38
39 /***********************************************************
40 * init IRQ, set priority and enable IRQ
41 *
42 **********************************************************/
43 extern void intc_irq(void);
44 extern CRITICAL_FUNC_SEG void BLE_IRQHandler(void);
45 extern void CRYPTOCELL310_IRQHandler(void);
46 extern void D_APLL_UNLOCK_IRQHandler(void);
47 extern void D_SX_UNLOCK_IRQHandler(void);
48 extern void WDG_IRQHandler(void);
49 extern void SLEEP_IRQHandler(void);
50 extern void TIMER_IRQHandler(void);
51 extern void DMA_IRQHandler(void);
52 extern void UART0_IRQHandler(void);
53 extern void UART1_IRQHandler(void);
54 extern void UART2_IRQHandler(void);
55 extern void GPIO_IRQHandler(void);
NVIC_init(void)56 void NVIC_init(void)
57 {
58 // set irq priority, default set configLIBRARY_NORMAL_INTERRUPT_PRIORITY
59 /*
60 NVIC_SetPriority(UART0_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
61 NVIC_SetPriority(UART1_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
62 NVIC_SetPriority(UART2_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
63 NVIC_SetPriority(CEVA_RW_IP_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
64 NVIC_SetPriority(D_APLL_UNLOCK_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
65 NVIC_SetPriority(D_SX_UNLOCK_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
66 NVIC_SetPriority(SLEEP_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
67 NVIC_SetPriority(WDG_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
68 NVIC_SetPriority(FLASH_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
69 NVIC_SetPriority(GPIO_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
70 NVIC_SetPriority(TIMER_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
71 NVIC_SetPriority(CRYPTOCELL310_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
72 NVIC_SetPriority(DMA_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
73 NVIC_SetPriority(SPI0_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
74 NVIC_SetPriority(SPI1_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
75 NVIC_SetPriority(SPI2_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
76 NVIC_SetPriority(I2C0_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
77 NVIC_SetPriority(I2C1_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
78 NVIC_SetPriority(SDIO_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
79 NVIC_SetPriority(PLF_WAKEUP_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
80 NVIC_SetPriority(RW_BLE_IRQn, configLIBRARY_NORMAL_INTERRUPT_PRIORITY-1);
81 */
82 ArchHwiCreate(CEVA_RW_IP_IRQn, configLIBRARY_NORMAL_INTERRUPT_PRIORITY, 0, intc_irq, 0);
83 ArchHwiCreate(D_APLL_UNLOCK_IRQn, configLIBRARY_NORMAL_INTERRUPT_PRIORITY, 0, D_APLL_UNLOCK_IRQHandler, 0);
84 ArchHwiCreate(D_SX_UNLOCK_IRQn, configLIBRARY_NORMAL_INTERRUPT_PRIORITY, 0, D_SX_UNLOCK_IRQHandler, 0);
85 ArchHwiCreate(SLEEP_IRQn, configLIBRARY_NORMAL_INTERRUPT_PRIORITY, 0, SLEEP_IRQHandler, 0);
86 ArchHwiCreate(UART0_IRQn, configLIBRARY_NORMAL_INTERRUPT_PRIORITY, 0, UART0_IRQHandler, 0);
87 ArchHwiCreate(UART1_IRQn, configLIBRARY_NORMAL_INTERRUPT_PRIORITY, 0, UART1_IRQHandler, 0);
88 ArchHwiCreate(UART2_IRQn, configLIBRARY_NORMAL_INTERRUPT_PRIORITY, 0, UART2_IRQHandler, 0);
89 ArchHwiCreate(WDG_IRQn, configLIBRARY_NORMAL_INTERRUPT_PRIORITY, 0, WDG_IRQHandler, 0);
90 ArchHwiCreate(TIMER_IRQn, configLIBRARY_NORMAL_INTERRUPT_PRIORITY, 0, TIMER_IRQHandler, 0);
91 ArchHwiCreate(DMA_IRQn, configLIBRARY_NORMAL_INTERRUPT_PRIORITY, 0, DMA_IRQHandler, 0);
92 ArchHwiCreate(RW_BLE_IRQn, configLIBRARY_NORMAL_INTERRUPT_PRIORITY - 1, 0, BLE_IRQHandler, 0);
93 ArchHwiCreate(GPIO_IRQn, configLIBRARY_NORMAL_INTERRUPT_PRIORITY, 0, GPIO_IRQHandler, 0);
94 NVIC_DisableIRQ(RW_BLE_IRQn);
95 }
96
NVIC_deinit(void)97 void NVIC_deinit(void)
98 {
99 // disable NVIC irq before kernel reloc IRQ interface
100 NVIC_DisableIRQ(CEVA_RW_IP_IRQn);
101 NVIC_DisableIRQ(D_APLL_UNLOCK_IRQn);
102 NVIC_DisableIRQ(D_SX_UNLOCK_IRQn);
103 NVIC_DisableIRQ(SLEEP_IRQn);
104 NVIC_DisableIRQ(UART0_IRQn);
105 NVIC_DisableIRQ(UART1_IRQn);
106 NVIC_DisableIRQ(UART2_IRQn);
107 NVIC_DisableIRQ(WDG_IRQn);
108 NVIC_DisableIRQ(TIMER_IRQn);
109 NVIC_DisableIRQ(DMA_IRQn);
110 NVIC_DisableIRQ(RW_BLE_IRQn);
111 }
112
os_post_init_hook(void)113 void os_post_init_hook(void)
114 {
115 lega_rtos_declare_critical();
116 lega_rtos_enter_critical();
117 *(volatile UINT32 *)OS_NVIC_CCR &= ~(UNALIGNFAULT); // allow unalign access
118 lega_rtos_exit_critical();
119 }
120
121 // static duet_uart_dev_t uart_config_struct = {0};
122 uart_dev_t uart_0;
board_uart_init(void)123 void board_uart_init(void)
124 {
125 #if (LOSCFG_USE_SHELL == 1)
126 uart_0.port = PORT_UART_STD; /* logic port */
127 uart_0.config.baud_rate = UART_BAUDRATE_115200;
128 uart_0.config.data_width = DATA_8BIT;
129 uart_0.config.flow_control = FLOW_CTRL_DISABLED;
130 uart_0.config.parity = PARITY_NO;
131 uart_0.config.stop_bits = STOP_1BIT;
132 uart_0.config.mode = TX_RX_MODE;
133 hal_uart_init(&uart_0);
134 #else
135 duet_pinmux_config(PAD2, PF_UART1);
136 duet_pinmux_config(PAD3, PF_UART1);
137
138 duet_uart_struct_init(&uart_config_struct);
139 uart_config_struct.port = UART1_INDEX;
140 uart_config_struct.priv = at_handle_uartirq;
141 // set user define config
142 uart_config_struct.config.baud_rate = UART_BAUDRATE_115200;
143 uart_config_struct.config.flow_control = FLOW_CTRL_DISABLED;
144 // make config take effect
145 duet_uart_init(&uart_config_struct);
146 #endif
147 printf_uart_register(UART1_INDEX);
148 }
149
150 extern uint8_t *lega_ble_rf_get_txcali_from_efuse(uint8_t *test);
lega_devInit()151 void lega_devInit()
152 {
153 int ret = 0;
154 (void)ret;
155 #if defined ALIOS_SUPPORT || defined HARMONYOS_SUPPORT
156 ota_roll_back_pro();
157 #endif
158
159 NVIC_init();
160
161 #ifdef DCDC_PFMMODE_CLOSE
162 lega_drv_close_dcdc_pfm();
163 #endif
164
165 #ifdef WIFI_BLE_INIT_ENABLE
166 lega_drv_rco_cal();
167 #endif
168
169 // init uart
170 board_uart_init();
171
172 #if (LOSCFG_USE_SHELL == 1)
173 ret = LosShellInit();
174 if (ret != LOS_OK) {
175 printf("LosShellInit failed! ERROR: 0x%x\n", ret);
176 }
177 ret = OsShellInit();
178 if (ret != LOS_OK) {
179 printf("OsShellInit failed! ERROR: 0x%x\n", ret);
180 }
181 #endif
182
183 #ifdef WIFI_BLE_INIT_ENABLE
184 lega_wlan_efuse_read();
185 duet_sram_rf_pta_init();
186 duet_recovery_phy_fsm_config();
187 #endif
188 #ifdef CFG_MIMO_UF
189 // config to support smartconfig in MIMO scenario
190 // lega_wlan_smartconfig_mimo_enable();
191 #endif
192
193 #ifdef CFG_TMMT_DETECT
194 // config to enable temperature compensation
195 // lega_wlan_enable_tmmt_compensation(60);
196 #endif
197 #ifdef SECURITY_ENGINE_INIT
198 lega_security_engine_init();
199 #endif
200 }
201 #ifdef WIFI_BLE_INIT_ENABLE
202 extern void lega_reset_rw_rf(void);
203 extern void lega_soc_wifi_ble_clk_disable(void);
204 extern void lega_enable_all_soc_interrupt(void);
205 #endif
206
board_before_init(void)207 void board_before_init(void)
208 {
209 SCB_DisableDCache();
210 SCB_DisableICache();
211
212 #ifdef _SPI_FLASH_ENABLE_
213 duet_flash_init();
214 #endif
215
216 #ifdef STAR_MPU_ENABLE
217 mpu_init();
218 #endif
219
220 SCB_EnableICache();
221 SCB_EnableDCache();
222
223 #ifdef WIFI_BLE_INIT_ENABLE
224 lega_reset_rw_rf();
225 // turn off all wifi/ble clock
226 lega_soc_wifi_ble_clk_disable();
227 // enable all soc interrupt
228 lega_enable_all_soc_interrupt();
229 #endif
230 }
231
232 /**************************************************
233 * after task run use board_sys_init to init board
234 **************************************************/
board_after_init(void)235 int board_after_init(void)
236 {
237 lega_devInit();
238 #ifdef MS_RELEASE_DOMAIN
239 // LOG("log_disable");
240 lega_log_disable();
241 #endif
242 #ifdef WIFI_BLE_INIT_ENABLE
243 tcpip_init(NULL, NULL);
244 lega_wlan_init();
245 #endif
246 #if 0
247 extern int init_ble_task(void);
248 init_ble_task();
249 #endif
250 return 0;
251 }
252
253 /**************************************************
254 * before task run use board_sys_init to init board
255 **************************************************/
board_init(void)256 void board_init(void)
257 {
258 #ifdef _SPI_FLASH_ENABLE_
259 flash_partition_init();
260 #endif
261 }
262