1 /* 2 * Copyright (c) 2021 Bestechnic (Shanghai) Co., Ltd. All rights reserved. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 #ifndef __BES_WATCH_POINT__ 16 #define __BES_WATCH_POINT__ 17 18 #ifndef BIT 19 #define BIT(x) (1 << (x)) 20 #endif 21 22 /*armv8m*/ 23 #define DWT_CTRL 0xE0001000 /*DWT Control Register*/ 24 #define DWT_CYCCNT 0xE0001004 /*DWT Cycle Count Register*/ 25 #define DWT_COMP0 0xE0001020 /*DWT Comparator Register n*/ 26 #define DWT_FUNCTION0 0xE0001028 /*DWT Comparator Function Register n*/ 27 #define DWT_VMASK0 0xE000102C /*DWT Comparator Value Mask Register n*/ 28 #define DCB_DEMCR 0xE000EDFC /*Debug Exception and Monitor Control Register*/ 29 #define DWT_DEVARCH 0xE0001FBC /*DWT Device Architecture Register*/ 30 31 32 /* DCB_DEMCR bit and field definitions */ 33 #define TRCENA BIT(24) 34 #define MON_EN BIT(16) 35 #define VC_HARDERR BIT(10) 36 #define VC_INTERR BIT(9) 37 #define VC_BUSERR BIT(8) 38 #define VC_STATERR BIT(7) 39 #define VC_CHKERR BIT(6) 40 #define VC_NOCPERR BIT(5) 41 #define VC_MMERR BIT(4) 42 #define VC_CORERESET BIT(0) 43 44 #define DWT_OK (0) 45 #define ERROR_FAIL (-2) 46 #define DWT_LEN_ERR (-307) 47 #define DWT_ADDR_UNALIGNED (-308) 48 #define DWT_PARA_ERR (-309) 49 50 #ifdef __cplusplus 51 extern "C" { 52 #endif 53 54 enum watchpoint_rw { 55 DWT_READ, /*trigger dwt exception when read*/ 56 DWT_WRITE, /*trigger dwt exception when write*/ 57 DWT_ACCESS, /*trigger dwt exception when read or write*/ 58 DWT_MODE_OTHER 59 }; 60 61 struct watchpoint { 62 uint32_t address; 63 uint32_t length; 64 enum watchpoint_rw rw; 65 }; 66 67 void ocd_watchpoint_setup(void); 68 int ocd_watchpoint_show(void); 69 int ocd_add_watch_point(uint32_t address, enum watchpoint_rw rw); 70 int ocd_remove_watch_point(uint32_t address, enum watchpoint_rw rw); 71 72 #ifdef __cplusplus 73 } 74 #endif 75 76 #endif 77